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Perftest: Fix TD lock-free mode not working for SRQ/XRC QP
by Junxian Huang 15 Apr '25

15 Apr '25

From: Guofeng Yue <yueguofeng(a)h-partners.com> When creating SRQ/XRC QP in TD lock-free mode, pass in ctx->pad instead of ctx->pd, otherwise the lock-free won't work. Besides, use ctx->pad directly when creating QP/SRQ since pad is designed to be interchangeable with the usual pd. When lock-free mode is disabled, pad is the exactly the usual pd. Fixes: b6f957f6bc6c ("Perftest: Add support for TD lock-free mode") Signed-off-by: Guofeng Yue <yueguofeng(a)h-partners.com> Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> --- src/perftest_resources.c | 21 ++++++++++++--------- src/perftest_resources.h | 2 +- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/src/perftest_resources.c b/src/perftest_resources.c index 2d2e9f2..6543bc7 100755 --- a/src/perftest_resources.c +++ b/src/perftest_resources.c @@ -737,7 +737,8 @@ static int ctx_xrc_srq_create(struct pingpong_context *ctx, else srq_init_attr.cq = ctx->send_cq; - srq_init_attr.pd = ctx->pd; + srq_init_attr.pd = ctx->pad; + ctx->srq = ibv_create_srq_ex(ctx->context, &srq_init_attr); if (ctx->srq == NULL) { fprintf(stderr, "Couldn't open XRC SRQ\n"); @@ -780,7 +781,8 @@ static struct ibv_qp *ctx_xrc_qp_create(struct pingpong_context *ctx, qp_init_attr.cap.max_send_wr = user_param->tx_depth; qp_init_attr.cap.max_send_sge = 1; qp_init_attr.comp_mask = IBV_QP_INIT_ATTR_PD; - qp_init_attr.pd = ctx->pd; + qp_init_attr.pd = ctx->pad; + #ifdef HAVE_IBV_WR_API if (!user_param->use_old_post_send) qp_init_attr.comp_mask |= IBV_QP_INIT_ATTR_SEND_OPS_FLAGS; @@ -2037,9 +2039,14 @@ int ctx_init(struct pingpong_context *ctx, struct perftest_parameters *user_para fprintf(stderr, "Couldn't allocate PAD\n"); goto td; } + } else { + #endif + ctx->pad = ctx->pd; + #ifdef HAVE_TD_API } #endif + #ifdef HAVE_AES_XTS if(user_param->aes_xts){ struct mlx5dv_dek_init_attr dek_attr = {}; @@ -2127,7 +2134,7 @@ int ctx_init(struct pingpong_context *ctx, struct perftest_parameters *user_para attr.comp_mask = IBV_SRQ_INIT_ATTR_TYPE | IBV_SRQ_INIT_ATTR_PD; attr.attr.max_wr = user_param->rx_depth; attr.attr.max_sge = 1; - attr.pd = ctx->pd; + attr.pd = ctx->pad; attr.srq_type = IBV_SRQT_BASIC; ctx->srq = ibv_create_srq_ex(ctx->context, &attr); @@ -2148,7 +2155,7 @@ int ctx_init(struct pingpong_context *ctx, struct perftest_parameters *user_para .max_sge = 1 } }; - ctx->srq = ibv_create_srq(ctx->pd, &attr); + ctx->srq = ibv_create_srq(ctx->pad, &attr); if (!ctx->srq) { fprintf(stderr, "Couldn't create SRQ\n"); goto xrcd; @@ -2406,11 +2413,7 @@ struct ibv_qp* ctx_qp_create(struct pingpong_context *ctx, attr_ex.send_ops_flags |= IBV_QP_EX_WITH_RDMA_READ; } - #ifdef HAVE_TD_API - attr_ex.pd = user_param->no_lock ? ctx->pad : ctx->pd; - #else - attr_ex.pd = ctx->pd; - #endif + attr_ex.pd = ctx->pad; attr_ex.comp_mask |= IBV_QP_INIT_ATTR_SEND_OPS_FLAGS | IBV_QP_INIT_ATTR_PD; attr_ex.send_cq = attr.send_cq; diff --git a/src/perftest_resources.h b/src/perftest_resources.h index b28e136..25a7438 100755 --- a/src/perftest_resources.h +++ b/src/perftest_resources.h @@ -183,8 +183,8 @@ struct pingpong_context { struct ibv_pd *pd; #ifdef HAVE_TD_API struct ibv_td *td; - struct ibv_pd *pad; #endif + struct ibv_pd *pad; struct ibv_mr **mr; struct ibv_mr *null_mr; struct ibv_cq *send_cq; -- 2.33.0

1 0

libhns: Add initial support for HNS LTTng tracing
by Junxian Huang 15 Apr '25

15 Apr '25

From: wenglianfa <wenglianfa(a)huawei.com> Add initial support for HNS LTTng tracing. Add a new libhns_trace so that the original libhns does not need to have a dependency on LTTng. Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> --- providers/hns/CMakeLists.txt | 12 ++++++ providers/hns/hns_roce_u_hw_v2.c | 3 ++ providers/hns/hns_roce_u_trace.c | 36 ++++++++++++++++++ providers/hns/hns_roce_u_trace.h | 63 ++++++++++++++++++++++++++++++++ providers/hns/libhns_trace.map | 5 +++ 5 files changed, 119 insertions(+) create mode 100644 providers/hns/hns_roce_u_trace.c create mode 100644 providers/hns/hns_roce_u_trace.h create mode 100644 providers/hns/libhns_trace.map diff --git a/providers/hns/CMakeLists.txt b/providers/hns/CMakeLists.txt index 58139ae2b..84ddd6912 100644 --- a/providers/hns/CMakeLists.txt +++ b/providers/hns/CMakeLists.txt @@ -1,3 +1,10 @@ +if (ENABLE_LTTNG AND LTTNGUST_FOUND) + rdma_shared_provider(hns_trace libhns_trace.map + 1 1.0.${PACKAGE_VERSION} + hns_roce_u_trace.c +) +endif() + rdma_shared_provider(hns libhns.map 1 1.0.${PACKAGE_VERSION} hns_roce_u.c @@ -12,3 +19,8 @@ publish_headers(infiniband ) rdma_pkg_config("hns" "libibverbs" "${CMAKE_THREAD_LIBS_INIT}") + +if (ENABLE_LTTNG AND LTTNGUST_FOUND) + target_include_directories(hns_trace PUBLIC ".") + target_link_libraries(hns_trace LINK_PRIVATE LTTng::UST) +endif() diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c index c02d2c1b8..b4b335fba 100644 --- a/providers/hns/hns_roce_u_hw_v2.c +++ b/providers/hns/hns_roce_u_hw_v2.c @@ -39,6 +39,9 @@ #include "hns_roce_u_db.h" #include "hns_roce_u_hw_v2.h" +#define LTTNG_UST_TRACEPOINT_DEFINE +#define LTTNG_UST_TRACEPOINT_PROBE_DYNAMIC_LINKAGE + #define HR_IBV_OPC_MAP(ib_key, hr_key) \ [IBV_WR_ ## ib_key] = HNS_ROCE_WQE_OP_ ## hr_key diff --git a/providers/hns/hns_roce_u_trace.c b/providers/hns/hns_roce_u_trace.c new file mode 100644 index 000000000..65aa45ca3 --- /dev/null +++ b/providers/hns/hns_roce_u_trace.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +/* + * Copyright (c) 2025 Hisilicon Limited. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#define LTTNG_UST_TRACEPOINT_CREATE_PROBES + +#include "hns_roce_u_trace.h" diff --git a/providers/hns/hns_roce_u_trace.h b/providers/hns/hns_roce_u_trace.h new file mode 100644 index 000000000..74d33344d --- /dev/null +++ b/providers/hns/hns_roce_u_trace.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +/* + * Copyright (c) 2025 Hisilicon Limited. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#if defined(LTTNG_ENABLED) + +#undef LTTNG_UST_TRACEPOINT_PROVIDER +#define LTTNG_UST_TRACEPOINT_PROVIDER rdma_core_hns + +#undef LTTNG_UST_TRACEPOINT_INCLUDE +#define LTTNG_UST_TRACEPOINT_INCLUDE "hns_roce_u_trace.h" + +#if !defined(__HNS_TRACE_H__) || defined(LTTNG_UST_TRACEPOINT_HEADER_MULTI_READ) +#define __HNS_TRACE_H__ + +#include <lttng/tracepoint.h> +#include <infiniband/verbs.h> + +#define rdma_tracepoint(arg...) lttng_ust_tracepoint(arg) + +#endif /* __HNS_TRACE_H__*/ + +#include <lttng/tracepoint-event.h> + +#else + +#ifndef __HNS_TRACE_H__ +#define __HNS_TRACE_H__ + +#define rdma_tracepoint(arg...) + +#endif /* __HNS_TRACE_H__*/ + +#endif /* defined(LTTNG_ENABLED) */ diff --git a/providers/hns/libhns_trace.map b/providers/hns/libhns_trace.map new file mode 100644 index 000000000..e74bc7479 --- /dev/null +++ b/providers/hns/libhns_trace.map @@ -0,0 +1,5 @@ +/* Export symbols should be added below according to + Documentation/versioning.md document. */ +HNS_TRACE_1.0 { + global:*; +}; \ No newline at end of file -- 2.33.0

1 0

[PATCH v2 rdma-core 0/2] libhns: Add support for LTTng tracing
by Junxian Huang 28 Mar '25

28 Mar '25

Add support for LTTng tracing. For now it is used for post_send, post_recv and poll_cq. wenglianfa (2): libhns: Add initial support for HNS LTTng tracing libhns: Add tracepoint for HNS RoCE I/O providers/hns/CMakeLists.txt | 12 +++ providers/hns/hns_roce_u_hw_v2.c | 154 +++++++++++++++++++++++++++++ providers/hns/hns_roce_u_trace.c | 36 +++++++ providers/hns/hns_roce_u_trace.h | 161 +++++++++++++++++++++++++++++++ providers/hns/libhns_trace.map | 5 + 5 files changed, 368 insertions(+) create mode 100644 providers/hns/hns_roce_u_trace.c create mode 100644 providers/hns/hns_roce_u_trace.h create mode 100644 providers/hns/libhns_trace.map -- 2.33.0

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[PATCH rdma-core] libhns: Fixes some bugs for libhns
by Junxian Huang 20 Mar '25

20 Mar '25

From: Xinghai Cen <cenxinghai(a)h-partners.com> driver inclusion category: bugfix bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IB66RT ------------------------------------------------------------------ Changes to be committed: modified: 0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch new file: 0045-libhns-fix-incorrectly-using-fixed-pagesize.patch new file: 0046-libhns-fix-missing-new-IO-support-for-DCA.patch Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- ...x-memory-leakage-when-DCA-is-enabled.patch | 12 +- ...fix-incorrectly-using-fixed-pagesize.patch | 110 ++++++++++++++++++ ...s-fix-missing-new-IO-support-for-DCA.patch | 55 +++++++++ rdma-core.spec | 10 +- 4 files changed, 181 insertions(+), 6 deletions(-) create mode 100644 0045-libhns-fix-incorrectly-using-fixed-pagesize.patch create mode 100644 0046-libhns-fix-missing-new-IO-support-for-DCA.patch diff --git a/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch b/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch index f046264..58cd8ec 100644 --- a/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch +++ b/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch @@ -1,4 +1,4 @@ -From af20dd32df73ff72d35a430a5fb87ac42d70cdf4 Mon Sep 17 00:00:00 2001 +From f8e29f955dd5399bd227c4de532f6d09872a254a Mon Sep 17 00:00:00 2001 From: wenglianfa <wenglianfa(a)huawei.com> Date: Thu, 25 Jul 2024 11:06:01 +0800 Subject: [PATCH] libhns: Fix memory leakage when DCA is enabled @@ -17,18 +17,20 @@ Fixes: 2783884a97e7 ("libhns: Add support for attaching QP's WQE buffer") Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- - providers/hns/hns_roce_u_verbs.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) + providers/hns/hns_roce_u_verbs.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c -index e30880c..c733b21 100644 +index e30880c..154e800 100644 --- a/providers/hns/hns_roce_u_verbs.c +++ b/providers/hns/hns_roce_u_verbs.c -@@ -1357,7 +1357,8 @@ static void qp_free_wqe(struct hns_roce_qp *qp) +@@ -1357,7 +1357,10 @@ static void qp_free_wqe(struct hns_roce_qp *qp) if (qp->rq.wqe_cnt) free(qp->rq.wrid); - hns_roce_free_buf(&qp->buf); ++ if (qp->dca_wqe.bufs) ++ free(qp->dca_wqe.bufs); + else + hns_roce_free_buf(&qp->buf); } diff --git a/0045-libhns-fix-incorrectly-using-fixed-pagesize.patch b/0045-libhns-fix-incorrectly-using-fixed-pagesize.patch new file mode 100644 index 0000000..717b340 --- /dev/null +++ b/0045-libhns-fix-incorrectly-using-fixed-pagesize.patch @@ -0,0 +1,110 @@ +From 7bd22fed52a1828b0d44a990b52266e9e1d92b5d Mon Sep 17 00:00:00 2001 +From: Chengchang Tang <tangchengchang(a)huawei.com> +Date: Tue, 30 Jan 2024 21:00:46 +0800 +Subject: [PATCH 45/46] libhns: fix incorrectly using fixed pagesize + +driver inclusion +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IB66RT + +------------------------------------------------------------------ + +Currently, actually used page size is fixed, causing the flexible wqe +buffer size feature to not take effect. + +Fixes: 9ab7600d832b ("libhns: Add support for attaching QP's WQE buffer") +Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_verbs.c | 24 +++++++++++++----------- + 1 file changed, 13 insertions(+), 11 deletions(-) + +diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c +index bce215e..848f836 100644 +--- a/providers/hns/hns_roce_u_verbs.c ++++ b/providers/hns/hns_roce_u_verbs.c +@@ -1296,14 +1296,14 @@ static void free_recv_rinl_buf(struct hns_roce_rinl_buf *rinl_buf) + + static void get_best_multi_region_pg_shift(struct hns_roce_device *hr_dev, + struct hns_roce_context *ctx, +- struct hns_roce_qp *qp) ++ struct hns_roce_qp *qp, bool dca_en) + { + uint32_t ext_sge_size; + uint32_t sq_size; + uint32_t rq_size; + uint8_t pg_shift; + +- if (!(ctx->config & HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ)) { ++ if (!(ctx->config & HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ || dca_en)) { + qp->pageshift = HNS_HW_PAGE_SHIFT; + return; + } +@@ -1334,7 +1334,7 @@ static void get_best_multi_region_pg_shift(struct hns_roce_device *hr_dev, + + static int calc_qp_buff_size(struct hns_roce_device *hr_dev, + struct hns_roce_context *ctx, +- struct hns_roce_qp *qp) ++ struct hns_roce_qp *qp, bool dca_en) + { + struct hns_roce_wq *sq = &qp->sq; + struct hns_roce_wq *rq = &qp->rq; +@@ -1342,7 +1342,7 @@ static int calc_qp_buff_size(struct hns_roce_device *hr_dev, + unsigned int size; + + qp->buf_size = 0; +- get_best_multi_region_pg_shift(hr_dev, ctx, qp); ++ get_best_multi_region_pg_shift(hr_dev, ctx, qp, dca_en); + page_size = 1 << qp->pageshift; + + /* SQ WQE */ +@@ -1384,7 +1384,7 @@ static inline bool check_qp_support_dca(struct hns_roce_dca_ctx *dca_ctx, + if (hns_attr && + (hns_attr->comp_mask & HNSDV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS) && + (hns_attr->create_flags & HNSDV_QP_CREATE_ENABLE_DCA_MODE)) +- return true; ++ return dca_ctx->max_size > 0; + + return false; + } +@@ -1408,9 +1408,12 @@ static int qp_alloc_wqe(struct ibv_qp_init_attr_ex *attr, + struct hns_roce_qp *qp, struct hns_roce_context *ctx) + { + struct hns_roce_device *hr_dev = to_hr_dev(ctx->ibv_ctx.context.device); ++ bool dca_en = check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr); ++ int ret; + +- if (calc_qp_buff_size(hr_dev, ctx, qp)) +- return -EINVAL; ++ ret = calc_qp_buff_size(hr_dev, ctx, qp, dca_en); ++ if (ret) ++ return ret; + + qp->sq.wrid = malloc(qp->sq.wqe_cnt * sizeof(uint64_t)); + if (!qp->sq.wrid) +@@ -1428,19 +1431,18 @@ static int qp_alloc_wqe(struct ibv_qp_init_attr_ex *attr, + goto err_alloc; + } + +- if (check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr) && +- ctx->dca_ctx.max_size > 0) { ++ if (check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr)) { + /* when DCA is enabled, use a buffer list to store page addr */ + qp->buf.buf = NULL; + qp->dca_wqe.max_cnt = hr_hw_page_count(qp->buf_size); +- qp->dca_wqe.shift = HNS_HW_PAGE_SHIFT; ++ qp->dca_wqe.shift = qp->pageshift; + qp->dca_wqe.bufs = calloc(qp->dca_wqe.max_cnt, sizeof(void *)); + if (!qp->dca_wqe.bufs) + goto err_alloc; + verbs_debug(&ctx->ibv_ctx, "alloc DCA buf.\n"); + } else { + if (hns_roce_alloc_buf(&qp->buf, qp->buf_size, +- HNS_HW_PAGE_SIZE)) ++ 1 << qp->pageshift)) + goto err_alloc; + } + +-- +2.33.0 + diff --git a/0046-libhns-fix-missing-new-IO-support-for-DCA.patch b/0046-libhns-fix-missing-new-IO-support-for-DCA.patch new file mode 100644 index 0000000..1b98200 --- /dev/null +++ b/0046-libhns-fix-missing-new-IO-support-for-DCA.patch @@ -0,0 +1,55 @@ +From 199b2f78ff9eeeb25acc78f9da495ae58877807a Mon Sep 17 00:00:00 2001 +From: Chengchang Tang <tangchengchang(a)huawei.com> +Date: Tue, 30 Jan 2024 21:28:44 +0800 +Subject: [PATCH 46/46] libhns: fix missing new IO support for DCA + +driver inclusion +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSL67 + +------------------------------------------------------------------ + +New IO related support has been missed for DCA. + +Fixes: 9ab7600d832b ("libhns: Add support for attaching QP's WQE buffer") +Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_hw_v2.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c +index aadea7a..3137111 100644 +--- a/providers/hns/hns_roce_u_hw_v2.c ++++ b/providers/hns/hns_roce_u_hw_v2.c +@@ -2191,6 +2191,8 @@ static int wc_start_poll_cq(struct ibv_cq_ex *current, + } + + err = hns_roce_poll_one(ctx, &qp, cq, NULL); ++ if (qp && check_dca_detach_enable(qp)) ++ dca_detach_qp_buf(ctx, qp); + + start_poll_done: + if (err != V2_CQ_OK) +@@ -2210,6 +2212,8 @@ static int wc_next_poll_cq(struct ibv_cq_ex *current) + return hns_roce_poll_one_swc(cq, NULL); + + err = hns_roce_poll_one(ctx, &qp, cq, NULL); ++ if (qp && check_dca_detach_enable(qp)) ++ dca_detach_qp_buf(ctx, qp); + if (err != V2_CQ_OK) + return err; + +@@ -2408,6 +2412,9 @@ init_rc_wqe(struct hns_roce_qp *qp, uint64_t wr_id, unsigned int opcode) + hr_reg_write_bool(wqe, RCWQE_SE, send_flags & IBV_SEND_SOLICITED); + hr_reg_clear(wqe, RCWQE_INLINE); + ++ if (check_qp_dca_enable(qp)) ++ fill_rc_dca_fields(qp->verbs_qp.qp.qp_num, wqe); ++ + qp->sq.wrid[wqe_idx] = wr_id; + qp->cur_wqe = wqe; + +-- +2.33.0 + diff --git a/rdma-core.spec b/rdma-core.spec index b202c8d..0edb02b 100644 --- a/rdma-core.spec +++ b/rdma-core.spec @@ -1,6 +1,6 @@ Name: rdma-core Version: 50.0 -Release: 22 +Release: 23 Summary: RDMA core userspace libraries and daemons License: GPL-2.0-only OR BSD-2-Clause AND BSD-3-Clause Url: https://github.com/linux-rdma/rdma-core @@ -50,6 +50,8 @@ patch41: 0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch patch42: 0042-libhns-Add-error-logs-to-help-diagnosis.patch patch43: 0043-libhns-Fix-missing-fields-for-SRQ-WC.patch patch44: 0044-libxscale-Add-Yunsilicon-User-Space-RDMA-Driver.patch +patch45: 0045-libhns-fix-incorrectly-using-fixed-pagesize.patch +patch46: 0046-libhns-fix-missing-new-IO-support-for-DCA.patch BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0) BuildRequires: pkgconfig(libnl-route-3.0) systemd systemd-devel @@ -629,6 +631,12 @@ fi %doc %{_docdir}/%{name}-%{version}/70-persistent-ipoib.rules %changelog +* Tue Mar 11 2025 Xinghai Cen <cenxinghai(a)h-partners.com> - 50.0-23 +- Type: bugfix +- ID: NA +- SUG: NA +- DESC: Fix some bugs for libhns + * Wed Feb 26 2025 Xin Tian <tianx(a)yunsilicon.com> - 50.0-22 - Type: requirement - ID: NA -- 2.33.0

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[PATCH rdma-core 0/3] libhns: Cleanup and Bugfixes
by Junxian Huang 13 Mar '25

13 Mar '25

This series contains some recent cleanup and bugfixes for libhns. Junxian Huang (2): libhns: Clean up data type issues libhns: Fix wrong order of spin_unlock in modify_qp wenglianfa (1): libhns: Fix wrong max_inline_data value providers/hns/hns_roce_u.h | 4 ++-- providers/hns/hns_roce_u_hw_v2.c | 17 +++++++++-------- providers/hns/hns_roce_u_verbs.c | 20 ++++++++++++++------ 3 files changed, 25 insertions(+), 16 deletions(-) -- 2.33.0

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[PATCH openEuler-22.03-LTS-SP4] libhns: Fixes some bugs for libhns
by Junxian Huang 12 Mar '25

12 Mar '25

From: Xinghai Cen <cenxinghai(a)h-partners.com> Changes to be committed: new file: 0094-libhns-Fix-the-max_inline_data-value.patch new file: 0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch new file: 0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch modified: rdma-core.spec Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- ...libhns-Fix-the-max_inline_data-value.patch | 60 +++++++++++++++ ...ns-Adapt-UD-inline-data-size-for-UCX.patch | 76 +++++++++++++++++++ ...ng-order-of-spin_unlock-in-modify_qp.patch | 37 +++++++++ rdma-core.spec | 11 ++- 4 files changed, 183 insertions(+), 1 deletion(-) create mode 100644 0094-libhns-Fix-the-max_inline_data-value.patch create mode 100644 0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch create mode 100644 0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch diff --git a/0094-libhns-Fix-the-max_inline_data-value.patch b/0094-libhns-Fix-the-max_inline_data-value.patch new file mode 100644 index 0000000..6b68cd9 --- /dev/null +++ b/0094-libhns-Fix-the-max_inline_data-value.patch @@ -0,0 +1,60 @@ +From 1960a28512d4ddd96e82e141f1135ace8cf6054b Mon Sep 17 00:00:00 2001 +From: wenglianfa <wenglianfa(a)huawei.com> +Date: Tue, 25 Feb 2025 20:18:01 +0800 +Subject: [PATCH] libhns: Fix the max_inline_data value + +driver inclusion +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5 + +---------------------------------------------------------------------- + +If max_inline_data=0, roundup_pow_of_two(0)=1. +cap->max_inline_data will be modify to 1, which +doesn't meet expectations. Here fix it. + +Fixes: e0c8de59b29a ("libhns: Fix the problem of sge nums") +Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_verbs.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c +index 47b1f8b..98a18c6 100644 +--- a/providers/hns/hns_roce_u_verbs.c ++++ b/providers/hns/hns_roce_u_verbs.c +@@ -1714,6 +1714,18 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud, + return inline_sge; + } + ++static uint32_t get_max_inline_data(struct hns_roce_context *ctx, ++ struct ibv_qp_cap *cap) ++{ ++ if (cap->max_inline_data) { ++ return min_t(uint32_t, ++ roundup_pow_of_two(cap->max_inline_data), ++ ctx->max_inline_data); ++ } ++ ++ return 0; ++} ++ + static void set_ext_sge_param(struct hns_roce_context *ctx, + struct ibv_qp_init_attr_ex *attr, + struct hns_roce_qp *qp, unsigned int wr_cnt) +@@ -1730,9 +1742,8 @@ static void set_ext_sge_param(struct hns_roce_context *ctx, + attr->cap.max_send_sge); + + if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) { +- attr->cap.max_inline_data = min_t(uint32_t, roundup_pow_of_two( +- attr->cap.max_inline_data), +- ctx->max_inline_data); ++ attr->cap.max_inline_data = ++ get_max_inline_data(ctx, &attr->cap); + + inline_ext_sge = max(ext_wqe_sge_cnt, + get_sge_num_from_max_inl_data(is_ud, +-- +2.33.0 + diff --git a/0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch b/0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch new file mode 100644 index 0000000..1dbd61c --- /dev/null +++ b/0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch @@ -0,0 +1,76 @@ +From 32cc1a9fe19c00bcf5512afa7b51a24de9dd8424 Mon Sep 17 00:00:00 2001 +From: wenglianfa <wenglianfa(a)huawei.com> +Date: Tue, 25 Feb 2025 20:29:53 +0800 +Subject: [PATCH] libhns: Adapt UD inline data size for UCX + +driver inclusion +category: feature +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5 + +---------------------------------------------------------------------- + +Adapt UD inline data size for UCX. The value +must be at least 128 to avoid the ucx bug. + +The issue url: +https://github.com/openucx/ucx/issues/10423 + +Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u.h | 2 ++ + providers/hns/hns_roce_u_verbs.c | 16 ++++++++++++---- + 2 files changed, 14 insertions(+), 4 deletions(-) + +diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h +index 323d2f9..863d4b5 100644 +--- a/providers/hns/hns_roce_u.h ++++ b/providers/hns/hns_roce_u.h +@@ -83,6 +83,8 @@ typedef _Atomic(uint64_t) atomic_bitmap_t; + #define HNS_ROCE_ADDRESS_MASK 0xFFFFFFFF + #define HNS_ROCE_ADDRESS_SHIFT 32 + ++#define HNS_ROCE_MIN_UD_INLINE 128 ++ + #define roce_get_field(origin, mask, shift) \ + (((le32toh(origin)) & (mask)) >> (shift)) + +diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c +index 98a18c6..7418d2c 100644 +--- a/providers/hns/hns_roce_u_verbs.c ++++ b/providers/hns/hns_roce_u_verbs.c +@@ -1715,11 +1715,19 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud, + } + + static uint32_t get_max_inline_data(struct hns_roce_context *ctx, +- struct ibv_qp_cap *cap) ++ struct ibv_qp_cap *cap, ++ bool is_ud) + { +- if (cap->max_inline_data) { ++ uint32_t max_inline_data = cap->max_inline_data; ++ ++ if (max_inline_data) { ++ max_inline_data = roundup_pow_of_two(max_inline_data); ++ ++ if (is_ud && max_inline_data < HNS_ROCE_MIN_UD_INLINE) ++ max_inline_data = HNS_ROCE_MIN_UD_INLINE; ++ + return min_t(uint32_t, +- roundup_pow_of_two(cap->max_inline_data), ++ max_inline_data, + ctx->max_inline_data); + } + +@@ -1743,7 +1751,7 @@ static void set_ext_sge_param(struct hns_roce_context *ctx, + + if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) { + attr->cap.max_inline_data = +- get_max_inline_data(ctx, &attr->cap); ++ get_max_inline_data(ctx, &attr->cap, is_ud); + + inline_ext_sge = max(ext_wqe_sge_cnt, + get_sge_num_from_max_inl_data(is_ud, +-- +2.33.0 + diff --git a/0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch b/0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch new file mode 100644 index 0000000..2954997 --- /dev/null +++ b/0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch @@ -0,0 +1,37 @@ +From a1e9d50eda32f05fe6af3712d1e70d3b6944528a Mon Sep 17 00:00:00 2001 +From: Junxian Huang <huangjunxian6(a)hisilicon.com> +Date: Mon, 10 Mar 2025 11:47:23 +0800 +Subject: [PATCH 96/96] libhns: Fix wrong order of spin_unlock in modify_qp + +driver inclusion +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSLL5 + +---------------------------------------------------------------------- + +The spin_unlock order should be the reverse of spin_lock() order. + +Fixes: f29e2a7fa40d ("[PATCH] libhns: Add support for the thread domain and the parent domain") +Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_hw_v2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c +index f05b839..70fe2f7 100644 +--- a/providers/hns/hns_roce_u_hw_v2.c ++++ b/providers/hns/hns_roce_u_hw_v2.c +@@ -1936,8 +1936,8 @@ static int hns_roce_u_v2_modify_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr, + if (flag) { + if (!ret) + qp->state = IBV_QPS_ERR; +- hns_roce_spin_unlock(&hr_qp->sq.hr_lock); + hns_roce_spin_unlock(&hr_qp->rq.hr_lock); ++ hns_roce_spin_unlock(&hr_qp->sq.hr_lock); + } + + if (ret) +-- +2.33.0 + diff --git a/rdma-core.spec b/rdma-core.spec index 2756cb6..0a82bf4 100644 --- a/rdma-core.spec +++ b/rdma-core.spec @@ -1,6 +1,6 @@ Name: rdma-core Version: 41.0 -Release: 32 +Release: 33 Summary: RDMA core userspace libraries and daemons License: GPLv2 or BSD Url: https://github.com/linux-rdma/rdma-core @@ -99,6 +99,9 @@ patch90: 0090-libhns-Fix-coredump-during-QP-destruction-when-send_.patch patch91: 0091-libhns-Fix-the-identification-mark-of-RDMA-UD-packet.patch patch92: 0092-libhns-Fix-missing-fields-for-SRQ-WC.patch patch93: 0093-libxscale-Add-Yunsilicon-User-Space-RDMA-Driver.patch +patch94: 0094-libhns-Fix-the-max_inline_data-value.patch +patch95: 0095-libhns-Adapt-UD-inline-data-size-for-UCX.patch +patch96: 0096-libhns-Fix-wrong-order-of-spin_unlock-in-modify_qp.patch BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0) BuildRequires: pkgconfig(libnl-route-3.0) valgrind-devel systemd systemd-devel @@ -349,6 +352,12 @@ fi %{_mandir}/* %changelog +* Wed Mar 12 2025 Xinghai Cen <cenxinghai(a)h-partners.com> - 41.0-33 +- Type: bugfix +- ID: NA +- SUG: NA +- DESC: Fixes some bugs for libhns + * Tue Mar 4 2025 Xin Tian <tianx(a)yunsilicon.com> - 41.0-32 - Type: requirement - ID: NA -- 2.33.0

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sig: Add myself to RDMA-Core/Perftest committer
by Junxian Huang 28 Feb '25

28 Feb '25

Add myself to RDMA-Core/Perftest committer. Also update the current committer Chengchang to README. Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> --- sig/sig-high-performance-network/README.md | 10 +++++++--- sig/sig-high-performance-network/sig-info.yaml | 4 ++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/sig/sig-high-performance-network/README.md b/sig/sig-high-performance-network/README.md index 2ab740be0..050b329c3 100644 --- a/sig/sig-high-performance-network/README.md +++ b/sig/sig-high-performance-network/README.md @@ -11,7 +11,7 @@ 4. 通过本sig的持续发展，实现openEuler特色的网络加速技术体系，体现几个特点：易用性、高性能、更好的软件生态。 - Sig-high-performance-network的业务范围 - 1. 维护DPDK/RDMA/XDP相关软件包，包括 - 2. - 基础软件包：RDMA-Core、DPDK、DPDK驱动。 + 2. - 基础软件包：RDMA-Core、DPDK、DPDK驱动。 - 语言库：dpdk-go、libbpf、goebf等 - 工具包：dpdk-perf、xdp-tools、dpdk-benchmark等 - 基础服务：libnet、libvma、libkefir等 @@ -58,6 +58,10 @@ Please [readme](./Vision-en.md) - qianguoxin[@qianguoxin](https://gitee.com/qianguoxin) email: qianguoxin(a)huawei.com - Yan Fangfang[@fangfang-yan](https://gitee.com/fangfang-yan) email: fangfang.yan(a)huawei.com +#### RDMA-Core项目Committer列表 +- 汤乘畅[@hellotcc](https://gitee.com/hellotcc) email: tangchengchang(a)huawei.com +- 黄俊贤[@hginjgerx](https://gitee.com/hginjgerx) email: huangjunxian6(a)hisilicon.com + ### 突出贡献者 | gitee昵称 | giteeID | 邮箱 | 姓名(可选)| |---|---|---|---| @@ -66,11 +70,11 @@ Please [readme](./Vision-en.md) # 联系方式 -- 邮件列表 <high-performance-network(a)openeuler.org> <dev(a)openeuler.org> +- 邮件列表 <high-performance-network(a)openeuler.org> <dev(a)openeuler.org> [注册邮件列表](https://mailweb.openeuler.org/postorius/lists/high-performance-netw… [历史邮件](https://mailweb.openeuler.org/hyperkitty/list/high-performance-networ… - [IRC公开会议]() - 视频会议 -- 微信 +- 微信 ![wechat_QR](./sig-wechat-qr.jpg) diff --git a/sig/sig-high-performance-network/sig-info.yaml b/sig/sig-high-performance-network/sig-info.yaml index 0f3660e4e..d25b7f5a0 100644 --- a/sig/sig-high-performance-network/sig-info.yaml +++ b/sig/sig-high-performance-network/sig-info.yaml @@ -92,3 +92,7 @@ repositories: name: Chengchang Tang organization: huawei email: tangchengchang(a)huawei.com + - gitee_id: hginjgerx + name: Junxian Huang + organization: huawei + email: huangjunxian6(a)hisilicon.com -- 2.33.0

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[PATCH] libhns: Fix missing fields for SRQ WC
by Junxian Huang 27 Feb '25

27 Feb '25

From: Xinghai Cen <cenxinghai(a)h-partners.com> The sl and src_qpn fields in recv-WC are not filled when the QP is UD and has an SRQ. Here fix it. In addition, UD QP does not support RQ INLINE and CQE INLINE features. Reorder the related if-else statements to reduce the number of conditional checks in IO path. Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- ...libhns-Fix-missing-fields-for-SRQ-WC.patch | 82 +++++++++++++++++++ rdma-core.spec | 11 ++- 2 files changed, 91 insertions(+), 2 deletions(-) create mode 100644 0092-libhns-Fix-missing-fields-for-SRQ-WC.patch diff --git a/0092-libhns-Fix-missing-fields-for-SRQ-WC.patch b/0092-libhns-Fix-missing-fields-for-SRQ-WC.patch new file mode 100644 index 0000000..9bccce2 --- /dev/null +++ b/0092-libhns-Fix-missing-fields-for-SRQ-WC.patch @@ -0,0 +1,82 @@ +From 1bebc7700d46ef8e4cafc757e8f989ace4789d69 Mon Sep 17 00:00:00 2001 +From: wenglianfa <wenglianfa(a)huawei.com> +Date: Wed, 15 Jan 2025 15:55:29 +0800 +Subject: [PATCH] libhns: Fix missing fields for SRQ WC + +mainline inclusion +from mainline-master +commit c4119911c212aaa552c9cb928fba0a696640c9b5 +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBPB3C +CVE: NA +Reference: https://github.com/linux-rdma/rdma-core/pull/1543/commits/65a7ce99cf4bfd674… + +---------------------------------------------------------------------- + +The sl and src_qpn fields in recv-WC are not filled when the QP is UD +and has an SRQ. Here fix it. + +In addition, UD QP does not support RQ INLINE and CQE INLINE features. +Reorder the related if-else statements to reduce the number of +conditional checks in IO path. + +Fixes: 061f7e1757ca ("libhns: Refactor the poll one interface") +Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> +Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_hw_v2.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c +index 1bbd788..f05b839 100644 +--- a/providers/hns/hns_roce_u_hw_v2.c ++++ b/providers/hns/hns_roce_u_hw_v2.c +@@ -540,7 +540,8 @@ static void parse_for_ud_qp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, + } + + static void parse_cqe_for_srq(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, +- struct hns_roce_srq *srq) ++ struct hns_roce_srq *srq, ++ struct hns_roce_qp *hr_qp) + { + uint32_t wqe_idx; + +@@ -550,6 +551,9 @@ static void parse_cqe_for_srq(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, + + if (hr_reg_read(cqe, CQE_CQE_INLINE)) + handle_recv_cqe_inl_from_srq(cqe, srq); ++ else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) { ++ parse_for_ud_qp(cqe, wc, hr_qp->enable_ud_sl); ++ } + } + + static int parse_cqe_for_resp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, +@@ -561,13 +565,12 @@ static int parse_cqe_for_resp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, + wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; + ++wq->tail; + +- if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) +- parse_for_ud_qp(cqe, wc, hr_qp->enable_ud_sl); +- + if (hr_reg_read(cqe, CQE_CQE_INLINE)) + handle_recv_cqe_inl_from_rq(cqe, hr_qp); + else if (hr_reg_read(cqe, CQE_RQ_INLINE)) + handle_recv_rq_inl(cqe, hr_qp); ++ else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) ++ parse_for_ud_qp(cqe, wc, hr_qp->enable_ud_sl); + + return 0; + } +@@ -777,7 +780,7 @@ static int parse_cqe_for_cq(struct hns_roce_context *ctx, struct hns_roce_cq *cq + return V2_CQ_POLL_ERR; + + if (srq) +- parse_cqe_for_srq(cqe, wc, srq); ++ parse_cqe_for_srq(cqe, wc, srq, cur_qp); + else + parse_cqe_for_resp(cqe, wc, cur_qp); + } +-- +2.33.0 + diff --git a/rdma-core.spec b/rdma-core.spec index 369d9b8..33781ce 100644 --- a/rdma-core.spec +++ b/rdma-core.spec @@ -1,6 +1,6 @@ Name: rdma-core Version: 41.0 -Release: 30 +Release: 31 Summary: RDMA core userspace libraries and daemons License: GPLv2 or BSD Url: https://github.com/linux-rdma/rdma-core @@ -97,6 +97,7 @@ patch88: 0088-libhns-Fix-reference-to-uninitialized-cq-pointer.patch patch89: 0089-libhns-Fix-bypassed-vendor-check-in-hnsdv_query_devi.patch patch90: 0090-libhns-Fix-coredump-during-QP-destruction-when-send_.patch patch91: 0091-libhns-Fix-the-identification-mark-of-RDMA-UD-packet.patch +patch92: 0092-libhns-Fix-missing-fields-for-SRQ-WC.patch BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0) BuildRequires: pkgconfig(libnl-route-3.0) valgrind-devel systemd systemd-devel @@ -344,7 +345,13 @@ fi %{_mandir}/* %changelog -* Thu Feb 25 2025 Dazhao Lao <laodazhao(a)huawei.com> - 41.0-30 +* Thu Feb 27 2025 Xinghai Cen <cenxinghai(a)h-partners.com> - 41.0-31 +- Type: bugfix +- ID: NA +- SUG: NA +- DESC: Fix missing fields for SRQ WC + +* Tue Feb 25 2025 Dazhao Lao <laodazhao(a)huawei.com> - 41.0-30 - Type: bugfix - ID: NA - SUG: NA -- 2.33.0

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[PATCH] libhns: Fix missing fields for SRQ WC
by Chengchang Tang 17 Jan '25

17 Jan '25

From: Xinghai Cen <cenxinghai(a)h-partners.com> mainline inclusion: libhns: Fix missing fields for SRQ WC Modify the information of some patch Fixes Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- ...x-memory-leakage-when-DCA-is-enabled.patch | 7 +- ...ump-during-QP-destruction-when-send_.patch | 4 +- ...libhns-Fix-missing-fields-for-SRQ-WC.patch | 82 +++++++++++++++++++ rdma-core.spec | 9 +- 4 files changed, 95 insertions(+), 7 deletions(-) create mode 100644 0043-libhns-Fix-missing-fields-for-SRQ-WC.patch diff --git a/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch b/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch index e1763f7..f046264 100644 --- a/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch +++ b/0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch @@ -1,4 +1,4 @@ -From edaf09dbfc7203ea68becfcb56eecf4af31ba555 Mon Sep 17 00:00:00 2001 +From af20dd32df73ff72d35a430a5fb87ac42d70cdf4 Mon Sep 17 00:00:00 2001 From: wenglianfa <wenglianfa(a)huawei.com> Date: Thu, 25 Jul 2024 11:06:01 +0800 Subject: [PATCH] libhns: Fix memory leakage when DCA is enabled @@ -13,8 +13,7 @@ After DCA is enabled and a QP is created, the memory block applied for DCA is not free when the QP is destroyed. Here fix it. -Fixes: 41e39ab792c8 ("[BigDipperV3R9,NeZha][ROCE] libhns: Add support for at taching QP's WQE buffer") - +Fixes: 2783884a97e7 ("libhns: Add support for attaching QP's WQE buffer") Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- @@ -36,5 +35,5 @@ index e30880c..c733b21 100644 static int qp_alloc_wqe(struct ibv_qp_init_attr_ex *attr, -- -2.25.1 +2.33.0 diff --git a/0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch b/0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch index b3ee84f..2e9f546 100644 --- a/0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch +++ b/0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch @@ -1,4 +1,4 @@ -From 263479c6fb4712528ccae276960ec94fd77afc51 Mon Sep 17 00:00:00 2001 +From 83784fc2538d24f3f06f023c21cc045d5b7f44ce Mon Sep 17 00:00:00 2001 From: Yuyu Li <liyuyu6(a)huawei.com> Date: Mon, 25 Nov 2024 16:13:48 +0800 Subject: [PATCH] libhns: Fix coredump during QP destruction when send_cq == @@ -24,7 +24,7 @@ coredump info: 0x0000ffff8feae39c in __ibv_create_qp_1_1 0x0000000000401420 in test_ctrl_path -Fixes: 95e05809d2d2 ("[BigDipperV3R9,NeZha][ROCE] libhns: Support reporting wc as software mode") +Fixes: 5494e44cf97e ("Support reporting wc as software mode.") Signed-off-by: Yuyu Li <liyuyu6(a)huawei.com> Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> --- diff --git a/0043-libhns-Fix-missing-fields-for-SRQ-WC.patch b/0043-libhns-Fix-missing-fields-for-SRQ-WC.patch new file mode 100644 index 0000000..4058094 --- /dev/null +++ b/0043-libhns-Fix-missing-fields-for-SRQ-WC.patch @@ -0,0 +1,82 @@ +From b52618371517527ce8ea4b8f5bd2571c7f69a2ba Mon Sep 17 00:00:00 2001 +From: wenglianfa <wenglianfa(a)huawei.com> +Date: Wed, 15 Jan 2025 15:55:29 +0800 +Subject: [PATCH] libhns: Fix missing fields for SRQ WC + +mainline inclusion +from mainline-master +commit 65a7ce99cf4bfd6748346206f546e51c0a82c993 +category: bugfix +bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBIEA4 +CVE: NA +Reference: https://github.com/linux-rdma/rdma-core/pull/1543/commits/65a7ce99cf4bfd674… + +---------------------------------------------------------------------- + +The sl and src_qpn fields in recv-WC are not filled when the QP is UD +and has an SRQ. Here fix it. + +In addition, UD QP does not support RQ INLINE and CQE INLINE features. +Reorder the related if-else statements to reduce the number of +conditional checks in IO path. + +Fixes: 061f7e1757ca ("libhns: Refactor the poll one interface") +Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> +Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> +Signed-off-by: Xinghai Cen <cenxinghai(a)h-partners.com> +--- + providers/hns/hns_roce_u_hw_v2.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c +index 0628646..aadea7a 100644 +--- a/providers/hns/hns_roce_u_hw_v2.c ++++ b/providers/hns/hns_roce_u_hw_v2.c +@@ -519,7 +519,8 @@ static void parse_for_ud_qp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc) + } + + static void parse_cqe_for_srq(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, +- struct hns_roce_srq *srq) ++ struct hns_roce_srq *srq, ++ struct hns_roce_qp *hr_qp) + { + uint32_t wqe_idx; + +@@ -529,6 +530,8 @@ static void parse_cqe_for_srq(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, + + if (hr_reg_read(cqe, CQE_CQE_INLINE)) + handle_recv_cqe_inl_from_srq(cqe, srq); ++ else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) ++ parse_for_ud_qp(cqe, wc); + } + + static void parse_cqe_for_resp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, +@@ -540,13 +543,13 @@ static void parse_cqe_for_resp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, + wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; + ++wq->tail; + +- if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) +- parse_for_ud_qp(cqe, wc); +- + if (hr_reg_read(cqe, CQE_CQE_INLINE)) + handle_recv_cqe_inl_from_rq(cqe, hr_qp); + else if (hr_reg_read(cqe, CQE_RQ_INLINE)) + handle_recv_rq_inl(cqe, hr_qp); ++ else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) ++ parse_for_ud_qp(cqe, wc); ++ + } + + static void parse_cqe_for_req(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, +@@ -753,7 +756,7 @@ static int parse_cqe_for_cq(struct hns_roce_context *ctx, struct hns_roce_cq *cq + return V2_CQ_POLL_ERR; + + if (srq) +- parse_cqe_for_srq(cqe, wc, srq); ++ parse_cqe_for_srq(cqe, wc, srq, cur_qp); + else + parse_cqe_for_resp(cqe, wc, cur_qp); + } +-- +2.33.0 + diff --git a/rdma-core.spec b/rdma-core.spec index 035faf7..8fd61b8 100644 --- a/rdma-core.spec +++ b/rdma-core.spec @@ -1,6 +1,6 @@ Name: rdma-core Version: 50.0 -Release: 20 +Release: 21 Summary: RDMA core userspace libraries and daemons License: GPL-2.0-only OR BSD-2-Clause AND BSD-3-Clause Url: https://github.com/linux-rdma/rdma-core @@ -48,6 +48,7 @@ patch39: 0039-libhns-Fix-the-exception-branch-of-wr_start-is-not-l.patch patch40: 0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch patch41: 0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch patch42: 0042-libhns-Add-error-logs-to-help-diagnosis.patch +patch43: 0043-libhns-Fix-missing-fields-for-SRQ-WC.patch BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0) BuildRequires: pkgconfig(libnl-route-3.0) systemd systemd-devel @@ -623,6 +624,12 @@ fi %doc %{_docdir}/%{name}-%{version}/70-persistent-ipoib.rules %changelog +* Fri Jan 17 2025 Xinghai Cen <cenxinghai(a)h-partners.com> - 50.0-21 +- Type: bugfix +- ID: NA +- SUG: NA +- DESC: Fix missing fields for SRQ WC + * Wed Jan 08 2025 Funda Wang <fundawang(a)yeah.net> - 50.0-20 - Type: bugfix - ID: NA -- 2.33.0

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libhns: Fix missing fields for SRQ WC
by Junxian Huang 15 Jan '25

15 Jan '25

From: wenglianfa <wenglianfa(a)huawei.com> The sl and src_qpn fields in recv-WC are not filled when the QP is UD and has an SRQ. Here fix it. In addition, UD QP does not support RQ INLINE and CQE INLINE features. Reorder the related if-else statements to reduce the number of conditional checks in IO path. Fixes: 061f7e1757ca ("libhns: Refactor the poll one interface") Signed-off-by: wenglianfa <wenglianfa(a)huawei.com> Signed-off-by: Junxian Huang <huangjunxian6(a)hisilicon.com> --- providers/hns/hns_roce_u_hw_v2.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c index 1d5c9a6a5..f46337226 100644 --- a/providers/hns/hns_roce_u_hw_v2.c +++ b/providers/hns/hns_roce_u_hw_v2.c @@ -510,12 +510,15 @@ static void parse_for_ud_qp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc) } static void parse_cqe_for_srq(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, - struct hns_roce_srq *srq) + struct hns_roce_srq *srq, + struct hns_roce_qp *hr_qp) { uint32_t wqe_idx; if (hr_reg_read(cqe, CQE_CQE_INLINE)) handle_recv_cqe_inl_from_srq(cqe, srq); + else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) + parse_for_ud_qp(cqe, wc); wqe_idx = hr_reg_read(cqe, CQE_WQE_IDX); wc->wr_id = srq->wrid[wqe_idx & (srq->wqe_cnt - 1)]; @@ -531,13 +534,13 @@ static void parse_cqe_for_resp(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; ++wq->tail; - if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) - parse_for_ud_qp(cqe, wc); - if (hr_reg_read(cqe, CQE_CQE_INLINE)) handle_recv_cqe_inl_from_rq(cqe, hr_qp); else if (hr_reg_read(cqe, CQE_RQ_INLINE)) handle_recv_rq_inl(cqe, hr_qp); + else if (hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD) + parse_for_ud_qp(cqe, wc); + } static void parse_cqe_for_req(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc, @@ -669,7 +672,7 @@ static int parse_cqe_for_cq(struct hns_roce_context *ctx, struct hns_roce_cq *cq return V2_CQ_POLL_ERR; if (srq) - parse_cqe_for_srq(cqe, wc, srq); + parse_cqe_for_srq(cqe, wc, srq, cur_qp); else parse_cqe_for_resp(cqe, wc, cur_qp); } -- 2.33.0

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