[PATCH rdma-core 0/3] libhns: Cleanup and Bugfixes
This series contains some recent cleanup and bugfixes for libhns. Junxian Huang (2): libhns: Clean up data type issues libhns: Fix wrong order of spin_unlock in modify_qp wenglianfa (1): libhns: Fix wrong max_inline_data value providers/hns/hns_roce_u.h | 4 ++-- providers/hns/hns_roce_u_hw_v2.c | 17 +++++++++-------- providers/hns/hns_roce_u_verbs.c | 20 ++++++++++++++------ 3 files changed, 25 insertions(+), 16 deletions(-) -- 2.33.0
Clean up mixed signed/unsigned type issues. Fix a wrong format character as well. Fixes: cf6d9149f8f5 ("libhns: Introduce hns direct verbs") Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> --- providers/hns/hns_roce_u.h | 4 ++-- providers/hns/hns_roce_u_hw_v2.c | 15 ++++++++------- providers/hns/hns_roce_u_verbs.c | 6 +++--- 3 files changed, 13 insertions(+), 12 deletions(-) diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h index 51d927f2c..614fed992 100644 --- a/providers/hns/hns_roce_u.h +++ b/providers/hns/hns_roce_u.h @@ -307,7 +307,7 @@ struct hns_roce_wq { unsigned long *wrid; struct hns_roce_spinlock hr_lock; unsigned int wqe_cnt; - int max_post; + unsigned int max_post; unsigned int head; unsigned int tail; unsigned int max_gs; @@ -335,7 +335,7 @@ struct hns_roce_sge_ex { struct hns_roce_qp { struct verbs_qp verbs_qp; struct hns_roce_buf buf; - int max_inline_data; + unsigned int max_inline_data; int buf_size; unsigned int sq_signal_bits; struct hns_roce_wq sq; diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c index f46337226..ce41b03e7 100644 --- a/providers/hns/hns_roce_u_hw_v2.c +++ b/providers/hns/hns_roce_u_hw_v2.c @@ -173,7 +173,7 @@ static enum ibv_wc_status get_wc_status(uint8_t status) { HNS_ROCE_V2_CQE_XRC_VIOLATION_ERR, IBV_WC_REM_INV_RD_REQ_ERR }, }; - for (int i = 0; i < ARRAY_SIZE(map); i++) { + for (unsigned int i = 0; i < ARRAY_SIZE(map); i++) { if (status == map[i].cqe_status) return map[i].wc_status; } @@ -896,7 +896,7 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp, unsigned int sge_mask = qp->ex_sge.sge_cnt - 1; void *dst_addr, *src_addr, *tail_bound_addr; uint32_t src_len, tail_len; - int i; + uint32_t i; if (sge_info->total_len > qp->sq.ext_sge_cnt * HNS_ROCE_SGE_SIZE) return EINVAL; @@ -966,7 +966,7 @@ static void fill_ud_inn_inl_data(const struct ibv_send_wr *wr, static bool check_inl_data_len(struct hns_roce_qp *qp, unsigned int len) { - int mtu = mtu_enum_to_int(qp->path_mtu); + unsigned int mtu = mtu_enum_to_int(qp->path_mtu); return (len <= qp->max_inline_data && len <= mtu); } @@ -1370,7 +1370,8 @@ static void fill_recv_sge_to_wqe(struct ibv_recv_wr *wr, void *wqe, unsigned int max_sge, bool rsv) { struct hns_roce_v2_wqe_data_seg *dseg = wqe; - unsigned int i, cnt; + unsigned int cnt; + int i; for (i = 0, cnt = 0; i < wr->num_sge; i++) { /* Skip zero-length sge */ @@ -1398,7 +1399,7 @@ static void fill_recv_inl_buf(struct hns_roce_rinl_buf *rinl_buf, unsigned int wqe_idx, struct ibv_recv_wr *wr) { struct ibv_sge *sge_list; - unsigned int i; + int i; if (!rinl_buf->wqe_cnt) return; @@ -1712,7 +1713,7 @@ static int check_post_srq_valid(struct hns_roce_srq *srq, static int get_wqe_idx(struct hns_roce_srq *srq, unsigned int *wqe_idx) { struct hns_roce_idx_que *idx_que = &srq->idx_que; - int bit_num; + unsigned int bit_num; int i; /* bitmap[i] is set zero if all bits are allocated */ @@ -2071,7 +2072,7 @@ static void set_sgl_rc(struct hns_roce_v2_wqe_data_seg *dseg, unsigned int mask = qp->ex_sge.sge_cnt - 1; unsigned int msg_len = 0; unsigned int cnt = 0; - int i; + unsigned int i; for (i = 0; i < num_sge; i++) { if (!sge[i].length) diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c index 934684982..552010ab5 100644 --- a/providers/hns/hns_roce_u_verbs.c +++ b/providers/hns/hns_roce_u_verbs.c @@ -417,7 +417,7 @@ static int verify_cq_create_attr(struct ibv_cq_init_attr_ex *attr, { struct hns_roce_pad *pad = to_hr_pad(attr->parent_domain); - if (!attr->cqe || attr->cqe > context->max_cqe) { + if (!attr->cqe || attr->cqe > (uint32_t)context->max_cqe) { verbs_err(&context->ibv_ctx, "unsupported cq depth %u.\n", attr->cqe); return EINVAL; @@ -984,7 +984,7 @@ static int check_hnsdv_qp_attr(struct hns_roce_context *ctx, return 0; if (!check_comp_mask(hns_attr->comp_mask, HNSDV_QP_SUP_COMP_MASK)) { - verbs_err(&ctx->ibv_ctx, "invalid hnsdv comp_mask 0x%x.\n", + verbs_err(&ctx->ibv_ctx, "invalid hnsdv comp_mask 0x%llx.\n", hns_attr->comp_mask); return EINVAL; } @@ -1136,7 +1136,7 @@ static int alloc_recv_rinl_buf(uint32_t max_sge, struct hns_roce_rinl_buf *rinl_buf) { unsigned int cnt; - int i; + unsigned int i; cnt = rinl_buf->wqe_cnt; rinl_buf->wqe_list = calloc(cnt, sizeof(struct hns_roce_rinl_wqe)); -- 2.33.0
From: wenglianfa <wenglianfa@huawei.com> When cap.max_inline_data is 0, it will be modified to 1 since roundup_pow_of_two(0) == 1, which violates users' expectations. Here fix it. Fixes: 2aff0d55098c ("libhns: Fix the problem of sge nums") Signed-off-by: wenglianfa <wenglianfa@huawei.com> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> --- providers/hns/hns_roce_u_verbs.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c index 552010ab5..2c14121a3 100644 --- a/providers/hns/hns_roce_u_verbs.c +++ b/providers/hns/hns_roce_u_verbs.c @@ -1291,6 +1291,16 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud, return inline_sge; } +static uint32_t get_max_inline_data(struct hns_roce_context *ctx, + struct ibv_qp_cap *cap) +{ + if (cap->max_inline_data) + return min_t(uint32_t, roundup_pow_of_two(cap->max_inline_data), + ctx->max_inline_data); + + return 0; +} + static void set_ext_sge_param(struct hns_roce_context *ctx, struct ibv_qp_init_attr_ex *attr, struct hns_roce_qp *qp, unsigned int wr_cnt) @@ -1307,9 +1317,7 @@ static void set_ext_sge_param(struct hns_roce_context *ctx, attr->cap.max_send_sge); if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) { - attr->cap.max_inline_data = min_t(uint32_t, roundup_pow_of_two( - attr->cap.max_inline_data), - ctx->max_inline_data); + attr->cap.max_inline_data = get_max_inline_data(ctx, &attr->cap); inline_ext_sge = max(ext_wqe_sge_cnt, get_sge_num_from_max_inl_data(is_ud, -- 2.33.0
The spin_unlock order should be the reverse of spin_lock order. Fixes: 179f015e090d ("libhns: Add support for lock-free QP") Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> --- providers/hns/hns_roce_u_hw_v2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c index ce41b03e7..c02d2c1b8 100644 --- a/providers/hns/hns_roce_u_hw_v2.c +++ b/providers/hns/hns_roce_u_hw_v2.c @@ -1576,8 +1576,8 @@ static int hns_roce_u_v2_modify_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr, if (flag) { if (!ret) qp->state = IBV_QPS_ERR; - hns_roce_spin_unlock(&hr_qp->sq.hr_lock); hns_roce_spin_unlock(&hr_qp->rq.hr_lock); + hns_roce_spin_unlock(&hr_qp->sq.hr_lock); } if (ret) -- 2.33.0
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Junxian Huang