From: Kunkun Jiang <jiangkunkun@huawei.com> virt inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I8K89F CVE: NA ------------------------------------------------------------------ According to Hisilicon spec, using GITS_VERSION(0xC000) bit[12] to indicate ITS vtimer interrupt bypass capability. Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com> Signed-off-by: Dongxu Sun <sundongxu3@huawei.com> --- drivers/irqchip/irq-gic-v3-its.c | 14 +++++++++++--- include/linux/irqchip/arm-gic-v3.h | 11 +++++++++++ 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 9501c2ce5625..6f4a848d3492 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -119,12 +119,19 @@ struct its_node { int numa_node; unsigned int msi_domain_flags; u32 pre_its_base; /* for Socionext Synquacer */ + /** + * Hisilicon implement reg used for indicating + * direct vPPI injection capability. + */ + u32 version; int vlpi_redist_offset; }; -#define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) -#define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) -#define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) +#define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) +#define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) +#define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) + +#define is_vtimer_irqbypass(its) (!!((its)->version & GITS_VERSION_VTIMER)) #define ITS_ITT_ALIGN SZ_256 @@ -5292,6 +5299,7 @@ static int __init its_probe_one(struct resource *res, INIT_LIST_HEAD(&its->its_device_list); typer = gic_read_typer(its_base + GITS_TYPER); its->typer = typer; + its->version = readl_relaxed(its_base + GITS_VERSION); its->base = its_base; its->phys_base = res->start; if (is_v4(its)) { diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 2f7983a7f876..8900fe6563f9 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -379,6 +379,9 @@ #define GITS_SGIR 0x20020 +/* HiSilicon IMP DEF register */ +#define GITS_VERSION 0xC000 + #define GITS_SGIR_VPEID GENMASK_ULL(47, 32) #define GITS_SGIR_VINTID GENMASK_ULL(3, 0) @@ -402,6 +405,14 @@ #define GITS_TYPER_VMAPP (1ULL << 40) #define GITS_TYPER_SVPET GENMASK_ULL(42, 41) +/** + * HiSilicon IMP DEF field which indicates if the vPPI direct injection + * is supported. + * - 0: not supported + * - 1: supported + */ +#define GITS_VERSION_VTIMER (1ULL << 12) + #define GITS_IIDR_REV_SHIFT 12 #define GITS_IIDR_REV_MASK (0xf << GITS_IIDR_REV_SHIFT) #define GITS_IIDR_REV(r) (((r) >> GITS_IIDR_REV_SHIFT) & 0xf) -- 2.33.0