virt inclusion category: bugfix bugzilla: https://atomgit.com/openeuler/kernel/issues/8610 -------------------------------------------------------------------- Enabling TLBI optimization via kvm-arm.dvmbm_enabled=1 permanently sets the LSUDVM_CTRL_EL2 control bit. Since CCA doesn't yet support this feature, CCA VMs will read an erroneous bitmap from SYS_LSUDVMBM_EL2 when performing TLB flushes, causing a panic. To avoid this issue, this patch dynamically sets/clears the bit in vcpu_load/vcpu_put, limiting the optimization to normal VMs only. Fixes: e85b97c7e2b4 ("KVM: arm64: Probe and configure DVMBM capability on HiSi CPUs") Signed-off-by: Tian Zheng <zhengtian10@huawei.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> --- arch/arm64/kvm/hisilicon/hisi_virt.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kvm/hisilicon/hisi_virt.c b/arch/arm64/kvm/hisilicon/hisi_virt.c index 5731d337b228..73454a894b8b 100644 --- a/arch/arm64/kvm/hisilicon/hisi_virt.c +++ b/arch/arm64/kvm/hisilicon/hisi_virt.c @@ -251,11 +251,6 @@ bool hisi_dvmbm_supported(void) return false; } - /* - * Enable TLBI Broadcast optimization by setting - * LSUDVM_CTRL_EL2's bit[0]. - */ - on_each_cpu(hardware_enable_dvmbm, NULL, 1); return true; } @@ -555,6 +550,7 @@ void kvm_tlbi_dvmbm_vcpu_load(struct kvm_vcpu *vcpu) if (!kvm_dvmbm_support) return; + hardware_enable_dvmbm(NULL); cpumask_copy(vcpu->arch.sched_cpus, current->cpus_ptr); if (likely(cpumask_equal(vcpu->arch.sched_cpus, @@ -605,6 +601,8 @@ void kvm_tlbi_dvmbm_vcpu_put(struct kvm_vcpu *vcpu) return; cpumask_copy(vcpu->arch.pre_sched_cpus, vcpu->arch.sched_cpus); + hardware_disable_dvmbm(NULL); + write_sysreg_s((DVMBM_RANGE_ALL_DIES << DVMBM_RANGE_SHIFT), SYS_LSUDVMBM_EL2); } void kvm_get_pg_cfg(void) -- 2.33.0