From: Xiang Chen <chenxiang66@hisilicon.com> virt inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBPH85 ------------------------------------------------------------------------ For ESL or other platforms which don't enable IPIV, system register s3_4_c15_c7_2 may be not defined, so need to check it before operating it. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com> --- drivers/irqchip/irq-gic-v3-its.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 49a2b3b050c5..7c1416537dd1 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -4607,7 +4607,7 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe, asm volatile("msr s3_4_c15_c7_2, %0" : : "r" (val)); asm volatile("mrs %0, s3_4_c15_c7_2" : "=r" (val)); - } else { + } else if (static_branch_unlikely(&ipiv_enable)) { /* enable guest access ICC_SGI1R_EL1 trap, disable ipiv */ asm volatile("mrs %0, s3_4_c15_c7_2" : "=r" (val)); val &= ~1UL; -- 2.33.0