driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC15TR ---------------------------------------------------------------------- This series adds support for HiSilicon SoC cache lockdown and cache maintenance operations. Cache lockdown feature prevents cache entries from being evicted from L3 cache. It can be enabled by calling mmap function to the file (`/dev/hisi_soc_cache_mgmt`). This feature is implemented in the driver hisi_soc_l3c. Cache maintenance feature, following Arm64's CHI spec[1], enables users to raise certain transactions to the memory residing in the cache. This can be achieved by calling ioctl function to the same file as above. This feature is implemented in the driver hisi_soc_hha. L3 cache and L3 cache PMU share the same memory resource, which makes one fails to probe while another is on board. Since both devices rely on distinct information exported by ACPI, their probing functions should be unrelated. Workaround the resource conflict check by replacing devm_ioremap_resource() to devm_ioremap() instead. [1] https://developer.arm.com/documentation/ihi0050/latest/ Yushan Wang (3): soc cache: Add framework driver for HiSilicon SoC cache soc cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent soc cache: Modify default config to compile HiSilicon SoC cache driver arch/arm64/configs/openeuler_defconfig | 5 + drivers/soc/hisilicon/Kconfig | 22 + drivers/soc/hisilicon/Makefile | 3 + .../soc/hisilicon/hisi_soc_cache_framework.c | 378 ++++++++++++++++++ .../soc/hisilicon/hisi_soc_cache_framework.h | 77 ++++ drivers/soc/hisilicon/hisi_soc_hha.c | 189 +++++++++ .../uapi/misc/hisi_soc_cache/hisi_soc_cache.h | 35 ++ 7 files changed, 709 insertions(+) create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.c create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.h create mode 100644 drivers/soc/hisilicon/hisi_soc_hha.c create mode 100644 include/uapi/misc/hisi_soc_cache/hisi_soc_cache.h -- 2.33.0