
driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7C2U9 CVE: NA ---------------------------------------------------------------------- UC PMU global enable register be setup in pmu callback pmu::enable(), which also be wiil setup in pmu::start()->xxx_write_counter(). And it will start statistical information when callback pmu:start() return, not is pmu:enable() return. Therefore the driver counter counts more data than normal. Fixes: 5ed05cb ("drivers/perf: hisi: Add support for HiSilicon UC PMU driver") Signed-off-by: Junhao He <hejunhao3@huawei.com> --- drivers/perf/hisilicon/hisi_uncore_uc_pmu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c index b7b7d3d9d8be..ff9c63f66abc 100644 --- a/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c @@ -292,7 +292,6 @@ static u64 hisi_uc_pmu_read_counter(struct hisi_pmu *uc_pmu, static void hisi_uc_pmu_write_counter(struct hisi_pmu *uc_pmu, struct hw_perf_event *hwc, u64 val) { - hisi_uc_pmu_start_counters(uc_pmu); writeq(val, uc_pmu->base + HISI_UC_CNTR_REG(hwc->idx)); } -- 2.33.0