From: Anup Patel <anup.patel@wdc.com> euleros inclusion category: feature bugzilla: NA CVE: NA This changes will be included in next revision of KVM RISC-V series. Link: https://gitee.com/openeuler/kernel/issues/I1RR1Y Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Mingwang Li <limingwang@huawei.com> Reviewed-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com> --- arch/riscv/include/asm/kvm_host.h | 1 + arch/riscv/kvm/vcpu_exit.c | 12 +++++++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h index ae43bd204284..e330512985a7 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -74,6 +74,7 @@ struct kvm_arch { struct kvm_mmio_decode { unsigned long insn; + int insn_len; int len; int shift; int return_handled; diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c index 3908f7bacdf3..f3a3acdc8db0 100644 --- a/arch/riscv/kvm/vcpu_exit.c +++ b/arch/riscv/kvm/vcpu_exit.c @@ -192,7 +192,7 @@ static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run, unsigned long fault_addr, unsigned long htinst) { unsigned long insn; - int shift = 0, len = 0; + int shift = 0, len = 0, insn_len = 0; struct kvm_cpu_trap utrap = { 0 }; struct kvm_cpu_context *ct = &vcpu->arch.guest_context; @@ -203,6 +203,7 @@ static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run, * transformed instruction or custom instruction. */ insn = htinst | INSN_16BIT_MASK; + insn_len = (htinst & BIT(1)) ? INSN_LEN(insn) : 2; } else { /* * Bit[0] == 0 implies trapped instruction value is @@ -216,6 +217,7 @@ static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run, kvm_riscv_vcpu_trap_redirect(vcpu, &utrap); return 1; } + insn_len = INSN_LEN(insn); } /* Decode length of MMIO and shift */ @@ -268,6 +270,7 @@ static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run, /* Save instruction decode info */ vcpu->arch.mmio_decode.insn = insn; + vcpu->arch.mmio_decode.insn_len = insn_len; vcpu->arch.mmio_decode.shift = shift; vcpu->arch.mmio_decode.len = len; vcpu->arch.mmio_decode.return_handled = 0; @@ -290,7 +293,7 @@ static int emulate_store(struct kvm_vcpu *vcpu, struct kvm_run *run, u32 data32; u64 data64; ulong data; - int len = 0; + int len = 0, insn_len = 0; unsigned long insn; struct kvm_cpu_trap utrap = { 0 }; struct kvm_cpu_context *ct = &vcpu->arch.guest_context; @@ -302,6 +305,7 @@ static int emulate_store(struct kvm_vcpu *vcpu, struct kvm_run *run, * transformed instruction or custom instruction. */ insn = htinst | INSN_16BIT_MASK; + insn_len = (htinst & BIT(1)) ? INSN_LEN(insn) : 2; } else { /* * Bit[0] == 0 implies trapped instruction value is @@ -315,6 +319,7 @@ static int emulate_store(struct kvm_vcpu *vcpu, struct kvm_run *run, kvm_riscv_vcpu_trap_redirect(vcpu, &utrap); return 1; } + insn_len = INSN_LEN(insn); } data = GET_RS2(insn, &vcpu->arch.guest_context); @@ -356,6 +361,7 @@ static int emulate_store(struct kvm_vcpu *vcpu, struct kvm_run *run, /* Save instruction decode info */ vcpu->arch.mmio_decode.insn = insn; + vcpu->arch.mmio_decode.insn_len = insn_len; vcpu->arch.mmio_decode.shift = 0; vcpu->arch.mmio_decode.len = len; vcpu->arch.mmio_decode.return_handled = 0; @@ -617,7 +623,7 @@ int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run) done: /* Move to next instruction */ - vcpu->arch.guest_context.sepc += INSN_LEN(insn); + vcpu->arch.guest_context.sepc += vcpu->arch.mmio_decode.insn_len; return 0; } -- 2.20.1