driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IC9UQB CVE: NA ---------------------------------------------------------------------- The hashagg algorithm supports only the sva mode. When the nosva mode is used, the hashagg algorithm is not supported. Therefore, the algorithm is not exposed when the uacce mode is 2. Fixes: 09463346b6c2 ("crypto: hisilicon/zip - add data aggregation feature") Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: JiangShui Yang <yangjiangshui@h-partners.com> --- drivers/crypto/hisilicon/zip/dae_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/hisilicon/zip/dae_main.c b/drivers/crypto/hisilicon/zip/dae_main.c index 3507d26c7823..63e3a1e7c2fb 100644 --- a/drivers/crypto/hisilicon/zip/dae_main.c +++ b/drivers/crypto/hisilicon/zip/dae_main.c @@ -87,7 +87,7 @@ int hisi_dae_set_alg(struct hisi_qm *qm) if (!dae_is_support(qm)) return 0; - if (!qm->uacce) + if (!qm->uacce || qm->mode != UACCE_MODE_SVA) return 0; len = strlen(qm->uacce->algs); -- 2.33.0