From: Guo Mengqi <guomengqi3@huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4KX9W CVE: NA ------------ Support ts core ras process for ascend. Signed-off-by: Xu Qiang <xuqiang36@huawei.com> Signed-off-by: Lijun Fang <fanglijun3@huawei.com> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com> Reviewed-by: Weilong Chen <chenweilong@huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> --- drivers/acpi/apei/ghes.c | 7 +++++++ include/acpi/ghes.h | 2 ++ include/linux/cper.h | 4 ++++ 3 files changed, 13 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 0c8330ed1ffd..744769f7bddb 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -118,6 +118,9 @@ module_param_named(disable, ghes_disable, bool, 0); static LIST_HEAD(ghes_hed); static DEFINE_MUTEX(ghes_list_mutex); +BLOCKING_NOTIFIER_HEAD(ghes_ts_err_chain); +EXPORT_SYMBOL(ghes_ts_err_chain); + /* * Because the memory area used to transfer hardware error information * from BIOS to Linux can be determined only in NMI, IRQ or timer @@ -655,6 +658,10 @@ static bool ghes_do_proc(struct ghes *ghes, } else if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) { queued = ghes_handle_arm_hw_error(gdata, sev); + } + else if (guid_equal(sec_type, &CPER_SEC_TS_CORE)) { + blocking_notifier_call_chain(&ghes_ts_err_chain, + 0, acpi_hest_get_payload(gdata)); } else { void *err = acpi_hest_get_payload(gdata); diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h index 34fb3431a8f3..89330e4872c0 100644 --- a/include/acpi/ghes.h +++ b/include/acpi/ghes.h @@ -145,4 +145,6 @@ int ghes_notify_sea(void); static inline int ghes_notify_sea(void) { return -ENOENT; } #endif +extern struct blocking_notifier_head ghes_ts_err_chain; + #endif /* GHES_H */ diff --git a/include/linux/cper.h b/include/linux/cper.h index 6a511a1078ca..78cf8a0b05a5 100644 --- a/include/linux/cper.h +++ b/include/linux/cper.h @@ -197,6 +197,10 @@ enum { #define CPER_SEC_DMAR_IOMMU \ GUID_INIT(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \ 0xDF, 0xAA, 0x84, 0xEC) +/* HISI ts core */ +#define CPER_SEC_TS_CORE \ + GUID_INIT(0xeb4c71f8, 0xbc76, 0x4c46, 0xbd, 0x9, 0xd0, 0xd3, \ + 0x45, 0x0, 0x5a, 0x92) #define CPER_PROC_VALID_TYPE 0x0001 #define CPER_PROC_VALID_ISA 0x0002 -- 2.20.1