virt inclusion category:bugfix bugzilla:https://atomgit.com/openeuler/kernel/issues/8756 CVE:NA ----------------------------------------------------------- Use the IMPLEMENTOR field of the MIDR register instead of cpu_type to determine whether DVMBM is supported and to handle DVMBM bug fixes for HIP10 and HIP10C chips. Signed-off-by:Li Qiqi <liqiqi23@huawei.com> --- arch/arm64/kvm/hisilicon/hisi_virt.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kvm/hisilicon/hisi_virt.c b/arch/arm64/kvm/hisilicon/hisi_virt.c index 8133f4704f05..0da705119efc 100644 --- a/arch/arm64/kvm/hisilicon/hisi_virt.c +++ b/arch/arm64/kvm/hisilicon/hisi_virt.c @@ -232,8 +232,7 @@ void ipiv_gicd_init(void) bool hisi_dvmbm_supported(void) { - if (cpu_type != HI_IP10 && cpu_type != HI_IP10C && - cpu_type != HI_IP12) + if (read_cpuid_implementor() != ARM_CPU_IMP_HISI) return false; if (!is_kernel_in_hyp_mode()) { @@ -542,6 +541,7 @@ void kvm_tlbi_dvmbm_vcpu_load(struct kvm_vcpu *vcpu) struct kvm_vcpu *tmp; cpumask_t mask; unsigned long i; + u32 midr; /* Don't bother on old hardware */ if (!kvm_dvmbm_support) @@ -581,10 +581,11 @@ void kvm_tlbi_dvmbm_vcpu_load(struct kvm_vcpu *vcpu) * Re-calculate LSUDVMBM_EL2 for this VM and kick all vcpus * out to reload the LSUDVMBM configuration. */ - if (cpu_type == HI_IP12) - kvm_update_vm_lsudvmbm_hip12(kvm); - else + midr = read_cpuid_id(); + if (midr == MIDR_HISI_HIP10 || midr == MIDR_HISI_HIP10C) kvm_update_vm_lsudvmbm(kvm); + else + kvm_update_vm_lsudvmbm_hip12(kvm); kvm_make_all_cpus_request(kvm, KVM_REQ_RELOAD_TLBI_DVMBM); out_unlock: @@ -608,8 +609,10 @@ void kvm_get_pg_cfg(void) u32 pg_cfgs[MAX_PG_CFG_SOCKETS * MAX_DIES_PER_SOCKET]; u64 mn_phy_base; u32 val; + u32 midr; - if (cpu_type == HI_IP12) + midr = read_cpuid_id(); + if (midr != MIDR_HISI_HIP10 && midr != MIDR_HISI_HIP10C) return; socket_num = kvm_get_socket_num(); -- 2.43.0