From: Yang Yingliang <yangyingliang@huawei.com> hulk inclusion category: feature bugzilla: 46791 CVE: N/A ------------------------------------------------- Now MBIGEN can support to generate SPIs by writing GICD_SETSPIR. Add dt example to help document. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Hanjun Guo <guohanjun@huawei.com> Signed-off-by: zhangyi (F) <yi.zhang@huawei.com> --- .../hisilicon,mbigen-v2.txt | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt index a6813a071f15..298c033ed860 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt @@ -10,7 +10,7 @@ Hisilicon designed mbigen to collect and generate interrupt. Non-pci devices can connect to mbigen and generate the -interrupt by writing ITS register. +interrupt by writing GICD or ITS register. The mbigen chip and devices connect to mbigen have the following properties: @@ -64,6 +64,13 @@ Examples: num-pins = <2>; #interrupt-cells = <2>; }; + + mbigen_spi_example:spi_example { + interrupt-controller; + msi-parent = <&gic>; + num-pins = <2>; + #interrupt-cells = <2>; + }; }; Devices connect to mbigen required properties: @@ -82,3 +89,11 @@ Examples: interrupts = <656 1>, <657 1>; }; + + spi_example: spi0@0 { + compatible = "spi,example"; + reg = <0 0 0 0>; + interrupt-parent = <&mbigen_spi_example>; + interrupts = <13 4>, + <14 4>; + }; -- 2.25.0