From: xiabing <xiabing12@h-partners.com> driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I85PIL CVE: NA ---------------------------------------------------------------------- This reverts commit 11e4ae52ebfb9c73d75e9dbae639929ecc4359e7. Signed-off-by: xiabing <xiabing12@h-partners.com> --- include/linux/coresight-pmu.h | 5 ++--- tools/include/linux/coresight-pmu.h | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 0c2cee05c4e3..b0e35eec6499 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -8,8 +8,7 @@ #define _LINUX_CORESIGHT_PMU_H #define CORESIGHT_ETM_PMU_NAME "cs_etm" -#define CORESIGHT_ETM_PMU_SEED 0x1 -#define CORESIGHT_ETM_CSID_MAX 0x70 +#define CORESIGHT_ETM_PMU_SEED 0x10 /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_CYCACC 12 @@ -31,7 +30,7 @@ static inline int coresight_get_trace_id(int cpu) * the common convention is to have data trace IDs be I(N) + 1, * set instruction trace IDs as a function of the CPU number. */ - return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)) % CORESIGHT_ETM_CSID_MAX; + return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); } #endif diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index 3c52e434bf3a..5e8a5c541fe7 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h @@ -8,8 +8,7 @@ #define _LINUX_CORESIGHT_PMU_H #define CORESIGHT_ETM_PMU_NAME "cs_etm" -#define CORESIGHT_ETM_PMU_SEED 0x1 -#define CORESIGHT_ETM_CSID_MAX 0x70 +#define CORESIGHT_ETM_PMU_SEED 0x10 /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_BRANCH_BROADCAST 8 @@ -36,7 +35,7 @@ static inline int coresight_get_trace_id(int cpu) * the common convention is to have data trace IDs be I(N) + 1, * set instruction trace IDs as a function of the CPU number. */ - return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)) % CORESIGHT_ETM_CSID_MAX; + return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); } #endif -- 2.30.0