From: Marc Zyngier <maz@kernel.org> virt inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I97WGU Reference: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/commit... ----------------------------------------------------------- Since it is allowed to have any combination of CPU and GIC supporting NMIs or not, let's drop the NMI feature at the point where it is injected in the LR if the vcpu doesn't have FEAT_NMI. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: caijian <caijian11@h-partners.com> --- arch/arm64/kvm/vgic/vgic-v3.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c index ba6c907ac1f4..e82402dada77 100644 --- a/arch/arm64/kvm/vgic/vgic-v3.c +++ b/arch/arm64/kvm/vgic/vgic-v3.c @@ -181,7 +181,8 @@ void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr) if (irq->group) val |= ICH_LR_GROUP; - if (irq->nmi) + if (vcpu->kvm->arch.pfr1_nmi == ID_AA64PFR1_EL1_NMI_IMP && + irq->nmi) val |= ICH_LR_NMI; else val |= (u64)irq->priority << ICH_LR_PRIORITY_SHIFT; -- 2.30.0