[PATCH OLK-5.10] Revert "drm/hisilicon/hibmc: hibmc-drm bugfix for DP"

hulk inclusion category: bugfix bugzilla: https://atomgit.com/src-openeuler/kernel/issues/13655 ------------------------------------------ This reverts commit 70dcc68078ac0303c412b9dedfddcc0a850e29f1. Commit 70dcc68078ac introduced a null-pointer dereference exception, causing kernel boot failure: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000048 Call trace: hibmc_debugfs_init+0x38/0x68 [hibmc_drm] hibmc_pci_probe+0xdc/0x1ac [hibmc_drm] local_pci_probe+0x48/0xb0 work_for_cpu_fn+0x24/0x50 process_one_work+0x1d8/0x4c0 worker_thread+0x25c/0x470 kthread+0x108/0x150 Temporarily revert this patch to circumvent the issue. Fixes: 70dcc68078ac ("drm/hisilicon/hibmc: hibmc-drm bugfix for DP") Signed-off-by: Tengda Wu <wutengda2@huawei.com> --- drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h | 5 +- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 83 ++++++------------- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h | 9 -- drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c | 67 ++++----------- drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h | 10 +-- .../gpu/drm/hisilicon/hibmc/dp/dp_serdes.c | 12 +++ .../drm/hisilicon/hibmc/hibmc_drm_debugfs.c | 49 +---------- .../gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 65 --------------- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 37 ++++----- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 1 - .../gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c | 5 -- .../gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 13 +-- 12 files changed, 77 insertions(+), 279 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h index 1107e10b2047..4bbe6b567056 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h @@ -15,7 +15,6 @@ #include "dp_hw.h" -#define HIBMC_DP_LINK_RATE_CAL 27 #define HIBMC_DP_LANE_NUM_MAX 2 struct hibmc_link_status { @@ -26,9 +25,6 @@ struct hibmc_link_status { struct hibmc_link_cap { u8 link_rate; u8 lanes; - int rx_dpcd_revision; - bool is_tps3; - bool is_tps4; }; struct hibmc_dp_link { @@ -67,6 +63,7 @@ struct hibmc_dp_dev { void hibmc_dp_aux_init(struct hibmc_dp *dp); int hibmc_dp_link_training(struct hibmc_dp_dev *dp); +int hibmc_dp_serdes_init(struct hibmc_dp_dev *dp); int hibmc_dp_serdes_rate_switch(u8 rate, struct hibmc_dp_dev *dp); int hibmc_dp_serdes_set_tx_cfg(struct hibmc_dp_dev *dp, u8 train_set[HIBMC_DP_LANE_NUM_MAX]); diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c index 9e8f95d957f2..8f0daec7d174 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c @@ -154,6 +154,7 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) { struct drm_device *drm_dev = dp->drm_dev; struct hibmc_dp_dev *dp_dev; + int ret; dp_dev = devm_kzalloc(drm_dev->dev, sizeof(struct hibmc_dp_dev), GFP_KERNEL); if (!dp_dev) @@ -165,22 +166,23 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) dp_dev->dev = drm_dev; dp_dev->base = dp->mmio + HIBMC_DP_OFFSET; - dp_dev->serdes_base = dp_dev->base + HIBMC_DP_HOST_OFFSET; hibmc_dp_aux_init(dp); + ret = hibmc_dp_serdes_init(dp_dev); + if (ret) + return ret; + dp_dev->link.cap.lanes = 0x2; dp_dev->link.cap.link_rate = DP_LINK_BW_8_1; + /* hdcp data */ + writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* int init */ writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE); writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS); /* rst */ - writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); - usleep_range(30, 50); writel(HIBMC_DP_DPTX_RST, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); - /* hdcp data */ - writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* clock enable */ writel(HIBMC_DP_CLK_EN, dp_dev->base + HIBMC_DP_DPTX_CLK_CTRL); @@ -222,17 +224,14 @@ void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable) struct hibmc_dp_dev *dp_dev = dp->dp_dev; if (enable) { - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_VIDEO_CTRL, - HIBMC_DP_CFG_MST_ENABLE, 0x1); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_VIDEO_CTRL, BIT(0), 0x1); writel(HIBMC_DP_SYNC_EN_MASK, dp_dev->base + HIBMC_DP_TIMING_SYNC_CTRL); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_DPTX_GCTL0, - HIBMC_DP_CFG_TIMING_GEN_ENABLE, 0x1); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_DPTX_GCTL0, BIT(10), 0x1); writel(HIBMC_DP_SYNC_EN_MASK, dp_dev->base + HIBMC_DP_TIMING_SYNC_CTRL); } else { - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_DPTX_GCTL0, - HIBMC_DP_CFG_TIMING_GEN_ENABLE, 0); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_DPTX_GCTL0, BIT(10), 0); writel(HIBMC_DP_SYNC_EN_MASK, dp_dev->base + HIBMC_DP_TIMING_SYNC_CTRL); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_VIDEO_CTRL, HIBMC_DP_CFG_MST_ENABLE, 0); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_VIDEO_CTRL, BIT(0), 0); writel(HIBMC_DP_SYNC_EN_MASK, dp_dev->base + HIBMC_DP_TIMING_SYNC_CTRL); } @@ -258,36 +257,10 @@ int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode) return 0; } -u8 hibmc_dp_get_link_rate(struct hibmc_dp *dp) -{ - if (!dp->dp_dev) - return 0; - - return dp->dp_dev->link.cap.link_rate; -} - -u8 hibmc_dp_get_lanes(struct hibmc_dp *dp) -{ - if (!dp->dp_dev) - return 0; - - return dp->dp_dev->link.cap.lanes; -} - -int hibmc_dp_get_dpcd(struct hibmc_dp *dp) -{ - if (!dp->dp_dev) - return 0; - - return dp->dp_dev->link.cap.rx_dpcd_revision; -} - void hibmc_dp_reset_link(struct hibmc_dp *dp) { - if (dp->dp_dev) { - dp->dp_dev->link.status.clock_recovered = false; - dp->dp_dev->link.status.channel_equalized = false; - } + dp->dp_dev->link.status.clock_recovered = false; + dp->dp_dev->link.status.channel_equalized = false; } static const struct hibmc_dp_color_raw g_rgb_raw[] = { @@ -309,30 +282,26 @@ void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg) struct hibmc_dp_color_raw raw_data; if (cfg->enable) { - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_TIMING_SEL_M, cfg->self_timing); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_CTRL_M, cfg->dynamic_rate); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, BIT(9), + cfg->self_timing); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, GENMASK(8, 1), + cfg->dynamic_rate); if (cfg->pattern == CBAR_COLOR_BAR) { - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_PATTERN_SEL_M, 0); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, BIT(10), 0); } else { raw_data = g_rgb_raw[cfg->pattern]; drm_dbg_dp(dp->drm_dev, "r:%x g:%x b:%x\n", raw_data.r_value, raw_data.g_value, raw_data.b_value); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_PATTERN_SEL_M, 1); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_DATA_R_M, raw_data.r_value); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL1, - HIBMC_DP_COLOR_BAR_DATA_G_M, raw_data.g_value); - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL1, - HIBMC_DP_COLOR_BAR_DATA_B_M, raw_data.b_value); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, BIT(10), 1); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, GENMASK(23, 12), + raw_data.r_value); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL1, GENMASK(23, 12), + raw_data.g_value); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL1, GENMASK(11, 0), + raw_data.b_value); } } - hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, - HIBMC_DP_COLOR_BAR_ENABLE_M, cfg->enable); + hibmc_dp_reg_write_field(dp_dev, HIBMC_DP_COLOR_BAR_CTRL, BIT(0), cfg->enable); writel(HIBMC_DP_SYNC_EN_MASK, dp_dev->base + HIBMC_DP_TIMING_SYNC_CTRL); } - diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h index 4740db06e1b0..f55d78d266f2 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h @@ -12,10 +12,6 @@ #include <drm/drm_print.h> #include <drm/drm_dp_helper.h> -// 27 * 10000000 * 80% = 216000000 -#define DP_MODE_VALI_CAL 216000000 -#define BPP_24 24 - struct hibmc_dp_dev; enum hibmc_dp_cbar_pattern { @@ -55,16 +51,11 @@ struct hibmc_dp { struct hibmc_dp_cbar_cfg cfg; u32 irq_status; int hpd_status; - bool is_connected; }; int hibmc_dp_hw_init(struct hibmc_dp *dp); int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode); void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable); -struct edid *hibmc_dp_get_edid(struct hibmc_dp *dp); -int hibmc_dp_get_dpcd(struct hibmc_dp *dp); -u8 hibmc_dp_get_link_rate(struct hibmc_dp *dp); -u8 hibmc_dp_get_lanes(struct hibmc_dp *dp); void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg); void hibmc_dp_reset_link(struct hibmc_dp *dp); void hibmc_dp_hpd_cfg(struct hibmc_dp *dp); diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c index 9b632428fec6..c3e648e2f1a8 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c @@ -39,14 +39,6 @@ static int hibmc_dp_link_training_configure(struct hibmc_dp_dev *dp) /* enhanced frame */ hibmc_dp_reg_write_field(dp, HIBMC_DP_VIDEO_CTRL, HIBMC_DP_CFG_STREAM_FRAME_MODE, 0x1); - ret = hibmc_dp_get_serdes_rate_cfg(dp); - if (ret < 0) - return ret; - - ret = hibmc_dp_serdes_rate_switch(ret, dp); - if (ret) - return ret; - /* set rate and lane count */ buf[0] = dp->link.cap.link_rate; buf[1] = DP_LANE_COUNT_ENHANCED_FRAME_EN | dp->link.cap.lanes; @@ -209,23 +201,21 @@ static int hibmc_dp_link_training_cr(struct hibmc_dp_dev *dp) bool level_changed; u32 voltage_tries; u32 cr_tries; - u32 max_cr; int ret; /* * DP 1.4 spec define 10 for maxtries value, for pre DP 1.4 version set a limit of 80 * (4 voltage levels x 4 preemphasis levels x 5 identical voltage retries) */ - max_cr = dp->link.cap.rx_dpcd_revision >= DP_DPCD_REV_14 ? 10 : 80; voltage_tries = 1; - for (cr_tries = 0; cr_tries < max_cr; cr_tries++) { + for (cr_tries = 0; cr_tries < 80; cr_tries++) { drm_dp_link_train_clock_recovery_delay(dp->dpcd); ret = drm_dp_dpcd_read_link_status(dp->aux, lane_status); if (ret != DP_LINK_STATUS_SIZE) { - drm_err(dp->dev, "Get lane status failed, ret: %d\n", ret); - return ret >= 0 ? -EIO : ret; + drm_err(dp->dev, "Get lane status failed\n"); + return ret; } if (drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) { @@ -256,7 +246,7 @@ static int hibmc_dp_link_training_cr(struct hibmc_dp_dev *dp) voltage_tries = level_changed ? 1 : voltage_tries + 1; } - drm_err(dp->dev, "dp link training clock recovery %u timers failed\n", max_cr); + drm_err(dp->dev, "dp link training clock recovery 80 times failed\n"); dp->link.status.clock_recovered = false; return 0; @@ -266,17 +256,9 @@ static int hibmc_dp_link_training_channel_eq(struct hibmc_dp_dev *dp) { u8 lane_status[DP_LINK_STATUS_SIZE] = {0}; u8 eq_tries; - int tps; int ret; - if (dp->link.cap.is_tps4) - tps = DP_TRAINING_PATTERN_4; - else if (dp->link.cap.is_tps3) - tps = DP_TRAINING_PATTERN_3; - else - tps = DP_TRAINING_PATTERN_2; - - ret = hibmc_dp_link_set_pattern(dp, tps); + ret = hibmc_dp_link_set_pattern(dp, DP_TRAINING_PATTERN_2); if (ret) return ret; @@ -306,7 +288,7 @@ static int hibmc_dp_link_training_channel_eq(struct hibmc_dp_dev *dp) ret = hibmc_dp_serdes_set_tx_cfg(dp, dp->link.train_set); if (ret) - break; + return ret; ret = drm_dp_dpcd_write(dp->aux, DP_TRAINING_LANE0_SET, dp->link.train_set, dp->link.cap.lanes); @@ -335,17 +317,7 @@ static int hibmc_dp_link_downgrade_training_cr(struct hibmc_dp_dev *dp) static int hibmc_dp_link_downgrade_training_eq(struct hibmc_dp_dev *dp) { - u8 status[DP_LINK_STATUS_SIZE] = {0}; - int ret; - - ret = drm_dp_dpcd_read_link_status(dp->aux, status); - if (ret != DP_LINK_STATUS_SIZE) { - drm_err(dp->dev, "get lane status failed\n"); - return ret >= 0 ? -EIO : ret; - } - - if ((dp->link.status.clock_recovered && !dp->link.status.channel_equalized) || - (status[0] != 0 && !dp->link.status.clock_recovered)) { // at least one cr_done + if ((dp->link.status.clock_recovered && !dp->link.status.channel_equalized)) { if (!hibmc_dp_link_reduce_lane(dp)) return 0; } @@ -353,20 +325,6 @@ static int hibmc_dp_link_downgrade_training_eq(struct hibmc_dp_dev *dp) return hibmc_dp_link_reduce_rate(dp); } -static void hibmc_dp_update_caps(struct hibmc_dp_dev *dp) -{ - dp->link.cap.rx_dpcd_revision = dp->dpcd[DP_DPCD_REV]; - - dp->link.cap.is_tps3 = (dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_13) && - (dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED); - dp->link.cap.is_tps4 = (dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) && - (dp->dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED); - dp->link.cap.link_rate = dp->dpcd[DP_MAX_LINK_RATE]; - dp->link.cap.lanes = dp->dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; - if (dp->link.cap.lanes > HIBMC_DP_LANE_NUM_MAX) - dp->link.cap.lanes = HIBMC_DP_LANE_NUM_MAX; -} - int hibmc_dp_link_training(struct hibmc_dp_dev *dp) { struct hibmc_dp_link *link = &dp->link; @@ -376,7 +334,16 @@ int hibmc_dp_link_training(struct hibmc_dp_dev *dp) if (ret) drm_err(dp->dev, "dp aux read dpcd failed, ret: %d\n", ret); - hibmc_dp_update_caps(dp); + dp->link.cap.link_rate = dp->dpcd[DP_MAX_LINK_RATE]; + dp->link.cap.lanes = 0x2; + + ret = hibmc_dp_get_serdes_rate_cfg(dp); + if (ret < 0) + return ret; + + ret = hibmc_dp_serdes_rate_switch(ret, dp); + if (ret) + return ret; while (true) { ret = hibmc_dp_link_training_cr_pre(dp); diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h index 156e5d63c47f..394b1e933c3a 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h @@ -68,14 +68,8 @@ #define HIBMC_DP_CFG_STREAM_HBLANK_SIZE GENMASK(15, 0) #define HIBMC_DP_COLOR_BAR_CTRL 0x260 -#define HIBMC_DP_COLOR_BAR_ENABLE_M BIT(0) -#define HIBMC_DP_COLOR_BAR_CTRL_M GENMASK(8, 1) -#define HIBMC_DP_COLOR_BAR_TIMING_SEL_M BIT(9) -#define HIBMC_DP_COLOR_BAR_PATTERN_SEL_M BIT(10) -#define HIBMC_DP_COLOR_BAR_DATA_R_M GENMASK(23, 12) #define HIBMC_DP_COLOR_BAR_CTRL1 0x264 -#define HIBMC_DP_COLOR_BAR_DATA_B_M GENMASK(11, 0) -#define HIBMC_DP_COLOR_BAR_DATA_G_M GENMASK(23, 12) + #define HIBMC_DP_TIMING_GEN_CONFIG0 0x26c #define HIBMC_DP_CFG_TIMING_GEN0_HACTIVE GENMASK(31, 16) #define HIBMC_DP_CFG_TIMING_GEN0_HBLANK GENMASK(15, 0) @@ -96,8 +90,6 @@ #define HIBMC_DP_DPTX_GCTL0 0x708 #define HIBMC_DP_CFG_PHY_LANE_NUM GENMASK(2, 1) -#define HIBMC_DP_CFG_TIMING_GEN_ENABLE BIT(10) -#define HIBMC_DP_CFG_MST_ENABLE BIT(0) #define HIBMC_DP_INTR_ENABLE 0x720 #define HIBMC_DP_INTR_ORIGINAL_STATUS 0x728 diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c index 8191233aa965..676059d4c1e6 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c @@ -57,3 +57,15 @@ int hibmc_dp_serdes_rate_switch(u8 rate, struct hibmc_dp_dev *dp) return 0; } + +int hibmc_dp_serdes_init(struct hibmc_dp_dev *dp) +{ + dp->serdes_base = dp->base + HIBMC_DP_HOST_OFFSET; + + writel(FIELD_PREP(HIBMC_DP_PMA_TXDEEMPH, DP_SERDES_VOL0_PRE0), + dp->serdes_base + HIBMC_DP_PMA_LANE0_OFFSET); + writel(FIELD_PREP(HIBMC_DP_PMA_TXDEEMPH, DP_SERDES_VOL0_PRE0), + dp->serdes_base + HIBMC_DP_PMA_LANE1_OFFSET); + + return hibmc_dp_serdes_rate_switch(DP_SERDES_BW_8_1, dp); +} diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c index 6c6ff3255d15..83d2cd48f81c 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c @@ -15,44 +15,6 @@ #define MAX_BUF_SIZE 12 -static int hibmc_dp_show(struct seq_file *m, void *arg) -{ - struct drm_info_node *node = m->private; - struct drm_device *dev = node->minor->dev; - struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); - int idx, rate; - - if (!drm_dev_enter(dev, &idx)) - return -ENODEV; - - switch (hibmc_dp_get_link_rate(&priv->dp)) { - case 0x1e: - rate = 810; // 8.1Gbps - break; - case 0x14: - rate = 540; // 5.4Gbps - break; - case 0xA: - rate = 270; // 2.7Gbps - break; - case 0x6: - rate = 162; // 1.62Gbps - break; - default: - rate = 0; - } - - seq_printf(m, "enable lanes: %u\n", hibmc_dp_get_lanes(&priv->dp)); - seq_printf(m, "link rate: %d\n", rate); - seq_printf(m, "vfresh: %d\n", drm_mode_vrefresh(&priv->crtc.mode)); - seq_printf(m, "dpcd version: 0x%x\n", hibmc_dp_get_dpcd(&priv->dp)); - seq_printf(m, "hpd status: %d\n", priv->dp.hpd_status); - - drm_dev_exit(idx); - - return 0; -} - static ssize_t hibmc_control_write(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos) { @@ -131,19 +93,12 @@ static const struct file_operations hibmc_dbg_fops = { .release = single_release, }; -static struct drm_info_list hibmc_debugfs_list[] = { - { "hibmc-dp", hibmc_dp_show }, -}; - void hibmc_debugfs_init(struct drm_connector *connector, struct dentry *root) { struct drm_device *dev = connector->dev; struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); - struct drm_minor *minor = dev->primary; /* create the file in drm directory, so we don't need to remove manually */ - debugfs_create_file("colorbar-cfg", 0200, root, priv, &hibmc_dbg_fops); - - drm_debugfs_create_files(hibmc_debugfs_list, ARRAY_SIZE(hibmc_debugfs_list), - minor->debugfs_root, minor); + debugfs_create_file("colorbar-cfg", 0200, + root, priv, &hibmc_dbg_fops); } diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c index ae6f5c235e02..c2cda042c736 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c @@ -11,7 +11,6 @@ #include <drm/drm_edid.h> #include "hibmc_drm_drv.h" -#include "hibmc_drm_regs.h" #include "dp/dp_hw.h" #define HIBMC_DP_MASKED_SINK_HPD_PLUG_INT BIT(2) @@ -20,56 +19,14 @@ static int hibmc_dp_connector_get_modes(struct drm_connector *connector) { int count; - struct hibmc_dp *dp = to_hibmc_dp(connector); - struct edid *edid; - - - edid = drm_get_edid(connector, &dp->aux.ddc); - if (edid) { - drm_connector_update_edid_property(connector, edid); - count = drm_add_edid_modes(connector, edid); - if (count) { - dp->is_connected = true; - goto out; - } - } - - - dp->is_connected = false; count = drm_add_modes_noedid(connector, connector->dev->mode_config.max_width, connector->dev->mode_config.max_height); drm_set_preferred_mode(connector, 1024, 768); // temporary implementation -out: - kfree(edid); - return count; } -static int hibmc_dp_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode, - struct drm_modeset_acquire_ctx *ctx, - enum drm_mode_status *status) -{ - struct hibmc_dp *dp = to_hibmc_dp(connector); - u64 cur_val, max_val; - - if (!dp->is_connected) { - *status = MODE_OK; - return 0; - } - - cur_val = (u64)mode->htotal * mode->vtotal * drm_mode_vrefresh(mode) * BPP_24; - max_val = (u64)hibmc_dp_get_link_rate(dp) * DP_MODE_VALI_CAL * hibmc_dp_get_lanes(dp); - if (cur_val > max_val) - *status = MODE_CLOCK_HIGH; - else - *status = MODE_OK; - - return 0; -} - static int hibmc_dp_detect(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force) { @@ -83,7 +40,6 @@ static int hibmc_dp_detect(struct drm_connector *connector, static const struct drm_connector_helper_funcs hibmc_dp_conn_helper_funcs = { .get_modes = hibmc_dp_connector_get_modes, - .mode_valid_ctx = hibmc_dp_mode_valid, .detect_ctx = hibmc_dp_detect, }; @@ -148,26 +104,9 @@ static void hibmc_dp_encoder_disable(struct drm_encoder *drm_encoder, hibmc_dp_display_en(dp, false); } -static void hibmc_dp_encoder_mode_set(struct drm_encoder *encoder, - struct drm_crtc_state *crtc_state, - struct drm_connector_state *conn_state) -{ - u32 reg; - struct drm_device *dev = encoder->dev; - struct hibmc_drm_private *priv = to_hibmc_drm_private(dev); - - reg = readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); - reg |= HIBMC_DISPLAY_CONTROL_FPVDDEN(1); - reg |= HIBMC_DISPLAY_CONTROL_PANELDATE(1); - reg |= HIBMC_DISPLAY_CONTROL_FPEN(1); - reg |= HIBMC_DISPLAY_CONTROL_VBIASEN(1); - writel(reg, priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE); -} - static const struct drm_encoder_helper_funcs hibmc_dp_encoder_helper_funcs = { .atomic_enable = hibmc_dp_encoder_enable, .atomic_disable = hibmc_dp_encoder_disable, - .atomic_mode_set = hibmc_dp_encoder_mode_set, }; static const struct drm_encoder_funcs hibmc_encoder_funcs = { @@ -191,8 +130,6 @@ irqreturn_t hibmc_dp_hpd_isr(int irq, void *arg) dp->hpd_status = 0; if (dev->registered) drm_helper_hpd_irq_event(dev); - } else { - drm_dbg_dp(dev, "HPD OUT occur but err!\n"); } } else { if (dp->irq_status & HIBMC_DP_MASKED_SINK_HPD_PLUG_INT) { @@ -201,8 +138,6 @@ irqreturn_t hibmc_dp_hpd_isr(int irq, void *arg) dp->hpd_status = 1; if (dev->registered) drm_helper_hpd_irq_event(dev); - } else { - drm_dbg_dp(dev, "HPD IN occur but err!\n"); } } diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c index b9398a78c26c..147354daed84 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c @@ -20,7 +20,6 @@ #include <drm/drm_irq.h> #include <drm/drm_managed.h> #include <drm/drm_vblank.h> -#include <drm/drm_probe_helper.h> #include "hibmc_drm_drv.h" #include "hibmc_drm_regs.h" @@ -120,7 +119,7 @@ static int hibmc_kms_init(struct hibmc_drm_private *priv) ret = hibmc_de_init(priv); if (ret) { drm_err(priv->dev, "failed to init de: %d\n", ret); - goto err; + return ret; } /* @@ -130,25 +129,17 @@ static int hibmc_kms_init(struct hibmc_drm_private *priv) ret = readl(priv->mmio + HIBMC_DP_HOST_SERDES_CTRL); if (ret) { ret = hibmc_dp_init(priv); - if (ret) { + if (ret) drm_err(priv->dev, "failed to init dp: %d\n", ret); - goto err; - } } ret = hibmc_vdac_init(priv); if (ret) { drm_err(priv->dev, "failed to init vdac: %d\n", ret); - goto err; + return ret; } - drm_kms_helper_poll_init(priv->dev); return 0; - -err: - drm_atomic_helper_shutdown(priv->dev); - - return ret; } static void hibmc_kms_fini(struct hibmc_drm_private *priv) @@ -300,7 +291,6 @@ static int hibmc_hw_init(struct hibmc_drm_private *priv) static void hibmc_unload(struct drm_device *dev) { drm_atomic_helper_shutdown(dev); - drm_kms_helper_poll_fini(dev); } static int hibmc_msi_init(struct drm_device *dev) @@ -355,19 +345,21 @@ static int hibmc_load(struct drm_device *dev) priv->dev = dev; ret = hibmc_hw_init(priv); - if (ret) - return ret; + if (ret) { + drm_err(dev, "failed to initialize hardware: %d\n", ret); + goto err_alloc; + } ret = hibmc_mm_init(priv); if (ret) { - drm_err(dev, "Error initializing VRAM MM; %d\n", ret); - return ret; + drm_err(dev, "failed to initialize mm: %d\n", ret); + goto err_hw; } ret = hibmc_kms_init(priv); if (ret) { - drm_err(dev, "hibmc kms init failed, ret:%d\n", ret); - return ret; + drm_err(dev, "failed to initialize kms: %d\n", ret); + goto err_mm; } ret = drm_vblank_init(dev, dev->mode_config.num_crtc); @@ -389,8 +381,11 @@ static int hibmc_load(struct drm_device *dev) err_kms: hibmc_kms_fini(priv); +err_mm: hibmc_mm_fini(priv); +err_hw: hibmc_hw_unmap(priv); +err_alloc: dev->dev_private = NULL; return ret; @@ -400,7 +395,6 @@ static int hibmc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct drm_device *dev; - struct hibmc_drm_private *priv; int ret; ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, @@ -440,9 +434,6 @@ static int hibmc_pci_probe(struct pci_dev *pdev, drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth); - priv = to_hibmc_drm_private(dev); - hibmc_debugfs_init(&priv->dp.connector, dev->primary->debugfs_root); - return 0; err_unload: diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h index 617585268009..0b0addca37f9 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h @@ -79,7 +79,6 @@ void hibmc_mm_fini(struct hibmc_drm_private *hibmc); int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args); int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_vdac *connector); -void hibmc_ddc_del(struct hibmc_vdac *vdac); int hibmc_dp_init(struct hibmc_drm_private *priv); extern const struct drm_mode_config_funcs hibmc_mode_funcs; diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c index 2e0fcd2b3bc1..4f801c0fbd96 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c @@ -96,8 +96,3 @@ int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_vdac *vdac) return i2c_bit_add_bus(&vdac->adapter); } - -void hibmc_ddc_del(struct hibmc_vdac *vdac) -{ - i2c_del_adapter(&vdac->adapter); -} diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c index 9c0ec6e54df0..f183dd819daf 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c @@ -88,7 +88,7 @@ static enum drm_mode_status hibmc_connector_mode_valid( return hibmc_valid_mode(mode->hdisplay, mode->vdisplay); } -static void hibmc_vdac_connector_destroy(struct drm_connector *connector) +static void hibmc_connector_destroy(struct drm_connector *connector) { struct hibmc_vdac *vdac = to_hibmc_vdac(connector); @@ -130,7 +130,7 @@ static void hibmc_vdac_force(struct drm_connector *connector) static const struct drm_connector_funcs hibmc_connector_funcs = { .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = hibmc_vdac_connector_destroy, + .destroy = hibmc_connector_destroy, .reset = drm_atomic_helper_connector_reset, .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, @@ -180,7 +180,7 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv) DRM_MODE_ENCODER_DAC, NULL); if (ret) { drm_err(dev, "failed to init encoder: %d\n", ret); - goto err; + return ret; } drm_encoder_helper_add(encoder, &hibmc_encoder_helper_funcs); @@ -191,7 +191,7 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv) &vdac->adapter); if (ret) { drm_err(dev, "failed to init connector: %d\n", ret); - goto err; + return ret; } drm_connector_helper_add(connector, &hibmc_connector_helper_funcs); @@ -200,9 +200,4 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv) connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; return 0; - -err: - hibmc_ddc_del(vdac); - - return ret; } -- 2.34.1