tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 2fbde46db56e8457b2be7c09997f5da4757823c3 commit: 24045785bc7c2f64eaecaf8fdbeb88edda892cc3 [2248/2248] drm/amdgpu: Fix pcie order dislocation config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20250519/202505191456.gDWxN0oB-lkp@i...) compiler: loongarch64-linux-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250519/202505191456.gDWxN0oB-lkp@i...) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202505191456.gDWxN0oB-lkp@intel.com/ All warnings (new ones prefixed by >>): drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c: In function 'amdgpu_ih_handle_fix_work':
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:256:21: warning: unused variable 'ring_index' [-Wunused-variable] 256 | u32 ring_index = adev->irq.ih.rptr >> 2; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:244:13: warning: variable 'restart_fg' set but not used [-Wunused-but-set-variable] 244 | int restart_fg = 0; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:240:32: warning: unused variable 'entry' [-Wunused-variable] 240 | struct amdgpu_iv_entry entry; | ^~~~~
vim +/ring_index +256 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c 234 235 static void amdgpu_ih_handle_fix_work(struct work_struct *work) 236 { 237 struct amdgpu_device *adev = 238 container_of(work, struct amdgpu_device, irq.ih.fix_work); 239 struct amdgpu_ih_ring *ih = &adev->irq.ih;
240 struct amdgpu_iv_entry entry; 241 242 u32 wptr; 243 u32 old_rptr; 244 int restart_fg = 0; 245 246 restart: 247 248 wptr = amdgpu_ih_get_wptr(adev, ih); 249 /* Order reading of wptr vs. reading of IH ring data */ 250 rmb(); 251 252 old_rptr = ih->rptr; 253 amdgpu_ih_fix_loongarch_pcie_order_start(&adev->irq.ih, old_rptr, wptr, true); 254 255 while (adev->irq.ih.rptr != wptr) { 256 u32 ring_index = adev->irq.ih.rptr >> 2; 257 258 amdgpu_irq_dispatch(adev, ih); 259 ih->rptr &= ih->ptr_mask; 260 } 261 262 amdgpu_ih_fix_loongarch_pcie_order_end(&adev->irq.ih, old_rptr, adev->irq.ih.rptr); 263 264 amdgpu_ih_set_rptr(adev, ih); 265 /* memory barrier for setting rptr */ 266 mb(); 267 268 if (ih->rptr != amdgpu_ih_get_wptr(adev, ih)) { 269 restart_fg = 1; 270 goto restart; 271 } 272 273 atomic_set(&adev->irq.cs_lock, 0); 274 } 275 #endif 276
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