[PATCH OLK-6.6 0/6] LoongArch: add PCA953X/2K3000 GMAC/IGC netcard/NR_CPUS=2048/SCHED_MC support
Tianyang Zhang (2): LoongArch: Prevent cond_resched() occurring within kernel-fpu LoongArch: Add SCHED_MC (Multi-core scheduler) support wanghongliang (4): LoongArch: CONFIG_NR_CPUS expanded to 2048 LoongArch: Enable IGC driver LoongArch: Enable GPIO_PCA953X driver LoongArch: 2K3000 GMAC support. arch/loongarch/Kconfig | 16 ++- arch/loongarch/configs/loongson3_defconfig | 3 +- arch/loongarch/include/asm/smp.h | 1 + arch/loongarch/include/asm/topology.h | 9 ++ arch/loongarch/kernel/kfpu.c | 22 ++++- arch/loongarch/kernel/smp.c | 38 +++++++ .../ethernet/stmicro/stmmac/dwmac-loongson.c | 98 +++++++++++-------- 7 files changed, 141 insertions(+), 46 deletions(-) -- 2.33.0
From: Tianyang Zhang <zhangtianyang@loongson.cn> linux-next inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?... -------------------------------- When CONFIG_PREEMPT_COUNT is not configured (i.e. CONFIG_PREEMPT_NONE/ CONFIG_PREEMPT_VOLUNTARY), preempt_disable() / preempt_enable() merely acts as a barrier(). However, in these cases cond_resched() can still trigger a context switch and modify the CSR.EUEN, resulting in do_fpu() exception being activated within the kernel-fpu critical sections, as demonstrated in the following path: dcn32_calculate_wm_and_dlg() DC_FP_START() dcn32_calculate_wm_and_dlg_fpu() dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() dcn32_internal_validate_bw() dcn32_enable_phantom_stream() dc_create_stream_for_sink() kzalloc(GFP_KERNEL) __kmem_cache_alloc_node() __cond_resched() DC_FP_END() This patch is similar to commit d021985 (x86/fpu: Improve crypto performance by making kernel-mode FPU reliably usable in softirqs). It uses local_bh_disable() instead of preempt_disable() for non-RT kernels so it can avoid the cond_resched() issue, and also extend the kernel-fpu application scenarios to the softirq context. Cc: stable@vger.kernel.org Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Change-Id: I510288d7a06ebe3195b0e4a0d4b6a24591a46b20 --- arch/loongarch/kernel/kfpu.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/loongarch/kernel/kfpu.c b/arch/loongarch/kernel/kfpu.c index ec5b28e570c9..4e469b021cf4 100644 --- a/arch/loongarch/kernel/kfpu.c +++ b/arch/loongarch/kernel/kfpu.c @@ -18,11 +18,28 @@ static unsigned int euen_mask = CSR_EUEN_FPEN; static DEFINE_PER_CPU(bool, in_kernel_fpu); static DEFINE_PER_CPU(unsigned int, euen_current); +static inline void fpregs_lock(void) +{ + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) + local_bh_disable(); + else + preempt_disable(); +} + +static inline void fpregs_unlock(void) +{ + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) + local_bh_enable(); + else + preempt_enable(); +} + void kernel_fpu_begin(void) { unsigned int *euen_curr; - preempt_disable(); + if (!irqs_disabled()) + fpregs_lock(); WARN_ON(this_cpu_read(in_kernel_fpu)); @@ -73,7 +90,8 @@ void kernel_fpu_end(void) this_cpu_write(in_kernel_fpu, false); - preempt_enable(); + if (!irqs_disabled()) + fpregs_unlock(); } EXPORT_SYMBOL_GPL(kernel_fpu_end); -- 2.33.0
From: wanghongliang <wanghongliang@loongson.cn> LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA -------------------------------- Extend NR_CPUS to 2048 to enable machines with more CPU cores to run normally. Change-Id: I09fd711ade949268365a7566a424e4c6e77abddb Signed-off-by: wanghongliang <wanghongliang@loongson.cn> Signed-off-by: Hongchen Zhang <zhanghongchen@loongson.cn> --- arch/loongarch/Kconfig | 7 ++++--- arch/loongarch/configs/loongson3_defconfig | 1 - 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index 4a021d86fc57..fa47efea7a13 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -184,6 +184,7 @@ config LOONGARCH select USE_PERCPU_NUMA_NODE_ID select USER_STACKTRACE_SUPPORT select ZONE_DMA32 + select CPUMASK_OFFSTACK if NR_CPUS > 256 config 32BIT bool @@ -447,10 +448,10 @@ config HOTPLUG_CPU Say N if you want to disable CPU hotplug. config NR_CPUS - int "Maximum number of CPUs (2-256)" - range 2 256 + int "Maximum number of CPUs (2-2048)" + range 2 2048 depends on SMP - default "64" + default "2048" help This allows you to specify the maximum number of CPUs which this kernel will support. diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig index 106b2029211b..80fec5a81047 100644 --- a/arch/loongarch/configs/loongson3_defconfig +++ b/arch/loongarch/configs/loongson3_defconfig @@ -42,7 +42,6 @@ CONFIG_KEXEC=y CONFIG_CRASH_DUMP=y CONFIG_CMDLINE="vfio_iommu_type1.allow_unsafe_interrupts=1 nokaslr" CONFIG_CMDLINE_EXTEND=y -CONFIG_NR_CPUS=256 CONFIG_NUMA=y CONFIG_ARCH_IOREMAP=y CONFIG_CPU_HAS_LSX=y -- 2.33.0
From: wanghongliang <wanghongliang@loongson.cn> LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA -------------------------------- support intel i225/i226 network card driver. Signed-off-by: wanghongliang <wanghongliang@loongson.cn> Change-Id: Ia9dc7347fbcfb70f800ea85488aa8d47243939a4 Signed-off-by: Hongchen Zhang <zhanghongchen@loongson.cn> --- arch/loongarch/configs/loongson3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig index 80fec5a81047..9afb401b23d8 100644 --- a/arch/loongarch/configs/loongson3_defconfig +++ b/arch/loongarch/configs/loongson3_defconfig @@ -846,6 +846,7 @@ CONFIG_I40E_DCB=y CONFIG_I40EVF=m CONFIG_ICE=m CONFIG_FM10K=m +CONFIG_IGC=m # CONFIG_NET_VENDOR_MARVELL is not set CONFIG_MLX4_EN=m # CONFIG_MLX4_CORE_GEN2 is not set -- 2.33.0
From: wanghongliang <wanghongliang@loongson.cn> LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA -------------------------------- Enable gpio-pca953x driver. Signed-off-by: wanghongliang <wanghongliang@loongson.cn> Change-Id: I98b0e70b0f44274f2f2c89bd05b143ee08fe64f9 Signed-off-by: Hongchen Zhang <zhanghongchen@loongson.cn> --- arch/loongarch/configs/loongson3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig index 9afb401b23d8..6844a6c59de6 100644 --- a/arch/loongarch/configs/loongson3_defconfig +++ b/arch/loongarch/configs/loongson3_defconfig @@ -1179,6 +1179,7 @@ CONFIG_PINCTRL_LOONGSON2=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_AMDPT=m CONFIG_GPIO_LOONGSON_64BIT=y +CONFIG_GPIO_PCA953X=m CONFIG_GPIO_VIPERBOARD=m CONFIG_POWER_RESET=y CONFIG_SENSORS_AD7414=m -- 2.33.0
From: Tianyang Zhang <zhangtianyang@loongson.cn> LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA -------------------------------- In order to achieve more reasonable load balancing behavior, add SCHED_MC (Multi-core scheduler) support. The LLC distribution of LoongArch now is consistent with NUMA node, the balancing domain of SCHED_MC can effectively reduce the situation where processes are awakened to smt_sibling. Co-developed-by: Hongliang Wang <wanghongliang@loongson.cn> Signed-off-by: Hongliang Wang <wanghongliang@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Hongchen Zhang <zhanghongchen@loongson.cn> --- arch/loongarch/Kconfig | 9 +++++++ arch/loongarch/include/asm/smp.h | 1 + arch/loongarch/include/asm/topology.h | 9 +++++++ arch/loongarch/kernel/smp.c | 38 +++++++++++++++++++++++++++ 4 files changed, 57 insertions(+) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index fa47efea7a13..8739e15c137b 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -420,6 +420,15 @@ config SCHED_SMT Improves scheduler's performance when there are multiple threads in one physical core. +config SCHED_MC + bool "Multi-core scheduler support" + depends on SMP + default y + help + Multi-core scheduler support improves the CPU scheduler's decision + making when dealing with multi-core CPU chips at a cost of slightly + increased overhead in some places. + config SMP bool "Multi-Processing support" help diff --git a/arch/loongarch/include/asm/smp.h b/arch/loongarch/include/asm/smp.h index 630e5ebec21c..06a0ca03d2ce 100644 --- a/arch/loongarch/include/asm/smp.h +++ b/arch/loongarch/include/asm/smp.h @@ -23,6 +23,7 @@ extern int smp_num_siblings; extern int num_processors; extern int disabled_cpus; extern cpumask_t cpu_sibling_map[]; +extern cpumask_t cpu_llc_shared_map[]; extern cpumask_t cpu_core_map[]; extern cpumask_t cpu_foreign_map[]; diff --git a/arch/loongarch/include/asm/topology.h b/arch/loongarch/include/asm/topology.h index 379f5e4830eb..3b21a6d4f522 100644 --- a/arch/loongarch/include/asm/topology.h +++ b/arch/loongarch/include/asm/topology.h @@ -30,6 +30,15 @@ void numa_set_distance(int from, int to, int distance); #ifdef CONFIG_SMP extern unsigned int __max_packages; + +/* + * Return cpus that shares the last level cache. + */ +static inline const struct cpumask *cpu_coregroup_mask(int cpu) +{ + return &cpu_llc_shared_map[cpu]; +} + #define topology_max_packages() (__max_packages) #define topology_physical_package_id(cpu) (cpu_data[cpu].package) #define topology_core_id(cpu) (cpu_data[cpu].core) diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c index 7f693a24687d..5e9416106f42 100644 --- a/arch/loongarch/kernel/smp.c +++ b/arch/loongarch/kernel/smp.c @@ -45,6 +45,10 @@ EXPORT_SYMBOL(__cpu_logical_map); cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_sibling_map); +/* Representing the last level cache shared map of each logical CPU */ +cpumask_t cpu_llc_shared_map[NR_CPUS] __read_mostly; +EXPORT_SYMBOL(cpu_llc_shared_map); + /* Representing the core map of multi-core chips of each logical CPU */ cpumask_t cpu_core_map[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_core_map); @@ -62,6 +66,9 @@ EXPORT_SYMBOL(cpu_foreign_map); /* representing cpus for which sibling maps can be computed */ static cpumask_t cpu_sibling_setup_map; +/* representing cpus for which llc shared maps can be computed */ +static cpumask_t cpu_llc_shared_setup_map; + /* representing cpus for which core maps can be computed */ static cpumask_t cpu_core_setup_map; @@ -103,6 +110,34 @@ static inline void set_cpu_core_map(int cpu) } } +static inline void set_cpu_llc_shared_map(int cpu) +{ + int i; + + cpumask_set_cpu(cpu, &cpu_llc_shared_setup_map); + + for_each_cpu(i, &cpu_llc_shared_setup_map) { + if (cpu_to_node(cpu) == cpu_to_node(i)) { + cpumask_set_cpu(i, &cpu_llc_shared_map[cpu]); + cpumask_set_cpu(cpu, &cpu_llc_shared_map[i]); + } + } +} + +static inline void clear_cpu_llc_shared_map(int cpu) +{ + int i; + + for_each_cpu(i, &cpu_llc_shared_setup_map) { + if (cpu_to_node(cpu) == cpu_to_node(i)) { + cpumask_clear_cpu(i, &cpu_llc_shared_map[cpu]); + cpumask_clear_cpu(cpu, &cpu_llc_shared_map[i]); + } + } + + cpumask_clear_cpu(cpu, &cpu_llc_shared_setup_map); +} + static inline void set_cpu_sibling_map(int cpu) { int i; @@ -402,6 +437,7 @@ int loongson_cpu_disable(void) #endif set_cpu_online(cpu, false); clear_cpu_sibling_map(cpu); + clear_cpu_llc_shared_map(cpu); calculate_cpu_foreign_map(); local_irq_save(flags); fixup_irqs(); @@ -523,6 +559,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) current_thread_info()->cpu = 0; loongson_prepare_cpus(max_cpus); set_cpu_sibling_map(0); + set_cpu_llc_shared_map(0); set_cpu_core_map(0); calculate_cpu_foreign_map(); #ifndef CONFIG_HOTPLUG_CPU @@ -564,6 +601,7 @@ asmlinkage void start_secondary(void) loongson_init_secondary(); set_cpu_sibling_map(cpu); + set_cpu_llc_shared_map(cpu); set_cpu_core_map(cpu); notify_cpu_starting(cpu); -- 2.33.0
From: wanghongliang <wanghongliang@loongson.cn> LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC6CVG CVE: NA -------------------------------- Synchronize upstream patchs for 2K3000. Signed-off-by: wanghongliang <wanghongliang@loongson.cn> Change-Id: I3bb1d32174d8cca60bf5749292d139da0ceccb3e --- .../ethernet/stmicro/stmmac/dwmac-loongson.c | 98 +++++++++++-------- 1 file changed, 58 insertions(+), 40 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index 357d09656a7a..0bb4081c8c41 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -64,13 +64,15 @@ DMA_STATUS_TPS | DMA_STATUS_TI | \ DMA_STATUS_MSK_COMMON_LOONGSON) -#define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 +#define PCI_DEVICE_ID_LOONGSON_GMAC1 0x7a03 +#define PCI_DEVICE_ID_LOONGSON_GMAC2 0x7a23 #define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13 -#define LOONGSON_DWMAC_CORE_1_00 0x10 /* Loongson custom IP */ -#define CHANNEL_NUM 8 +#define DWMAC_CORE_MULTICHAN_V1 0x10 /* Loongson custom ID 0x10 */ +#define DWMAC_CORE_MULTICHAN_V2 0x12 /* Loongson custom ID 0x12 */ struct loongson_data { - u32 gmac_verion; + u32 multichan; + u32 loongson_id; struct device *dev; }; @@ -81,6 +83,8 @@ struct stmmac_pci_info { static void loongson_default_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct loongson_data *ld = plat->bsp_priv; + /* Get bus_id, this can be overloaded later */ plat->bus_id = (pci_domain_nr(pdev->bus) << 16) | PCI_DEVID(pdev->bus->number, pdev->devfn); @@ -114,6 +118,31 @@ static void loongson_default_data(struct pci_dev *pdev, plat->dma_cfg->pblx8 = true; plat->multicast_filter_bins = 256; + + switch (ld->loongson_id) { + case DWMAC_CORE_MULTICHAN_V1: + ld->multichan = 1; + plat->rx_queues_to_use = 8; + plat->tx_queues_to_use = 8; + + /* Only channel 0 supports checksum, + * so turn off checksum to enable multiple channels. + */ + for (int i = 1; i < 8; i++) + plat->tx_queues_cfg[i].coe_unsupported = 1; + + break; + case DWMAC_CORE_MULTICHAN_V2: + ld->multichan = 1; + plat->rx_queues_to_use = 4; + plat->tx_queues_to_use = 4; + break; + default: + ld->multichan = 0; + plat->tx_queues_to_use = 1; + plat->rx_queues_to_use = 1; + break; + } } static int loongson_gmac_data(struct pci_dev *pdev, @@ -336,9 +365,11 @@ static int loongson_dwmac_config_msi(struct pci_dev *pdev, struct stmmac_resources *res, struct device_node *np) { - int i, ret, vecs; + int i, ch_num, ret, vecs; + + ch_num = min(plat->tx_queues_to_use, plat->rx_queues_to_use); - vecs = roundup_pow_of_two(CHANNEL_NUM * 2 + 1); + vecs = roundup_pow_of_two(ch_num * 2 + 1); ret = pci_alloc_irq_vectors(pdev, vecs, vecs, PCI_IRQ_MSI); if (ret < 0) { dev_info(&pdev->dev, @@ -353,10 +384,10 @@ static int loongson_dwmac_config_msi(struct pci_dev *pdev, * --------- ----- -------- -------- ... -------- -------- * IRQ NUM | 0 | 1 | 2 | ... | 15 | 16 | */ - for (i = 0; i < CHANNEL_NUM; i++) { - res->rx_irq[CHANNEL_NUM - 1 - i] = + for (i = 0; i < ch_num; i++) { + res->rx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 1 + i * 2); - res->tx_irq[CHANNEL_NUM - 1 - i] = + res->tx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 2 + i * 2); } @@ -391,7 +422,7 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv) * AV feature and GMAC_INT_STATUS CSR flags layout. Get back the * original value so the correct HW-interface would be selected. */ - if (ld->gmac_verion == LOONGSON_DWMAC_CORE_1_00) { + if (ld->multichan) { priv->synopsys_id = DWMAC_CORE_3_70; *dma = dwmac1000_dma_ops; dma->init_chan = loongson_gnet_dma_init_channel; @@ -415,10 +446,10 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv) /* The GMAC devices with PCI ID 0x7a03 does not support any pause mode. * The GNET devices without CORE ID 0x10 does not support half-duplex. */ - if (pdev->device == PCI_DEVICE_ID_LOONGSON_GMAC) { + if (pdev->device != PCI_DEVICE_ID_LOONGSON_GNET) { mac->link.caps = MAC_10 | MAC_100 | MAC_1000; } else { - if (ld->gmac_verion == LOONGSON_DWMAC_CORE_1_00) + if (ld->multichan) mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000; else @@ -504,6 +535,15 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id pci_set_master(pdev); + plat->bsp_priv = ld; + plat->setup = loongson_dwmac_setup; + plat->fix_soc_reset = loongson_fix_soc_reset; + ld->dev = &pdev->dev; + + memset(&res, 0, sizeof(res)); + res.addr = pcim_iomap_table(pdev)[0]; + ld->loongson_id = readl(res.addr + GMAC_VERSION) & 0xff; + info = (struct stmmac_pci_info *)id->driver_data; ret = info->setup(pdev, plat); if (ret) @@ -529,35 +569,12 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id plat->phy_interface = phy_mode; } - plat->bsp_priv = ld; - plat->setup = loongson_dwmac_setup; - plat->fix_soc_reset = loongson_fix_soc_reset; - ld->dev = &pdev->dev; - - memset(&res, 0, sizeof(res)); - res.addr = pcim_iomap_table(pdev)[0]; - ld->gmac_verion = readl(res.addr + GMAC_VERSION) & 0xff; - - switch (ld->gmac_verion) { - case LOONGSON_DWMAC_CORE_1_00: - plat->rx_queues_to_use = CHANNEL_NUM; - plat->tx_queues_to_use = CHANNEL_NUM; - - /* Only channel 0 supports checksum, - * so turn off checksum to enable multiple channels. - */ - for (i = 1; i < CHANNEL_NUM; i++) - plat->tx_queues_cfg[i].coe_unsupported = 1; - + if (ld->multichan) ret = loongson_dwmac_config_msi(pdev, plat, &res, np); - break; - default: /* 0x35 device and 0x37 device. */ - plat->tx_queues_to_use = 1; - plat->rx_queues_to_use = 1; - + else ret = loongson_dwmac_config_legacy(pdev, plat, &res, np); - break; - } + if (ret) + goto err_disable_device; ret = stmmac_dvr_probe(&pdev->dev, plat, &res); if (ret) @@ -631,7 +648,8 @@ static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend, loongson_dwmac_resume); static const struct pci_device_id loongson_dwmac_id_table[] = { - { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) }, + { PCI_DEVICE_DATA(LOONGSON, GMAC1, &loongson_gmac_pci_info) }, + { PCI_DEVICE_DATA(LOONGSON, GMAC2, &loongson_gmac_pci_info) }, { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) }, {} }; -- 2.33.0
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