[PATCH OLK-6.6 0/2] To offer an option for turn off spectre-v2
option for turn off spectre-v2 Cui GaoSheng (1): ARM: use ldr_l to replace ldr instruction for the symbol jump GONG, Ruiqi (1): ARM: spectre-v2: turn off the mitigation via boot cmdline param arch/arm/include/asm/system_misc.h | 1 + arch/arm/mm/proc-v7-bugs.c | 18 ++++++++++++++++++ arch/arm/mm/proc-v7.S | 9 +++++++++ 3 files changed, 28 insertions(+) -- 2.25.1
From: "GONG, Ruiqi" <gongruiqi1@huawei.com> hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I8SE4Y ------------------------------------------------- We enable spectre mitigation by default for ARM32, which may cause performance regression. To offer an option to turn off this feature, implement a cmdline parameter 'nospectre_v2' compatible with mainline, which sets up a switch to skip invalidating BTB/icache for A9/A15 in context switching and user abort. Signed-off-by: GONG, Ruiqi <gongruiqi1@huawei.com> Signed-off-by: Yi Yang <yiyang13@huawei.com> --- arch/arm/include/asm/system_misc.h | 1 + arch/arm/mm/proc-v7-bugs.c | 18 ++++++++++++++++++ arch/arm/mm/proc-v7.S | 15 +++++++++++++++ 3 files changed, 34 insertions(+) diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h index 98b37340376b..4ca02f1927f7 100644 --- a/arch/arm/include/asm/system_misc.h +++ b/arch/arm/include/asm/system_misc.h @@ -36,6 +36,7 @@ static inline void harden_branch_predictor(void) #define UDBG_BUS (1 << 4) extern unsigned int user_debug; +extern int nospectre_v2; #endif /* !__ASSEMBLY__ */ diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c index 8bc7a2d6d6c7..996888c8505b 100644 --- a/arch/arm/mm/proc-v7-bugs.c +++ b/arch/arm/mm/proc-v7-bugs.c @@ -35,6 +35,19 @@ static int __maybe_unused spectre_v2_get_cpu_fw_mitigation_state(void) } #endif +/* + * 32-bit ARM spectre hardening, enabled by default, can be disabled via boot + * cmdline param 'nospectre_v2' to avoid performance regression. + */ +int nospectre_v2 __read_mostly; + +static int __init nospectre_v2_setup(char *str) +{ + nospectre_v2 = 1; + return 0; +} +early_param("nospectre_v2", nospectre_v2_setup); + #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR DEFINE_PER_CPU(harden_branch_predictor_fn_t, harden_branch_predictor_fn); @@ -68,6 +81,11 @@ static unsigned int spectre_v2_install_workaround(unsigned int method) const char *spectre_v2_method = NULL; int cpu = smp_processor_id(); + if (nospectre_v2) { + pr_info_once("Spectre v2: hardening is disabled\n"); + return; + } + if (per_cpu(harden_branch_predictor_fn, cpu)) return SPECTRE_MITIGATED; diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 193c7aeb6703..ceffc92755ae 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -113,17 +113,32 @@ ENTRY(cpu_v7_hvc_switch_mm) b cpu_v7_switch_mm ENDPROC(cpu_v7_hvc_switch_mm) #endif + +.globl nospectre_v2 ENTRY(cpu_v7_iciallu_switch_mm) + adr r3, 3f + ldr r3, [r3] + cmp r3, #1 + beq 1f mov r3, #0 mcr p15, 0, r3, c7, c5, 0 @ ICIALLU +1: b cpu_v7_switch_mm ENDPROC(cpu_v7_iciallu_switch_mm) ENTRY(cpu_v7_bpiall_switch_mm) + adr r3, 3f + ldr r3, [r3] + cmp r3, #1 + beq 1f mov r3, #0 mcr p15, 0, r3, c7, c5, 6 @ flush BTAC/BTB +1: b cpu_v7_switch_mm ENDPROC(cpu_v7_bpiall_switch_mm) + .align +3: .long nospectre_v2 + string cpu_v7_name, "ARMv7 Processor" .align -- 2.25.1
From: Cui GaoSheng <cuigaosheng1@huawei.com> hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4EF1O ----------------------------------------------------------------- ARM supports position independent code sequences that produce symbol references with a greater reach than the ordinary adr/ldr instructions, pseudo-instruction ldr_l is used to solve the symbol references problem, so we should use ldr_l to replace ldr instrutction when kaslr is enabled. Signed-off-by: Cui GaoSheng <cuigaosheng1@huawei.com> Signed-off-by: Yi Yang <yiyang13@huawei.com> --- arch/arm/mm/proc-v7.S | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index ceffc92755ae..d1bbbb5dae7d 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -114,10 +114,8 @@ ENTRY(cpu_v7_hvc_switch_mm) ENDPROC(cpu_v7_hvc_switch_mm) #endif -.globl nospectre_v2 ENTRY(cpu_v7_iciallu_switch_mm) - adr r3, 3f - ldr r3, [r3] + ldr_l r3, nospectre_v2 cmp r3, #1 beq 1f mov r3, #0 @@ -126,8 +124,7 @@ ENTRY(cpu_v7_iciallu_switch_mm) b cpu_v7_switch_mm ENDPROC(cpu_v7_iciallu_switch_mm) ENTRY(cpu_v7_bpiall_switch_mm) - adr r3, 3f - ldr r3, [r3] + ldr_l r3, nospectre_v2 cmp r3, #1 beq 1f mov r3, #0 @@ -136,9 +133,6 @@ ENTRY(cpu_v7_bpiall_switch_mm) b cpu_v7_switch_mm ENDPROC(cpu_v7_bpiall_switch_mm) - .align -3: .long nospectre_v2 - string cpu_v7_name, "ARMv7 Processor" .align -- 2.25.1
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