[PATCH OLK-6.6 0/2] stop_machine: mask pseudo nmi before running the callback
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*** BLURB HERE *** Wei Li (2): stop_machine: mask pseudo nmi before running the callback arm64: Fix wrong logic in gic_arch_restore_irqs() arch/arm64/include/asm/arch_gicv3.h | 11 +++++++++++ kernel/stop_machine.c | 3 +++ 2 files changed, 14 insertions(+) -- 2.34.1
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From: Wei Li <liwei391@huawei.com> hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8QBLL ---------------------------------------- Kprobes use 'stop_machine' to modify code which could be ran in the pseudo nmi context at the same time. This patch mask pseudo nmi before running the stop_machine callback to avoid this race condition. Signed-off-by: Wei Li <liwei391@huawei.com> Reviewed-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Cheng Jian <cj.chengjian@huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com> --- arch/arm64/include/asm/arch_gicv3.h | 12 ++++++++++++ kernel/stop_machine.c | 3 +++ 2 files changed, 15 insertions(+) diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 01281a5336cf..6429839f6563 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -190,6 +190,18 @@ static inline void gic_arch_enable_irqs(void) asm volatile ("msr daifclr, #3" : : : "memory"); } +static inline void gic_arch_disable_irqs(void) +{ + asm volatile ("msr daifset, #3" : : : "memory"); +} + +static inline void gic_arch_restore_irqs(unsigned long flags) +{ + if (gic_supports_nmi()) + asm volatile ("msr daif, %0" : : "r" (flags >> 32) + : "memory"); +} + static inline bool gic_has_relaxed_pmr_sync(void) { return cpus_have_cap(ARM64_HAS_GIC_PRIO_RELAXED_SYNC); diff --git a/kernel/stop_machine.c b/kernel/stop_machine.c index 9466d61d21c9..320ce5b18511 100644 --- a/kernel/stop_machine.c +++ b/kernel/stop_machine.c @@ -25,6 +25,7 @@ #ifdef CONFIG_ARM64 #include <linux/arm_sdei.h> +#include <asm/arch_gicv3.h> #endif /* @@ -239,6 +240,7 @@ static int multi_cpu_stop(void *data) local_irq_disable(); hard_irq_disable(); #ifdef CONFIG_ARM64 + gic_arch_disable_irqs(); sdei_mask_local_cpu(); #endif break; @@ -263,6 +265,7 @@ static int multi_cpu_stop(void *data) #ifdef CONFIG_ARM64 sdei_unmask_local_cpu(); + gic_arch_restore_irqs(flags); #endif local_irq_restore(flags); return err; -- 2.34.1
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From: Wei Li <liwei391@huawei.com> hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8QBLL -------------------------------- The gic_arch_restore_irqs() depends on commit e7e6a881f797 ("arm64: irqflags: fix incomplete save & restore"). While it is reverted in commit 2e680920c2e7 ("Revert "arm64: irqflags: fix incomplete save & restore""), we should update the logic here too. Currently the upper 32 bits of 'flags' is always zero, change to use 'GIC_PRIO_PSR_I_SET' to indicate the interrupt enabling status. Fixes: abde6b940f5a ("stop_machine: mask pseudo nmi before running the callback") Signed-off-by: Wei Li <liwei391@huawei.com> Reviewed-by: Cheng Jian <cj.chengjian@huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com> --- arch/arm64/include/asm/arch_gicv3.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 6429839f6563..a37fe8853e7f 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -196,10 +196,9 @@ static inline void gic_arch_disable_irqs(void) } static inline void gic_arch_restore_irqs(unsigned long flags) -{ - if (gic_supports_nmi()) - asm volatile ("msr daif, %0" : : "r" (flags >> 32) - : "memory"); +{ + if (gic_supports_nmi() && !(flags & GIC_PRIO_PSR_I_SET)) + gic_arch_enable_irqs(); } static inline bool gic_has_relaxed_pmr_sync(void) -- 2.34.1
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