tree: https://gitee.com/openeuler/kernel.git OLK-5.10 head: 45e99bc87727bf5be83ac512da687f7742d4a8fb commit: 68ee705da160d123656dcbf9ebd449fb77b54bc0 [2928/2928] scripts: kernel-doc: Fix syntax error due to undeclared args variable config: arm64-allmodconfig (https://download.01.org/0day-ci/archive/20250527/202505272346.fzESqwgx-lkp@i...) compiler: clang version 19.1.7 (https://github.com/llvm/llvm-project cd708029e0b2869e80abe31ddb175f7c35361f90) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250527/202505272346.fzESqwgx-lkp@i...) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202505272346.fzESqwgx-lkp@intel.com/ All errors (new ones prefixed by >>): arch/arm64/Makefile:44: Detected assembler with broken .inst; disassembly will be unreliable scripts/genksyms/parse.y: warning: 9 shift/reduce conflicts [-Wconflicts-sr] scripts/genksyms/parse.y: warning: 5 reduce/reduce conflicts [-Wconflicts-rr] scripts/genksyms/parse.y: note: rerun with option '-Wcounterexamples' to generate conflict counterexamples In file included from kernel/bounds.c:10: In file included from include/linux/page-flags.h:10: In file included from include/linux/bug.h:5: In file included from arch/arm64/include/asm/bug.h:26: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:29: In file included from arch/arm64/include/asm/bitops.h:26: In file included from include/asm-generic/bitops/atomic.h:5: In file included from include/linux/atomic.h:7: In file included from arch/arm64/include/asm/atomic.h:16: In file included from arch/arm64/include/asm/cmpxchg.h:14: In file included from arch/arm64/include/asm/lse.h:16:

...

arch/arm64/include/asm/atomic_lse.h:364:1: error: unknown register name 'x0' in asm 364 | __CMPXCHG_CASE(w, b, , 8, ) | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:364:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:364:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:365:1: error: unknown register name 'x0' in asm 365 | __CMPXCHG_CASE(w, h, , 16, ) | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:365:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:365:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:366:1: error: unknown register name 'x0' in asm 366 | __CMPXCHG_CASE(w, , , 32, ) | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:366:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:366:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:367:1: error: unknown register name 'x0' in asm 367 | __CMPXCHG_CASE(x, , , 64, ) | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:367:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:367:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:368:1: error: unknown register name 'x0' in asm 368 | __CMPXCHG_CASE(w, b, acq_, 8, a, "memory") | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:368:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:368:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:369:1: error: unknown register name 'x0' in asm 369 | __CMPXCHG_CASE(w, h, acq_, 16, a, "memory") | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ arch/arm64/include/asm/atomic_lse.h:369:1: error: unknown register name 'x1' in asm arch/arm64/include/asm/atomic_lse.h:347:25: note: expanded from macro '__CMPXCHG_CASE' 347 | register u##sz x1 asm ("x1") = old; \ | ^ arch/arm64/include/asm/atomic_lse.h:369:1: error: unknown register name 'x2' in asm arch/arm64/include/asm/atomic_lse.h:348:25: note: expanded from macro '__CMPXCHG_CASE' 348 | register u##sz x2 asm ("x2") = new; \ | ^ arch/arm64/include/asm/atomic_lse.h:370:1: error: unknown register name 'x0' in asm 370 | __CMPXCHG_CASE(w, , acq_, 32, a, "memory") | ^ arch/arm64/include/asm/atomic_lse.h:346:33: note: expanded from macro '__CMPXCHG_CASE' 346 | register unsigned long x0 asm ("x0") = (unsigned long)ptr; \ | ^ fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated. make[2]: *** [scripts/Makefile.build:117: kernel/bounds.s] Error 1 make[2]: Target '__build' not remade because of errors. make[1]: *** [Makefile:1252: prepare0] Error 2 make[1]: Target 'prepare' not remade because of errors. make: *** [Makefile:195: __sub-make] Error 2 make: Target 'prepare' not remade because of errors.

vim +/x0 +364 arch/arm64/include/asm/atomic_lse.h c342f78217e822 Will Deacon 2015-04-23 363 5ef3fe4cecdf82 Will Deacon 2018-09-13 @364 __CMPXCHG_CASE(w, b, , 8, ) 5ef3fe4cecdf82 Will Deacon 2018-09-13 365 __CMPXCHG_CASE(w, h, , 16, ) 5ef3fe4cecdf82 Will Deacon 2018-09-13 366 __CMPXCHG_CASE(w, , , 32, ) 5ef3fe4cecdf82 Will Deacon 2018-09-13 367 __CMPXCHG_CASE(x, , , 64, ) 5ef3fe4cecdf82 Will Deacon 2018-09-13 368 __CMPXCHG_CASE(w, b, acq_, 8, a, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 369 __CMPXCHG_CASE(w, h, acq_, 16, a, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 370 __CMPXCHG_CASE(w, , acq_, 32, a, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 371 __CMPXCHG_CASE(x, , acq_, 64, a, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 372 __CMPXCHG_CASE(w, b, rel_, 8, l, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 373 __CMPXCHG_CASE(w, h, rel_, 16, l, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 374 __CMPXCHG_CASE(w, , rel_, 32, l, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 375 __CMPXCHG_CASE(x, , rel_, 64, l, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 376 __CMPXCHG_CASE(w, b, mb_, 8, al, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 377 __CMPXCHG_CASE(w, h, mb_, 16, al, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 378 __CMPXCHG_CASE(w, , mb_, 32, al, "memory") 5ef3fe4cecdf82 Will Deacon 2018-09-13 379 __CMPXCHG_CASE(x, , mb_, 64, al, "memory") c342f78217e822 Will Deacon 2015-04-23 380 :::::: The code at line 364 was first introduced by commit :::::: 5ef3fe4cecdf82fdd71ce78988403963d01444d4 arm64: Avoid redundant type conversions in xchg() and cmpxchg() :::::: TO: Will Deacon <will.deacon@arm.com> :::::: CC: Will Deacon <will.deacon@arm.com> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki