[PATCH OLK-6.6 V1 0/2] OLK-6.6-fix-CVE-2024-49906
OLK-6.6-fix-CVE-2024-49906 Rodrigo Siqueira (1): drm/amd/display: Check null pointer before try to access it Wayne Lin (1): drm/amd/display: Check null pointer before try to access it .../gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) -- 2.25.1
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> stable inclusion from stable-v6.11.3 commit 2002ccb93004e76a471b180560accb2c1f850f35 category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/IAYRAN CVE: CVE-2024-49906 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=... -------------------------------- [ Upstream commit 1b686053c06ffb9f4524b288110cf2a831ff7a25 ] [why & how] Change the order of the pipe_ctx->plane_state check to ensure that plane_state is not null before accessing it. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> Conflicts: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c [The conflict is mainly due to e53524cdcc02("drm/amd/display: Refactor HWSS into component folder") not being merged, and some contextual differences.] Signed-off-by: Cheng Yu <serein.chengyu@huawei.com> --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 4ccc339f8f61..1469b169e23b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1742,13 +1742,17 @@ static void dcn20_program_pipe( (pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult)) hws->funcs.set_hdr_multiplier(pipe_ctx); - if (pipe_ctx->update_flags.bits.enable || - (pipe_ctx->plane_state && + if ((pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult) || + pipe_ctx->update_flags.bits.enable) + hws->funcs.set_hdr_multiplier(pipe_ctx); + + if ((pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change) || (pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.gamma_change) || (pipe_ctx->plane_state && - pipe_ctx->plane_state->update_flags.bits.lut_3d)) + pipe_ctx->plane_state->update_flags.bits.lut_3d) || + pipe_ctx->update_flags.bits.enable) hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state); /* dcn10_translate_regamma_to_hw_format takes 750us to finish -- 2.25.1
From: Wayne Lin <Wayne.Lin@amd.com> mainline inclusion from mainline-v6.12-rc1 commit 66e2d2d9a59f896def82a1c8684368be45cf4c06 category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/IAYRAN CVE: CVE-2024-49906 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i... -------------------------------- [why & how] Make sure plane_state is not null before calling a function that dereferences it. Besides, remove redundant codes. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Conflicts: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c [The conflict is mainly due to e53524cdcc02("drm/amd/display: Refactor HWSS into component folder") not being merged, and some contextual differences.] Signed-off-by: Cheng Yu <serein.chengyu@huawei.com> --- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 20 +++++++------------ 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 1469b169e23b..c6c465b46e19 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1738,21 +1738,15 @@ static void dcn20_program_pipe( pipe_ctx->stream->update_flags.raw) dcn20_update_dchubp_dpp(dc, pipe_ctx, context); - if (pipe_ctx->update_flags.bits.enable || - (pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult)) - hws->funcs.set_hdr_multiplier(pipe_ctx); - - if ((pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult) || - pipe_ctx->update_flags.bits.enable) + if (pipe_ctx->plane_state && (pipe_ctx->update_flags.bits.enable || + pipe_ctx->plane_state->update_flags.bits.hdr_mult)) hws->funcs.set_hdr_multiplier(pipe_ctx); - if ((pipe_ctx->plane_state && - pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change) || - (pipe_ctx->plane_state && - pipe_ctx->plane_state->update_flags.bits.gamma_change) || - (pipe_ctx->plane_state && - pipe_ctx->plane_state->update_flags.bits.lut_3d) || - pipe_ctx->update_flags.bits.enable) + if (pipe_ctx->plane_state && + (pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change || + pipe_ctx->plane_state->update_flags.bits.gamma_change || + pipe_ctx->plane_state->update_flags.bits.lut_3d || + pipe_ctx->update_flags.bits.enable)) hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state); /* dcn10_translate_regamma_to_hw_format takes 750us to finish -- 2.25.1
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