[PATCH OLK-6.6] arm64/mpam: Add quirk to shrink MATA PMG range
hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/ID65P3 -------------------------------- On certain specific chip platforms, the PMG function is not fully supported. Using a non-zero PMG as a monitoring resource can lead to the loss of write traffic statistics. Therefore, impose restrictions on the PMG usage range for such chips. Fixes: 9cb26074545b ("arm_mpam: Probe MSCs to find the supported partid/pmg values") Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- drivers/platform/mpam/mpam_devices.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c index ebc8887d8267..287a752724a9 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -745,6 +745,19 @@ static void mpam_ris_hw_probe(struct mpam_msc_ris *ris) } } +static int mpam_pmg_max_hisi_workaround(struct mpam_msc *msc) +{ + static const struct midr_range cpus[] = { + MIDR_ALL_VERSIONS(MIDR_HISI_HIP12), + { /* sentinel */ } + }; + + if (!is_midr_in_range_list(cpus)) + return msc->pmg_max; + + return 0; +} + static int mpam_msc_hw_probe(struct mpam_msc *msc) { u64 idr; @@ -771,6 +784,7 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) /* Use these values so partid/pmg always starts with a valid value */ msc->partid_max = FIELD_GET(MPAMF_IDR_PARTID_MAX, idr); msc->pmg_max = FIELD_GET(MPAMF_IDR_PMG_MAX, idr); + msc->pmg_max = mpam_pmg_max_hisi_workaround(msc); for (ris_idx = 0; ris_idx <= msc->ris_max; ris_idx++) { spin_lock(&msc->part_sel_lock); -- 2.25.1
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