[PATCH OLK-6.6 0/6] arm64/mpam: Update QoS partition default value

Babu Moger (1): x86/resctrl: Remove hard-coded memory bandwidth limit James Morse (1): x86/resctrl: Add max_bw to struct resctrl_membw Zeng Heng (4): fs/resctrl: Fix the crash caused by mounting resctrl but not support RDT arm64/mpam: Fix num_rmids information arm64/mpam: Set 1 as the minimum setting value for MBA arm64/mpam: Update QoS partition default value arch/x86/kernel/cpu/resctrl/core.c | 12 ++++++------ arch/x86/kernel/cpu/resctrl/internal.h | 1 - drivers/platform/mpam/mpam_resctrl.c | 18 +++++++++++++----- fs/resctrl/ctrlmondata.c | 4 ++-- fs/resctrl/rdtgroup.c | 14 ++++++++++++-- include/linux/resctrl.h | 2 ++ 6 files changed, 35 insertions(+), 16 deletions(-) -- 2.25.1

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT -------------------------------- Fix the crash caused by mounting the resctrl filesystem on a platform that does not support any RDT resources. WARNING: CPU: 0 PID: 13291 at mm/page_alloc.c:4780 __alloc_pages Call Trace: __kmalloc_large_node+0x8f/0x190 __kmalloc+0xb8/0x120 closid_init+0x4a/0x90 rdt_get_tree+0x109/0x400 vfs_get_tree+0x25/0xe0 do_new_mount+0x164/0x1c0 __se_sys_mount+0x165/0x1d0 do_syscall_64+0x56/0x100 Fixes: 1e7284b7981c ("fs/resctrl: Remove the limit on the number of CLOSID") Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- fs/resctrl/rdtgroup.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 9eab69ddc688..79334b36798f 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -148,7 +148,7 @@ int closids_supported(void) return closid_free_map_len; } -static void closid_init(void) +static int closid_init(void) { struct resctrl_schema *s; u32 rdt_min_closid = ~0; @@ -157,12 +157,20 @@ static void closid_init(void) list_for_each_entry(s, &resctrl_schema_all, list) rdt_min_closid = min(rdt_min_closid, s->num_closid); + if (rdt_min_closid == ~0) + return -EOPNOTSUPP; + closid_free_map = bitmap_alloc(rdt_min_closid, GFP_KERNEL); + if (!closid_free_map) + return -ENOMEM; + bitmap_fill(closid_free_map, rdt_min_closid); /* RESCTRL_RESERVED_CLOSID is always reserved for the default group */ __clear_bit(RESCTRL_RESERVED_CLOSID, closid_free_map); closid_free_map_len = rdt_min_closid; + + return 0; } static void closid_exit(void) @@ -2769,7 +2777,9 @@ static int rdt_get_tree(struct fs_context *fc) if (ret) goto out_schemata_free; - closid_init(); + ret = closid_init(); + if (ret) + goto out_schemata_free; if (resctrl_arch_mon_capable()) flags |= RFTYPE_MON; -- 2.25.1

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT -------------------------------- Select the maximum number of RMIDs supported by the system as the RMIDs number. Fixes: cc622cf0fb21 ("arm_mpam: resctrl: Pick a value for num_rmid") Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- drivers/platform/mpam/mpam_resctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c index cdcadc4111e1..cb3112d9a43f 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -1095,7 +1095,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) * For mpam, each control group has its own pmg/rmid * space. */ - r->num_rmid = mpam_partid_max * mpam_pmg_max; + r->num_rmid = resctrl_arch_system_num_rmid_idx(); } return 0; -- 2.25.1

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT -------------------------------- The MPAM hardware does not allow setting 0 as the bandwidth limit value. Otherwise, it would exhibit undefined behavior. Fixes: 58db5c68e84a ("untested: arm_mpam: resctrl: Add support for MB resource") Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- drivers/platform/mpam/mpam_resctrl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c index cb3112d9a43f..bef118332244 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -970,6 +970,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->membw.delay_linear = true; r->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED; + r->membw.min_bw = 1; r->membw.bw_gran = get_mba_granularity(cprops); /* Round up to at least 1% */ -- 2.25.1

From: Babu Moger <babu.moger@amd.com> mainline inclusion from mainline-v6.9-rc1 commit 0976783bb123f30981bc1e7a14d9626a6f63aeac category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=... -------------------------------- The QOS Memory Bandwidth Enforcement Limit is reported by CPUID_Fn80000020_EAX_x01 and CPUID_Fn80000020_EAX_x02: Bits Description 31:0 BW_LEN: Size of the QOS Memory Bandwidth Enforcement Limit. Newer processors can support higher bandwidth limit than the current hard-coded value. Remove latter and detect using CPUID instead. Also, update the register variables eax and edx to match the AMD CPUID definition. The CPUID details are documented in the Processor Programming Reference (PPR) Vol 1.1 for AMD Family 19h Model 11h B1 - 55901 Rev 0.25 in the Link tag below. Fixes: 4d05bf71f157 ("x86/resctrl: Introduce AMD QOS feature") Signed-off-by: Babu Moger <babu.moger@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Link: https://lore.kernel.org/r/c26a8ca79d399ed076cf8bf2e9fbc58048808289.170535914... Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- arch/x86/kernel/cpu/resctrl/core.c | 10 ++++------ arch/x86/kernel/cpu/resctrl/internal.h | 1 - 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 3390c72c77ba..621c641fce17 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -225,9 +225,7 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r) static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r) { struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); - union cpuid_0x10_3_eax eax; - union cpuid_0x10_x_edx edx; - u32 ebx, ecx, subleaf; + u32 eax, ebx, ecx, edx, subleaf; /* * Query CPUID_Fn80000020_EDX_x01 for MBA and @@ -235,9 +233,9 @@ static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r) */ subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1; - cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full); - hw_res->num_closid = edx.split.cos_max + 1; - r->default_ctrl = MAX_MBA_BW_AMD; + cpuid_count(0x80000020, subleaf, &eax, &ebx, &ecx, &edx); + hw_res->num_closid = edx + 1; + r->default_ctrl = 1 << eax; /* AMD does not use delay */ r->membw.delay_linear = false; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index d7b8762716f2..685e1bba3731 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -15,7 +15,6 @@ #define L2_QOS_CDP_ENABLE 0x01ULL -#define MAX_MBA_BW_AMD 0x800 #define MBM_CNTR_WIDTH_OFFSET_AMD 20 #define RMID_VAL_ERROR BIT_ULL(63) -- 2.25.1

From: James Morse <james.morse@arm.com> mainline inclusion from mainline-v6.15-rc1 commit 634ebb98b929443ea1a5502c93f26d01aedbd5c8 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC35SV -------------------------------- __rdt_get_mem_config_amd() and __get_mem_config_intel() both use the default_ctrl property as a maximum value. This is because the MBA schema works differently between these platforms. Doing this complicates determining whether the default_ctrl property belongs to the arch code, or can be derived from the schema format. Deriving the maximum or default value from the schema format would avoid the architecture code having to tell resctrl such obvious things as the maximum percentage is 100, and the maximum bitmap is all ones. Maximum bandwidth is always going to vary per platform. Add max_bw as a special case. This is currently used for the maximum MBA percentage on Intel platforms, but can be removed from the architecture code if 'percentage' becomes a schema format resctrl supports directly. This value isn't needed for other schema formats. This will allow the default_ctrl to be generated from the schema properties when it is needed. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Babu Moger <babu.moger@amd.com> Tested-by: Carl Worth <carl@os.amperecomputing.com> # arm64 Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Amit Singh Tomar <amitsinght@marvell.com> # arm64 Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> # arm64 Tested-by: Babu Moger <babu.moger@amd.com> Link: https://lore.kernel.org/r/20250311183715.16445-8-james.morse@arm.com Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- arch/x86/kernel/cpu/resctrl/core.c | 2 ++ fs/resctrl/ctrlmondata.c | 4 ++-- include/linux/resctrl.h | 2 ++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 621c641fce17..f76db0149d1a 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -200,6 +200,7 @@ static __init bool __get_mem_config_intel(struct rdt_resource *r) hw_res->num_closid = edx.split.cos_max + 1; max_delay = eax.split.max_delay + 1; r->default_ctrl = MAX_MBA_BW; + r->membw.max_bw = MAX_MBA_BW; r->membw.arch_needs_linear = true; if (ecx & MBA_IS_LINEAR) { r->membw.delay_linear = true; @@ -236,6 +237,7 @@ static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r) cpuid_count(0x80000020, subleaf, &eax, &ebx, &ecx, &edx); hw_res->num_closid = edx + 1; r->default_ctrl = 1 << eax; + r->membw.max_bw = 1 << eax; /* AMD does not use delay */ r->membw.delay_linear = false; diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 00132a77879d..3f0380a2386a 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -57,11 +57,11 @@ static bool bw_validate(char *buf, unsigned long *data, struct rdt_resource *r) return false; } - if ((bw < r->membw.min_bw || bw > r->default_ctrl) && + if ((bw < r->membw.min_bw || bw > r->membw.max_bw) && !is_mba_sc(r)) { rdt_last_cmd_printf("%s value %ld out of range [%d,%d]\n", r->name, bw, r->membw.min_bw, - r->default_ctrl); + r->membw.max_bw); return false; } diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 4f54c371d185..e2e63b3bd508 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -163,6 +163,7 @@ enum membw_throttle_mode { /** * struct resctrl_membw - Memory bandwidth allocation related data * @min_bw: Minimum memory bandwidth percentage user can request + * @max_bw: Maximum memory bandwidth value, used as the reset value * @bw_gran: Granularity at which the memory bandwidth is allocated * @delay_linear: True if memory B/W delay is in linear scale * @arch_needs_linear: True if we can't configure non-linear resources @@ -175,6 +176,7 @@ enum membw_throttle_mode { */ struct resctrl_membw { u32 min_bw; + u32 max_bw; u32 bw_gran; u32 delay_linear; bool arch_needs_linear; -- 2.25.1

hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IC35SV -------------------------------- No longer use the configurable maximum value as the default for QoS configuration. Instead, we have updated the recommended value to be the default. Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- drivers/platform/mpam/mpam_resctrl.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c index bef118332244..ae02d33dab3f 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -966,6 +966,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_MB; r->default_ctrl = MAX_MBA_BW; + r->membw.max_bw = MAX_MBA_BW; r->data_width = 3; r->membw.delay_linear = true; @@ -994,6 +995,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_CACHE; r->default_ctrl = MAX_MBA_BW; + r->membw.max_bw = MAX_MBA_BW; r->data_width = 3; r->cache_level = class->level; @@ -1009,7 +1011,8 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->format_str = "%d=%0*u"; r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_CACHE; - r->default_ctrl = MAX_MBA_BW; + r->default_ctrl = 0; + r->membw.max_bw = MAX_MBA_BW; r->data_width = 3; r->cache_level = class->level; @@ -1024,7 +1027,8 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->format_str = "%d=%0*u"; r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_MB; - r->default_ctrl = MAX_MBA_BW; + r->default_ctrl = 0; + r->membw.max_bw = MAX_MBA_BW; r->data_width = 3; r->membw.delay_linear = true; @@ -1044,7 +1048,8 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->format_str = "%d=%0*u"; r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_CACHE; - r->default_ctrl = GENMASK(cprops->intpri_wd - 1, 0); + r->default_ctrl = 0; + r->membw.max_bw = GENMASK(cprops->intpri_wd - 1, 0); r->data_width = 3; r->cache_level = class->level; @@ -1059,7 +1064,8 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->format_str = "%d=%0*u"; r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_MB; - r->default_ctrl = GENMASK(cprops->intpri_wd - 1, 0); + r->default_ctrl = 3; + r->membw.max_bw = GENMASK(cprops->intpri_wd - 1, 0); r->data_width = 3; r->membw.bw_gran = 1; @@ -1073,6 +1079,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) r->schema_fmt = RESCTRL_SCHEMA_RANGE; r->fflags = RFTYPE_RES_MB; r->default_ctrl = 1; + r->membw.max_bw = 1; r->data_width = 1; r->membw.bw_gran = 1; -- 2.25.1

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