tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 181ab23277f274c13c335d037d654b2879de50ca commit: 86b90dc581ce2fcc6b724b4ffaea6103122a4b68 [3176/3186] iommu/arm-smmu-v3: Add support for ECMDQ register mode config: arm64-allmodconfig (https://download.01.org/0day-ci/archive/20240219/202402190254.FDaGb5YO-lkp@i...) compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project 36adfec155de366d722f2bac8ff9162289dcf06c) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240219/202402190254.FDaGb5YO-lkp@i...) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202402190254.FDaGb5YO-lkp@intel.com/ All warnings (new ones prefixed by >>):

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drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:3988:39: warning: variable 'pre_addr' is uninitialized when used here [-Wuninitialized] 3988 | if (i && ((val & ECMDQ_CP_ADDR) != (pre_addr + ECMDQ_CP_RRESET_SIZE))) { | ^~~~~~~~ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:3979:20: note: initialize the variable 'pre_addr' to silence this warning 3979 | u64 val, pre_addr; | ^ | = 0 1 warning generated.

vim +/pre_addr +3988 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c 3957 3958 static int arm_smmu_ecmdq_probe(struct arm_smmu_device *smmu) 3959 { 3960 int ret, cpu; 3961 u32 i, nump, numq, gap; 3962 u32 reg, shift_increment; 3963 u64 addr, smmu_dma_base; 3964 void __iomem *cp_regs, *cp_base; 3965 3966 /* IDR6 */ 3967 reg = readl_relaxed(smmu->base + ARM_SMMU_IDR6); 3968 nump = 1 << FIELD_GET(IDR6_LOG2NUMP, reg); 3969 numq = 1 << FIELD_GET(IDR6_LOG2NUMQ, reg); 3970 smmu->nr_ecmdq = nump * numq; 3971 gap = ECMDQ_CP_RRESET_SIZE >> FIELD_GET(IDR6_LOG2NUMQ, reg); 3972 3973 smmu_dma_base = (vmalloc_to_pfn(smmu->base) << PAGE_SHIFT); 3974 cp_regs = ioremap(smmu_dma_base + ARM_SMMU_ECMDQ_CP_BASE, PAGE_SIZE); 3975 if (!cp_regs) 3976 return -ENOMEM; 3977 3978 for (i = 0; i < nump; i++) { 3979 u64 val, pre_addr; 3980 3981 val = readq_relaxed(cp_regs + 32 * i); 3982 if (!(val & ECMDQ_CP_PRESET)) { 3983 iounmap(cp_regs); 3984 dev_err(smmu->dev, "ecmdq control page %u is memory mode\n", i); 3985 return -EFAULT; 3986 } 3987

3988 if (i && ((val & ECMDQ_CP_ADDR) != (pre_addr + ECMDQ_CP_RRESET_SIZE))) { 3989 iounmap(cp_regs); 3990 dev_err(smmu->dev, "ecmdq_cp memory region is not contiguous\n"); 3991 return -EFAULT; 3992 } 3993 3994 pre_addr = val & ECMDQ_CP_ADDR; 3995 } 3996 3997 addr = readl_relaxed(cp_regs) & ECMDQ_CP_ADDR; 3998 iounmap(cp_regs); 3999 4000 cp_base = devm_ioremap(smmu->dev, smmu_dma_base + addr, ECMDQ_CP_RRESET_SIZE * nump); 4001 if (!cp_base) 4002 return -ENOMEM; 4003 4004 smmu->ecmdq = devm_alloc_percpu(smmu->dev, struct arm_smmu_ecmdq *); 4005 if (!smmu->ecmdq) 4006 return -ENOMEM; 4007 4008 ret = arm_smmu_ecmdq_layout(smmu); 4009 if (ret) 4010 return ret; 4011 4012 shift_increment = order_base_2(num_possible_cpus() / smmu->nr_ecmdq); 4013 4014 addr = 0; 4015 for_each_possible_cpu(cpu) { 4016 struct arm_smmu_ecmdq *ecmdq; 4017 struct arm_smmu_queue *q; 4018 4019 ecmdq = *per_cpu_ptr(smmu->ecmdq, cpu); 4020 ecmdq->base = cp_base + addr; 4021 4022 q = &ecmdq->cmdq.q; 4023 4024 q->llq.max_n_shift = ECMDQ_MAX_SZ_SHIFT + shift_increment; 4025 ret = arm_smmu_init_one_queue(smmu, q, ecmdq->base, ARM_SMMU_ECMDQ_PROD, 4026 ARM_SMMU_ECMDQ_CONS, CMDQ_ENT_DWORDS, "ecmdq"); 4027 if (ret) 4028 return ret; 4029 4030 q->ecmdq_prod = ECMDQ_PROD_EN; 4031 rwlock_init(&q->ecmdq_lock); 4032 4033 ret = arm_smmu_ecmdq_init(&ecmdq->cmdq); 4034 if (ret) { 4035 dev_err(smmu->dev, "ecmdq[%d] init failed\n", i); 4036 return ret; 4037 } 4038 4039 addr += gap; 4040 } 4041 4042 return 0; 4043 } 4044 #endif 4045

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