From: Lostwayzxc <luoshengwei@huawei.com> kunpeng inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4IG00?from=project-issue CVE: NA When the arm event is reported, the rasdaemon needs to know the cpu logical index, but there is only mpidr without mapping between it and cpu logical index. Since the kernel has saved the mapping, get the logical index by function get_logical_index() and report it directly to userspace via perf i/f. Signed-off-by: Lostwayzxc <luoshengwei@huawei.com> Reviewed-by: Lv Ying <lvying6@huawei.com> Reviewed-by: Xie XiuQi <xiexiuqi@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> --- drivers/ras/ras.c | 8 +++++++- include/linux/ras.h | 11 +++++++++++ include/ras/ras_event.h | 10 +++++++--- 3 files changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c index 9302ed7f42588..a526f124a5ff8 100644 --- a/drivers/ras/ras.c +++ b/drivers/ras/ras.c @@ -32,6 +32,7 @@ void log_arm_hw_error(struct cper_sec_proc_arm *err, const u8 sev) struct cper_arm_err_info *err_info; struct cper_arm_ctx_info *ctx_info; int n, sz; + int cpu; pei_len = sizeof(struct cper_arm_err_info) * err->err_info_num; pei_err = (u8 *)err + sizeof(struct cper_sec_proc_arm); @@ -58,8 +59,13 @@ void log_arm_hw_error(struct cper_sec_proc_arm *err, const u8 sev) } ven_err_data = (u8 *)ctx_info; + cpu = GET_LOGICAL_INDEX(err->mpidr); + /* when the return value is invalid, set cpu index to a large integer */ + if (cpu < 0) + cpu = 0xFFFF; + trace_arm_event(err, pei_err, pei_len, ctx_err, ctx_len, - ven_err_data, vsei_len, sev); + ven_err_data, vsei_len, sev, cpu); } static int __init ras_init(void) diff --git a/include/linux/ras.h b/include/linux/ras.h index 3431b4a5fa42d..e5ec31ad7a132 100644 --- a/include/linux/ras.h +++ b/include/linux/ras.h @@ -40,4 +40,15 @@ static inline void log_arm_hw_error(struct cper_sec_proc_arm *err, const u8 sev) { return; } #endif +#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) +#include <asm/smp_plat.h> +/* + * Include ARM specific SMP header which provides a function mapping mpidr to + * cpu logical index. + */ +#define GET_LOGICAL_INDEX(mpidr) get_logical_index(mpidr & MPIDR_HWID_BITMASK) +#else +#define GET_LOGICAL_INDEX(mpidr) -EINVAL +#endif /* CONFIG_ARM || CONFIG_ARM64 */ + #endif /* __RAS_H__ */ diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 7c8cb123ba32d..2d6a662886e6d 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -182,9 +182,10 @@ TRACE_EVENT(arm_event, const u32 ctx_len, const u8 *oem, const u32 oem_len, - u8 sev), + u8 sev, + int cpu), - TP_ARGS(proc, pei_err, pei_len, ctx_err, ctx_len, oem, oem_len, sev), + TP_ARGS(proc, pei_err, pei_len, ctx_err, ctx_len, oem, oem_len, sev, cpu), TP_STRUCT__entry( __field(u64, mpidr) @@ -199,6 +200,7 @@ TRACE_EVENT(arm_event, __field(u32, oem_len) __dynamic_array(u8, buf2, oem_len) __field(u8, sev) + __field(int, cpu) ), TP_fast_assign( @@ -225,11 +227,13 @@ TRACE_EVENT(arm_event, __entry->oem_len = oem_len; memcpy(__get_dynamic_array(buf2), oem, oem_len); __entry->sev = sev; + __entry->cpu = cpu; ), - TP_printk("error: %d; affinity level: %d; MPIDR: %016llx; MIDR: %016llx; " + TP_printk("cpu: %d; error: %d; affinity level: %d; MPIDR: %016llx; MIDR: %016llx; " "running state: %d; PSCI state: %d; " "%s: %d; %s: %s; %s: %d; %s: %s; %s: %d; %s: %s", + __entry->cpu, __entry->sev, __entry->affinity, __entry->mpidr, __entry->midr, __entry->running_state, __entry->psci_state, -- 2.25.1