- Linuxarm - mailweb.openeuler.org

[PATCH] coresight: core: Fix typo in coresight-core.c
by Qi Liu 23 Mar '21

23 Mar '21

Fix up one typo: compoment->component. Fixes: 8e264c52e1da ("coresight: core: Allow the coresight core driver to be built as a module") Signed-off-by: Qi Liu <liuqi115(a)huawei.com> --- drivers/hwtracing/coresight/coresight-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0062c89..bc397a7 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -86,7 +86,7 @@ static int coresight_id_match(struct device *dev, void *data) i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) return 0; - /* Get the source ID for both compoment */ + /* Get the source ID for both component */ trace_id = source_ops(csdev)->trace_id(csdev); i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); -- 2.8.1

4 4

Re: [PATCH v14 07/13] iommu/smmuv3: Implement cache_invalidate
by chenxiang (M) 23 Mar '21

23 Mar '21

Hi Eric, 在 2021/2/24 4:56, Eric Auger 写道: > Implement domain-selective, pasid selective and page-selective > IOTLB invalidations. > > Signed-off-by: Eric Auger <eric.auger(a)redhat.com> > > --- > > v13 -> v14: > - Add domain invalidation > - do global inval when asid is not provided with addr > granularity > > v7 -> v8: > - ASID based invalidation using iommu_inv_pasid_info > - check ARCHID/PASID flags in addr based invalidation > - use __arm_smmu_tlb_inv_context and __arm_smmu_tlb_inv_range_nosync > > v6 -> v7 > - check the uapi version > > v3 -> v4: > - adapt to changes in the uapi > - add support for leaf parameter > - do not use arm_smmu_tlb_inv_range_nosync or arm_smmu_tlb_inv_context > anymore > > v2 -> v3: > - replace __arm_smmu_tlb_sync by arm_smmu_cmdq_issue_sync > > v1 -> v2: > - properly pass the asid > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 74 +++++++++++++++++++++ > 1 file changed, 74 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 4c19a1114de4..df3adc49111c 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2949,6 +2949,79 @@ static void arm_smmu_detach_pasid_table(struct iommu_domain *domain) > mutex_unlock(&smmu_domain->init_mutex); > } > > +static int > +arm_smmu_cache_invalidate(struct iommu_domain *domain, struct device *dev, > + struct iommu_cache_invalidate_info *inv_info) > +{ > + struct arm_smmu_cmdq_ent cmd = {.opcode = CMDQ_OP_TLBI_NSNH_ALL}; > + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > + struct arm_smmu_device *smmu = smmu_domain->smmu; > + > + if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED) > + return -EINVAL; > + > + if (!smmu) > + return -EINVAL; > + > + if (inv_info->version != IOMMU_CACHE_INVALIDATE_INFO_VERSION_1) > + return -EINVAL; > + > + if (inv_info->cache & IOMMU_CACHE_INV_TYPE_PASID || > + inv_info->cache & IOMMU_CACHE_INV_TYPE_DEV_IOTLB) { > + return -ENOENT; > + } > + > + if (!(inv_info->cache & IOMMU_CACHE_INV_TYPE_IOTLB)) > + return -EINVAL; > + > + /* IOTLB invalidation */ > + > + switch (inv_info->granularity) { > + case IOMMU_INV_GRANU_PASID: > + { > + struct iommu_inv_pasid_info *info = > + &inv_info->granu.pasid_info; > + > + if (info->flags & IOMMU_INV_ADDR_FLAGS_PASID) > + return -ENOENT; > + if (!(info->flags & IOMMU_INV_PASID_FLAGS_ARCHID)) > + return -EINVAL; > + > + __arm_smmu_tlb_inv_context(smmu_domain, info->archid); > + return 0; > + } > + case IOMMU_INV_GRANU_ADDR: > + { > + struct iommu_inv_addr_info *info = &inv_info->granu.addr_info; > + size_t size = info->nb_granules * info->granule_size; > + bool leaf = info->flags & IOMMU_INV_ADDR_FLAGS_LEAF; > + > + if (info->flags & IOMMU_INV_ADDR_FLAGS_PASID) > + return -ENOENT; > + > + if (!(info->flags & IOMMU_INV_ADDR_FLAGS_ARCHID)) > + break; > + > + arm_smmu_tlb_inv_range_domain(info->addr, size, > + info->granule_size, leaf, > + info->archid, smmu_domain); Is it possible to add a check before the function to make sure that info->granule_size can be recognized by SMMU? There is a scenario which will cause TLBI issue: RIL feature is enabled on guest but is disabled on host, and then on host it just invalidate 4K/2M/1G once a time, but from QEMU, info->nb_granules is always 1 and info->granule_size = size, if size is not equal to 4K or 2M or 1G (for example size = granule_size is 5M), it will only part of the size it wants to invalidate. I think maybe we can add a check here: if RIL is not enabled and also size is not the granule_size (4K/2M/1G) supported by SMMU hardware, can we just simply use the smallest granule_size supported by hardware all the time? > + > + arm_smmu_cmdq_issue_sync(smmu); > + return 0; > + } > + case IOMMU_INV_GRANU_DOMAIN: > + break; I check the qemu code (https://github.com/eauger/qemu/tree/v5.2.0-2stage-rfcv8) for opcode CMD_TLBI_NH_ALL or CMD_TLBI_NSNH_ALL from guest OS it calls smmu_inv_notifiers_all() to unamp all notifiers of all mr's, but it seems not set event.entry.granularity which i think it should set IOMMU_INV_GRAN_ADDR. BTW, for opcode CMD_TLBI_NH_ALL or CMD_TLBI_NSNH_ALL, it needs to unmap size = 0x1000000000000 on 48bit system (it may spend much time), maybe it is better to set it as IOMMU_INV_GRANU_DOMAIN, then in host OS, send TLBI_NH_ALL directly when IOMMU_INV_GRANU_DOMAIN. > + default: > + return -EINVAL; > + } > + > + /* Global S1 invalidation */ > + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; > + arm_smmu_cmdq_issue_cmd(smmu, &cmd); > + arm_smmu_cmdq_issue_sync(smmu); > + return 0; > +} > + > static bool arm_smmu_dev_has_feature(struct device *dev, > enum iommu_dev_features feat) > { > @@ -3048,6 +3121,7 @@ static struct iommu_ops arm_smmu_ops = { > .put_resv_regions = generic_iommu_put_resv_regions, > .attach_pasid_table = arm_smmu_attach_pasid_table, > .detach_pasid_table = arm_smmu_detach_pasid_table, > + .cache_invalidate = arm_smmu_cache_invalidate, > .dev_has_feat = arm_smmu_dev_has_feature, > .dev_feat_enabled = arm_smmu_dev_feature_enabled, > .dev_enable_feat = arm_smmu_dev_enable_feature,

2 4

[PATCH V2 net-next 0/7] net: hns3: refactor and new features for flow director
by Huazhong Tan 23 Mar '21

23 Mar '21

This patchset refactor some functions and add some new features for flow director. patch 1~3: refactor large functions patch 4, 7: add traffic class and user-def field support for ethtool patch 5: refactor flow director configuration patch 6: clean up for hns3_del_all_fd_entries() change log: V1->V2: modifies patch 5 as Jakub suggested, keep configuring ethtool/tc flower rules synchronously while aRFS asynchronously. changes the usecnt of user-def rule checking in patch 7. removes previous patches 8 and 9 from this series, since there are issues that need further discussion. previous version: V1: https://patchwork.kernel.org/project/netdevbpf/cover/1615811031-55209-1-git… Jian Shen (7): net: hns3: refactor out hclge_add_fd_entry() net: hns3: refactor out hclge_fd_get_tuple() net: hns3: refactor for function hclge_fd_convert_tuple net: hns3: add support for traffic class tuple support for flow director by ethtool net: hns3: refactor flow director configuration net: hns3: refine for hns3_del_all_fd_entries() net: hns3: add support for user-def data of flow director drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 - drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 10 - .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 14 + .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1316 +++++++++++++------- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 58 + 5 files changed, 936 insertions(+), 464 deletions(-) -- 2.7.4

2 8

[PATCH] sched/fair: remove redundant test_idle_cores for non-smt
by Barry Song 22 Mar '21

22 Mar '21

update_idle_core() is only done for the case of sched_smt_present. but test_idle_cores() is done for all machines even those without smt. this could contribute to up 8%+ hackbench performance loss on a machine like kunpeng 920 which has no smt. this patch removes the redundant test_idle_cores() for non-smt machines. we run the below hackbench with different -g parameter from 2 to 14, for each different g, we run the command 10 times and get the average time: $ numactl -N 0 hackbench -p -T -l 20000 -g $1 hackbench will report the time which is needed to complete a certain number of messages transmissions between a certain number of tasks, for example: $ numactl -N 0 hackbench -p -T -l 20000 -g 10 Running in threaded mode with 10 groups using 40 file descriptors each (== 400 tasks) Each sender will pass 20000 messages of 100 bytes The below is the result of hackbench w/ and w/o this patch: g= 2 4 6 8 10 12 14 w/o: 1.8151 3.8499 5.5142 7.2491 9.0340 10.7345 12.0929 w/ : 1.8428 3.7436 5.4501 6.9522 8.2882 9.9535 11.3367 +4.1% +8.3% +7.3% +6.3% Signed-off-by: Barry Song <song.bao.hua(a)hisilicon.com> --- kernel/sched/fair.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 2e2ab1e..de42a32 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -6038,9 +6038,11 @@ static inline bool test_idle_cores(int cpu, bool def) { struct sched_domain_shared *sds; - sds = rcu_dereference(per_cpu(sd_llc_shared, cpu)); - if (sds) - return READ_ONCE(sds->has_idle_cores); + if (static_branch_likely(&sched_smt_present)) { + sds = rcu_dereference(per_cpu(sd_llc_shared, cpu)); + if (sds) + return READ_ONCE(sds->has_idle_cores); + } return def; } -- 1.8.3.1

6 5

[PATCH v2 for-rc] RDMA/hns: Fix bug during CMDQ initialization
by Weihang Li 22 Mar '21

22 Mar '21

From: Lang Cheng <chenglang(a)huawei.com> When reloading driver, the head/tail pointer of CMDQ may be not at position 0. Then during initialization of CMDQ, if head is reset first, the firmware will start to handle CMDQ because the head is not equal to the tail. The driver can reset tail first since the firmware will be triggerred only by head. This bug is introduced by changing macros of head/tail register without changing the order of initialization. Fixes: 292b3352bd5b ("RDMA/hns: Adjust fields and variables about CMDQ tail/head") Signed-off-by: Lang Cheng <chenglang(a)huawei.com> Signed-off-by: Weihang Li <liweihang(a)huawei.com> --- Changes since v1: - Only retain the bugfix part for -rc branch. - Link: https://patchwork.kernel.org/project/linux-rdma/patch/1615541933-35798-1-gi… drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index c3934ab..ce26f97 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -1194,8 +1194,10 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) upper_32_bits(dma)); roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG, (u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S); - roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0); + + /* Make sure to write tail first and then head */ roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0); + roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0); } else { roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_L_REG, (u32)dma); roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG, -- 2.8.1

2 1

[PATCH] spi: imx: Use of_device_get_match_data() helper
by Tian Tao 22 Mar '21

22 Mar '21

Use the of_device_get_match_data() helper instead of open coding. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- drivers/spi/spi-imx.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index cf55192..4fe767a 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -1548,13 +1548,12 @@ static int spi_imx_slave_abort(struct spi_master *master) static int spi_imx_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - const struct of_device_id *of_id = - of_match_device(spi_imx_dt_ids, &pdev->dev); struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; int ret, irq, spi_drctl; - const struct spi_imx_devtype_data *devtype_data = of_id->data; + const struct spi_imx_devtype_data *devtype_data = + of_device_get_match_data(&pdev->dev); bool slave_mode; u32 val; -- 2.7.4

1 0

[PATCH] i2c: imx: Use devm_request_irq()
by Tian Tao 19 Mar '21

19 Mar '21

Use devm_request_irq() to get rid of manual unregistration. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- drivers/i2c/busses/i2c-imx.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index b80fdc1..e377d4a 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -1435,8 +1435,8 @@ static int i2c_imx_probe(struct platform_device *pdev) goto rpm_disable; /* Request IRQ */ - ret = request_threaded_irq(irq, i2c_imx_isr, NULL, IRQF_SHARED, - pdev->name, i2c_imx); + ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, + IRQF_SHARED, pdev->name, i2c_imx); if (ret) { dev_err(&pdev->dev, "can't claim irq %d\n", irq); goto rpm_disable; @@ -1481,7 +1481,6 @@ static int i2c_imx_probe(struct platform_device *pdev) clk_notifier_unregister: clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb); - free_irq(irq, i2c_imx); rpm_disable: pm_runtime_put_noidle(&pdev->dev); pm_runtime_disable(&pdev->dev); @@ -1494,7 +1493,7 @@ static int i2c_imx_probe(struct platform_device *pdev) static int i2c_imx_remove(struct platform_device *pdev) { struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); - int irq, ret; + int ret; ret = pm_runtime_get_sync(&pdev->dev); if (ret < 0) @@ -1514,9 +1513,6 @@ static int i2c_imx_remove(struct platform_device *pdev) imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR); clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb); - irq = platform_get_irq(pdev, 0); - if (irq >= 0) - free_irq(irq, i2c_imx); clk_disable_unprepare(i2c_imx->clk); pm_runtime_put_noidle(&pdev->dev); -- 2.7.4

2 1

[PATCH] i2c: mlxbf: Remove the unneeded devm_free_irq
by Tian Tao 19 Mar '21

19 Mar '21

Use devm_request_irq to request interrupts,devm_free_irq is not needed to release interrupts. so just remove it. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- drivers/i2c/busses/i2c-mlxbf.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c index 2fb0532..ea839de 100644 --- a/drivers/i2c/busses/i2c-mlxbf.c +++ b/drivers/i2c/busses/i2c-mlxbf.c @@ -2426,8 +2426,6 @@ static int mlxbf_i2c_remove(struct platform_device *pdev) } mutex_unlock(&mlxbf_i2c_bus_lock); - devm_free_irq(dev, priv->irq, priv); - i2c_del_adapter(&priv->adap); return 0; -- 2.7.4

2 1

[PATCH 0/3] drivers/perf: convert sysfs sprintf/snprintf/scnprintf to sysfs_emit
by Qi Liu 18 Mar '21

18 Mar '21

Use the generic sysfs_emit() and sysfs_emit_at() function to take place of sprintf/snprintf/scnprintf, to avoid buffer overrun. Zihao Tang (1) drivers/perf: convert sysfs snprintf family to sysfs_emit Qi Liu (2): drivers/perf: convert sysfs scnprintf family to sysfs_emit_at drivers/perf: convert sysfs sprintf family to sysfs_emit drivers/perf/arm-cci.c | 12 ++++++------ drivers/perf/arm-ccn.c | 28 ++++++++++++---------------- drivers/perf/arm-cmn.c | 22 +++++++++++----------- drivers/perf/arm_dmc620_pmu.c | 2 +- drivers/perf/arm_dsu_pmu.c | 5 ++--- drivers/perf/arm_smmuv3_pmu.c | 4 ++-- drivers/perf/arm_spe_pmu.c | 3 +-- drivers/perf/fsl_imx8_ddr_perf.c | 7 +++---- drivers/perf/hisilicon/hisi_uncore_pmu.c | 8 ++++---- drivers/perf/qcom_l2_pmu.c | 2 +- drivers/perf/qcom_l3_pmu.c | 4 ++-- drivers/perf/thunderx2_pmu.c | 4 ++-- drivers/perf/xgene_pmu.c | 4 ++-- 13 files changed, 49 insertions(+), 56 deletions(-) -- 2.8.1

4 9

[PATCH v2 0/3] Add support for HiSilicon I2C controller
by Yicong Yang 18 Mar '21

18 Mar '21

Add driver and MAINTAINERS for HiSilicon I2C controller on Kunpeng SoC. Also provide the devm_*() variants for adding the I2C adapters. Change since v1: - fix compile test error on 32bit arch, reported by intel lkp robot: 64 bit division without using kernel wrapper in probe function. Link:https://lore.kernel.org/linux-i2c/1615016946-55670-1-git-send-email-ya… Yicong Yang (3): i2c: core: add managed function for adding i2c adapters i2c: add support for HiSilicon I2C controller MAINTAINERS: Add maintainer for HiSilicon I2C driver MAINTAINERS | 7 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-hisi.c | 525 ++++++++++++++++++++++++++++++++++++++++++ drivers/i2c/i2c-core-base.c | 39 ++++ include/linux/i2c.h | 1 + 6 files changed, 583 insertions(+) create mode 100644 drivers/i2c/busses/i2c-hisi.c -- 2.8.1

2 6