From: Xiang Chen <chenxiang66@hisilicon.com> virt inclusion category: feature bugzilla: https://gitee.com/openeuler/qemu/issues/IC1EV7 ------------------------------------------------------------------------ Before IPIV feature, it gets mpidr from vcpu id, but after the feature, we need to know which IPIV mode is used. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> --- linux-headers/linux/kvm.h | 1 + target/arm/cpu.c | 22 +++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index b94c5fd90f..5d563ef034 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1202,6 +1202,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230 #define KVM_CAP_ARM_TMM 300 +#define KVM_CAP_ARM_IPIV_MODE 301 #define KVM_CAP_SEV_ES_GHCB 500 #define KVM_CAP_HYGON_COCO_EXT 501 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 09d391bd34..b0f70de018 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1324,9 +1324,25 @@ static void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags) uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz) { - uint32_t Aff1 = idx / clustersz; - uint32_t Aff0 = idx % clustersz; - return (Aff1 << ARM_AFF1_SHIFT) | Aff0; + uint64_t Aff0 = 0, Aff1 = 0, Aff2 = 0, Aff3 = 0; + int mode; + + if (!kvm_enabled()) { + Aff1 = idx / clustersz; + Aff0 = idx % clustersz; + return (Aff1 << ARM_AFF1_SHIFT) | Aff0; + } + + mode = kvm_check_extension(kvm_state, KVM_CAP_ARM_IPIV_MODE); + if (mode) { + Aff1 = idx % 16; + Aff2 = idx / 16; + } else { + Aff1 = idx / clustersz; + Aff0 = idx % clustersz; + } + return (Aff3 << ARM_AFF3_SHIFT) | (Aff2 << ARM_AFF2_SHIFT) | + (Aff1 << ARM_AFF1_SHIFT) | Aff0; } static void arm_cpu_initfn(Object *obj) -- 2.33.0