From: Cornelia Huck <cohuck@redhat.com> Add an helper to retrieve the writable id reg bitmask. The status of the query is stored in the CPU struct so that an an error, if any, can be reported on vcpu realize(). Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> --- target/arm/cpu.h | 26 ++++++++++++++++++++++++++ target/arm/kvm.c | 32 ++++++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 7 +++++++ 3 files changed, 65 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 2c8f2ffd45..3f57363baf 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -846,6 +846,26 @@ typedef struct { uint32_t map, init, supported; } ARMVQMap; +typedef enum ARMIdRegsState { + WRITABLE_ID_REGS_UNKNOWN, + WRITABLE_ID_REGS_NOT_DISCOVERABLE, + WRITABLE_ID_REGS_FAILED, + WRITABLE_ID_REGS_AVAIL, +} ARMIdRegsState; + +/* + * The following structures are for the purpose of mapping the output of + * KVM_ARM_GET_REG_WRITABLE_MASKS that also may cover id registers we do + * not support in QEMU + * ID registers in op0==3, op1=={0,1,3}, crn=0, crm=={0-7}, op2=={0-7}, + * as used by the KVM_ARM_GET_REG_WRITABLE_MASKS ioctl call. + */ +#define NR_ID_REGS (3 * 8 * 8) + +typedef struct IdRegMap { + uint64_t regs[NR_ID_REGS]; +} IdRegMap; + /* REG is ID_XXX */ #define FIELD_DP64_IDREG(ISAR, REG, FIELD, VALUE) \ ({ \ @@ -1035,6 +1055,12 @@ struct ArchCPU { */ bool host_cpu_probe_failed; + /* + * state of writable id regs query used to report an error, if any, + * on KVM custom vcpu model realize + */ + ARMIdRegsState writable_id_regs; + /* Specify the number of cores in this CPU cluster. Used for the L2CTLR * register. */ diff --git a/target/arm/kvm.c b/target/arm/kvm.c index b6cb525e43..04a880df1e 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -43,6 +43,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { static bool cap_has_mp_state; static bool cap_has_inject_serror_esr; static bool cap_has_inject_ext_dabt; +static int cap_writable_id_regs; static ARMHostCPUFeatures arm_host_cpu_features; @@ -194,6 +195,37 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) env->features = arm_host_cpu_features.features; } +int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap) +{ + struct reg_mask_range range = { + .range = 0, /* up to now only a single range is supported */ + .addr = (uint64_t)idregmap, + }; + int ret; + + if (!kvm_enabled()) { + cpu->writable_id_regs = WRITABLE_ID_REGS_NOT_DISCOVERABLE; + return -ENOSYS; + } + + cap_writable_id_regs = + kvm_check_extension(kvm_state, KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES); + + if (!cap_writable_id_regs || + !(cap_writable_id_regs & (1 << KVM_ARM_FEATURE_ID_RANGE))) { + cpu->writable_id_regs = WRITABLE_ID_REGS_NOT_DISCOVERABLE; + return -ENOSYS; + } + + ret = kvm_vm_ioctl(kvm_state, KVM_ARM_GET_REG_WRITABLE_MASKS, &range); + if (ret) { + cpu->writable_id_regs = WRITABLE_ID_REGS_FAILED; + return ret; + } + cpu->writable_id_regs = WRITABLE_ID_REGS_AVAIL; + return ret; +} + static bool kvm_no_adjvtime_get(Object *obj, Error **errp) { return !ARM_CPU(obj)->kvm_adjvtime; diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 8e9b2039c4..50ae2be9c5 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -461,6 +461,8 @@ void kvm_arm_rme_init_gpa_space(hwaddr highest_gpa, PCIBus *pci_bus); */ Object *kvm_arm_rme_get_measurement_log(void); +int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap); + #else /* @@ -501,6 +503,11 @@ static inline Object *kvm_arm_rme_get_measurement_log(void) return NULL; } +static inline int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap) +{ + return -ENOSYS; +} + /* * These functions should never actually be called without KVM support. */ -- 2.33.0