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[PATCH 0/9] uadk: bigfix
by Qi Tao 09 Jan '25

09 Jan '25

*** BLURB HERE *** Junchong Pan (1): uadk_tool: print help when empty parameters Qi Tao (1): uadk: support appending tag for digest stream model Wenkai Lin (7): uadk: fix for aead authsize check uadk: fix for aead auth key length uadk: fix for digest auth key length uadk: fix for ce key_len check uadk: fix for key address check uadk: fix for v1 aead authsize check uadk: fix for aead cbc mode authsize drv/hisi_sec.c | 40 +++++++++++++------------- drv/isa_ce_sm3.c | 5 ---- uadk_tool/benchmark/uadk_benchmark.c | 6 ++-- uadk_tool/benchmark/uadk_benchmark.h | 1 + uadk_tool/uadk_tool.c | 10 ++++++- v1/drv/hisi_sec_udrv.c | 18 ++---------- v1/wd_aead.c | 41 ++++++++++++++++++++------- v1/wd_cipher.c | 2 +- v1/wd_digest.c | 42 ++++++++++++++++++++++------ v1/wd_digest.h | 19 +++++++++++-- wd_aead.c | 11 +++----- wd_digest.c | 12 ++++---- 12 files changed, 127 insertions(+), 80 deletions(-) -- 2.33.0

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[PATCH] uadk: support appending tag for digest stream model
by Qi Tao 09 Jan '25

09 Jan '25

In common digest stream mode, io_bytes and iv_bytes need to be set to 0 when the final bd is calculated. Therefore, in the appending tag scenario, need to restore the values of io_bytes and iv_bytes to the values before they are set to 0. Therefore, the hardware can compute the overall hash value of the appending packet and the previously calculated packet, and reduce the repeated calculation. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- v1/wd_digest.c | 29 +++++++++++++++++++++++++++-- v1/wd_digest.h | 19 +++++++++++++++++-- 2 files changed, 44 insertions(+), 4 deletions(-) diff --git a/v1/wd_digest.c b/v1/wd_digest.c index c02b3b30..1b665a34 100644 --- a/v1/wd_digest.c +++ b/v1/wd_digest.c @@ -445,7 +445,7 @@ static int param_check(struct wcrypto_digest_ctx *d_ctx, return -WD_EINVAL; } - if (d_opdata[i]->has_next) + if (d_opdata[i]->has_next == WCRYPTO_DIGEST_DOING) ret = stream_mode_param_check(d_ctx, d_opdata[i], num); else ret = block_mode_param_check(d_ctx, d_opdata[i]); @@ -466,6 +466,24 @@ static int param_check(struct wcrypto_digest_ctx *d_ctx, return WD_SUCCESS; } +static int append_tag_restore_status(struct wcrypto_digest_ctx *ctxt, + struct wcrypto_digest_op_data **opdata, + struct wcrypto_digest_msg **req, __u32 ind) +{ + if (opdata[ind]->has_next == WCRYPTO_DIGEST_STREAM_END) + opdata[ind]->has_next = WCRYPTO_DIGEST_END; + else if (opdata[ind]->has_next == WCRYPTO_DIGEST_STREAM_DOING) + opdata[ind]->has_next = WCRYPTO_DIGEST_DOING; + else + return -WD_EINVAL; + + ctxt->io_bytes = *(__u64 *)opdata[ind]->priv; + req[ind]->iv_bytes = opdata[ind]->out_bytes; + opdata[ind]->priv = NULL; + + return WD_SUCCESS; +} + int wcrypto_burst_digest(void *d_ctx, struct wcrypto_digest_op_data **opdata, void **tag, __u32 num) { @@ -483,8 +501,15 @@ int wcrypto_burst_digest(void *d_ctx, struct wcrypto_digest_op_data **opdata, return ret; for (i = 0; i < num; i++) { - cookies[i]->tag.priv = opdata[i]->priv; req[i] = &cookies[i]->msg; + + if (opdata[i]->has_next > WCRYPTO_DIGEST_DOING) { + ret = append_tag_restore_status(ctxt, opdata, req, i); + if (unlikely(ret)) + goto fail_with_cookies; + } + + cookies[i]->tag.priv = opdata[i]->priv; if (tag) cookies[i]->tag.wcrypto_tag.tag = tag[i]; } diff --git a/v1/wd_digest.h b/v1/wd_digest.h index f0bdf4da..07901e3f 100644 --- a/v1/wd_digest.h +++ b/v1/wd_digest.h @@ -76,6 +76,21 @@ enum wcrypto_digest_mode { WCRYPTO_DIGEST_HMAC, }; +/** + * wcrypto_digest_msg_state - Message state of digest + * @WCRYPTO_DIGEST_END: Final message or single block message + * @WCRYPTO_DIGEST_DOING: First message or middle message + * @WCRYPTO_DIGEST_STREAM_END: Final message for appending tag mode + * @WCRYPTO_DIGEST_STREAM_DOING: Middle message for appending tag mode + */ +enum wcrypto_digest_msg_state { + WCRYPTO_DIGEST_END = 0x0, + WCRYPTO_DIGEST_DOING, + WCRYPTO_DIGEST_STREAM_END, + WCRYPTO_DIGEST_STREAM_DOING, + WCRYPTO_DIGEST_MSG_STATE_MAX, +}; + /** * different contexts for different users/threads * @cb: call back functions of user @@ -100,7 +115,7 @@ struct wcrypto_digest_ctx_setup { * @out_bytes:output data size * @priv:reserved data field segment * @status:I/O operation return status - * @has_next: is there next data block + * @has_next: message state, all types are defined in enum wcrypto_digest_msg_state * @iv: initialization verctor data address * @iv_bytes:initialization verctor data size */ @@ -111,7 +126,7 @@ struct wcrypto_digest_op_data { __u32 out_bytes; void *priv; int status; - bool has_next; + int has_next; void *iv; __u32 iv_bytes; }; -- 2.33.0

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2025/1/8 AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 07 Jan '25

07 Jan '25

您好！ sig-AccLib 邀请您参加 2025-01-08 11:00 召开的Zoom会议会议主题：2025/1/8 AccLIb SIG 双周例会 11:00 - 12:00 会议内容：会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet 会议链接：https://us06web.zoom.us/j/83172200317?pwd=nrqT1amyXEaZrWuXb30bWbaJMV2XNv.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2025-01-08 11:00, The subject of the conference is 2025/1/8 AccLIb SIG 双周例会 11:00 - 12:00, Summary: 会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet You can join the meeting at https://us06web.zoom.us/j/83172200317?pwd=nrqT1amyXEaZrWuXb30bWbaJMV2XNv.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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[PATCH] uadk/v1 - add fair lock to replace CAS
by Qi Tao 27 Dec '24

27 Dec '24

From: Yang Shen <shenyang39(a)huawei.com> In Warpdrive sync mode, the driver writes a tag in the SQE to mark the owner and checks this tag when a request is completed. To ensure it functions properly, we added a lock to protect the receiving process. However, pthread_spin_lock is a CAS lock, which results in a situation where a thread can repeatedly acquire the lock while the completed request does not belong to it until timeout. Therefore, we introduce a fair lock to replace pthread_spin_lock. This way, every thread can acquire the lock in a round-robin manner. Signed-off-by: Yang Shen <shenyang39(a)huawei.com> --- v1/drv/hisi_qm_udrv.c | 39 ++++++++++++--------------------------- v1/drv/hisi_qm_udrv.h | 4 ++-- v1/wd_util.c | 31 +++++++++++++++++++++++++++++++ v1/wd_util.h | 8 ++++++++ 4 files changed, 53 insertions(+), 29 deletions(-) diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c index c711a497..7b0183bc 100644 --- a/v1/drv/hisi_qm_udrv.c +++ b/v1/drv/hisi_qm_udrv.c @@ -535,24 +535,11 @@ static int qm_set_queue_info(struct wd_queue *q) goto err_with_regions; } - ret = pthread_spin_init(&info->sd_lock, PTHREAD_PROCESS_PRIVATE); - if (ret) { - WD_ERR("failed to init qinfo sd_lock!\n"); - goto free_cache; - } - - ret = pthread_spin_init(&info->rc_lock, PTHREAD_PROCESS_PRIVATE); - if (ret) { - WD_ERR("failed to init qinfo rc_lock!\n"); - goto uninit_lock; - } + wd_fair_init(&info->sd_lock); + wd_fair_init(&info->rc_lock); return 0; -uninit_lock: - pthread_spin_destroy(&info->sd_lock); -free_cache: - free(info->req_cache); err_with_regions: qm_unset_queue_regions(q); return ret; @@ -593,8 +580,6 @@ void qm_uninit_queue(struct wd_queue *q) struct q_info *qinfo = q->qinfo; struct qm_queue_info *info = qinfo->priv; - pthread_spin_destroy(&info->rc_lock); - pthread_spin_destroy(&info->sd_lock); free(info->req_cache); qm_unset_queue_regions(q); free(qinfo->priv); @@ -624,10 +609,10 @@ int qm_send(struct wd_queue *q, void **req, __u32 num) int ret; __u32 i; - pthread_spin_lock(&info->sd_lock); + wd_fair_lock(&info->sd_lock); if (unlikely((__u32)__atomic_load_n(&info->used, __ATOMIC_RELAXED) > info->sq_depth - num - 1)) { - pthread_spin_unlock(&info->sd_lock); + wd_fair_unlock(&info->sd_lock); WD_ERR("queue is full!\n"); return -WD_EBUSY; } @@ -636,7 +621,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num) ret = info->sqe_fill[qinfo->atype](req[i], qinfo->priv, info->sq_tail_index); if (unlikely(ret != WD_SUCCESS)) { - pthread_spin_unlock(&info->sd_lock); + wd_fair_unlock(&info->sd_lock); WD_ERR("sqe fill error, ret %d!\n", ret); return -WD_EINVAL; } @@ -648,7 +633,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num) } ret = qm_tx_update(info, num); - pthread_spin_unlock(&info->sd_lock); + wd_fair_unlock(&info->sd_lock); return ret; } @@ -681,9 +666,9 @@ static int check_ds_rx_base(struct qm_queue_info *info, return 0; if (before) { - pthread_spin_lock(&info->rc_lock); + wd_fair_lock(&info->rc_lock); qm_rx_from_cache(info, resp, num); - pthread_spin_unlock(&info->rc_lock); + wd_fair_unlock(&info->rc_lock); WD_ERR("wd queue hw error happened before qm receive!\n"); } else { WD_ERR("wd queue hw error happened after qm receive!\n"); @@ -724,7 +709,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) if (unlikely(ret)) return ret; - pthread_spin_lock(&info->rc_lock); + wd_fair_lock(&info->rc_lock); for (i = 0; i < num; i++) { cqe = info->cq_base + info->cq_head_index * sizeof(struct cqe); if (info->cqc_phase != CQE_PHASE(cqe)) @@ -733,7 +718,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) mb(); /* make sure the data is all in memory before read */ sq_head = CQE_SQ_HEAD_INDEX(cqe); if (unlikely(sq_head >= info->sq_depth)) { - pthread_spin_unlock(&info->rc_lock); + wd_fair_unlock(&info->rc_lock); WD_ERR("CQE_SQ_HEAD_INDEX(%u) error\n", sq_head); return -WD_EIO; } @@ -745,7 +730,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) if (!ret) { break; } else if (ret < 0) { - pthread_spin_unlock(&info->rc_lock); + wd_fair_unlock(&info->rc_lock); WD_ERR("recv sqe error %u\n", sq_head); return ret; } @@ -766,7 +751,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) ret = i; } - pthread_spin_unlock(&info->rc_lock); + wd_fair_unlock(&info->rc_lock); return ret; } diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h index 06ac66a0..d71f9de8 100644 --- a/v1/drv/hisi_qm_udrv.h +++ b/v1/drv/hisi_qm_udrv.h @@ -166,8 +166,8 @@ struct qm_queue_info { qm_sqe_parse sqe_parse[WCRYPTO_MAX_ALG]; hisi_qm_sqe_fill_priv sqe_fill_priv; hisi_qm_sqe_parse_priv sqe_parse_priv; - pthread_spinlock_t sd_lock; - pthread_spinlock_t rc_lock; + struct wd_fair_lock sd_lock; + struct wd_fair_lock rc_lock; struct wd_queue *q; int (*sgl_info)(struct hw_sgl_info *info); int (*sgl_init)(void *pool, struct wd_sgl *sgl); diff --git a/v1/wd_util.c b/v1/wd_util.c index 29f65792..3dac2d74 100644 --- a/v1/wd_util.c +++ b/v1/wd_util.c @@ -14,6 +14,7 @@ * limitations under the License. */ +#include <stdatomic.h> #include <stdio.h> #include <string.h> #include <dirent.h> @@ -21,6 +22,7 @@ #include "v1/wd_util.h" #define BYTE_TO_BIT 8 +#define LOCK_TRY_CNT (0x800000000U) void wd_spinlock(struct wd_lock *lock) { @@ -43,6 +45,35 @@ void wd_unspinlock(struct wd_lock *lock) __atomic_store_n(&lock->lock, 0, __ATOMIC_RELEASE); } +void wd_fair_init(struct wd_fair_lock *lock) +{ + atomic_exchange_explicit(&lock->ticket, 0, memory_order_acq_rel); + atomic_exchange_explicit(&lock->serving, 0, memory_order_acq_rel); +} + +void wd_fair_lock(struct wd_fair_lock *lock) +{ + __u32 my_ticket = atomic_fetch_add_explicit(&lock->ticket, 1, + memory_order_acq_rel); + __u32 val = atomic_load_explicit(&lock->serving, memory_order_acquire); + __u64 cnt = 0; + + if (val == my_ticket) + return; + + do { + if (++cnt == LOCK_TRY_CNT) + WD_ERR("failed to get lock with %lu times\n", LOCK_TRY_CNT); + + val = atomic_load_explicit(&lock->serving, memory_order_acquire); + } while (val != my_ticket); +} + +void wd_fair_unlock(struct wd_fair_lock *lock) +{ + atomic_fetch_add_explicit(&lock->serving, 1, memory_order_acq_rel); +} + void *drv_iova_map(struct wd_queue *q, void *va, size_t sz) { struct q_info *qinfo = q->qinfo; diff --git a/v1/wd_util.h b/v1/wd_util.h index 21137d2d..70f9ed92 100644 --- a/v1/wd_util.h +++ b/v1/wd_util.h @@ -111,6 +111,11 @@ struct wd_lock { __u8 lock; }; +struct wd_fair_lock { + volatile __u32 ticket; + volatile __u32 serving; +}; + struct wd_ss_region { void *va; unsigned long long pa; @@ -392,6 +397,9 @@ static inline uint32_t wd_reg_read(void *reg_addr) void wd_spinlock(struct wd_lock *lock); void wd_unspinlock(struct wd_lock *lock); +void wd_fair_init(struct wd_fair_lock *lock); +void wd_fair_lock(struct wd_fair_lock *lock); +void wd_fair_unlock(struct wd_fair_lock *lock); void *wd_drv_mmap_qfr(struct wd_queue *q, enum uacce_qfrt qfrt, size_t size); void wd_drv_unmmap_qfr(struct wd_queue *q, void *addr, enum uacce_qfrt qfrt, size_t size); -- 2.33.0

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2024/12/25 AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 24 Dec '24

24 Dec '24

您好！ sig-AccLib 邀请您参加 2024-12-25 11:00 召开的Zoom会议会议主题：2024/12/25 AccLIb SIG 双周例会 11:00 - 12:00 会议内容：会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet 会议链接：https://us06web.zoom.us/j/87231569205?pwd=h4OaT6BML3ZmPXDiWL8aCUJSx2opeH.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-12-25 11:00, The subject of the conference is 2024/12/25 AccLIb SIG 双周例会 11:00 - 12:00, Summary: 会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet You can join the meeting at https://us06web.zoom.us/j/87231569205?pwd=h4OaT6BML3ZmPXDiWL8aCUJSx2opeH.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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[PATCH 00/13] uadk: sync some bugfix and cleancode
by Qi Tao 24 Dec '24

24 Dec '24

*** BLURB HERE *** Chenghai Huang (1): uadk - fix the log frequency limit function Qi Tao (2): uadk: add compilation options uadk_tool: fix error in saving the aead dst data Wenkai Lin (7): uadk: fix for set hashagg session state uadk/v1: support the hmac(sm3)-cbc(sm4) algorithm uadk: fix for the algorithm name of the aead cbc mode uadk/v1: Add stream mode for AES-GCM and SM4-GCM uadk/v1: add assoc bytes check uadk/v1: set aead msg state for the hardware v2 uadk/v1: fix input length check for aead stream mode. Zhiqi Song (3): uadk/hpre: modify privkey transform method of ecc v1/hpre: modify privkey transform method of ecc uadk/v1: cleanup key format transform function Makefile.am | 17 +- drv/hash_mb/hash_mb.c | 4 + drv/hisi_comp.c | 6 +- drv/hisi_dae.c | 34 ++- drv/hisi_hpre.c | 18 +- drv/hisi_sec.c | 8 +- include/crypto/sm4.h | 18 ++ include/wd_rsa.h | 2 - include/wd_util.h | 10 +- lib/crypto/sm4.c | 176 ++++++++++++++ uadk_tool/benchmark/sec_uadk_benchmark.c | 6 + uadk_tool/benchmark/uadk_benchmark.c | 6 +- uadk_tool/test/test_sec.c | 4 +- v1/drv/hisi_hpre_udrv.c | 28 +-- v1/drv/hisi_qm_udrv.c | 12 +- v1/drv/hisi_sec_udrv.c | 296 ++++++++++++++++++++++- v1/drv/hisi_sec_udrv.h | 9 +- v1/drv/hisi_zip_udrv.c | 26 +- v1/test/hisi_sec_test/test_hisi_sec.c | 4 +- v1/wd_adapter.c | 4 +- v1/wd_adapter.h | 2 +- v1/wd_aead.c | 67 ++++- v1/wd_aead.h | 12 + v1/wd_cipher.c | 2 +- v1/wd_digest.c | 6 +- v1/wd_ecc.c | 10 +- wd.c | 2 +- wd_aead.c | 10 +- wd_agg.c | 43 ++-- wd_alg.c | 2 + wd_cipher.c | 6 +- wd_comp.c | 16 +- wd_digest.c | 14 +- wd_ecc.c | 13 - wd_mempool.c | 2 +- wd_rsa.c | 6 +- wd_util.c | 16 +- 37 files changed, 739 insertions(+), 178 deletions(-) create mode 100644 include/crypto/sm4.h create mode 100644 lib/crypto/sm4.c -- 2.33.0

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[PATCH v3 00/10] uadk_prov: add new algs
by Qi Tao 19 Dec '24

19 Dec '24

*** BLURB HERE *** Chenghai Huang (1): uadk_provider: add aead alg for uadk_provider in openssl3.0 Qi Tao (1): uadk_provider/rsa: cleanup variable definition and return value Weili Qian (6): uadk_provider: move functions to uadk_prov_pkey.c uadk_provider: add query_operation_name callback for keymgmt uadk_provider: support ec keymgmt hardware acceleration uadk_provider: support ecdh keyexch hardware acceleration uadk_provider: use default provider to get random data uadk_provider: alloc memory when copying ctx Zhiqi Song (1): uadk_provider: support x448 alg lizhi (1): uadk_engine: clear some compilation warnings, specific cleanup is as follows. src/Makefile.am | 20 +- src/uadk_aead.c | 2 +- src/uadk_prov.h | 12 +- src/uadk_prov_aead.c | 1030 +++++++++++++++++++++++++++++++ src/uadk_prov_bio.c | 2 + src/uadk_prov_cipher.c | 6 +- src/uadk_prov_der_writer.c | 2 +- src/uadk_prov_dh.c | 17 +- src/uadk_prov_digest.c | 38 +- src/uadk_prov_ec_kmgmt.c | 746 +++++++++++++++++++++++ src/uadk_prov_ecdh_exch.c | 884 +++++++++++++++++++++++++++ src/uadk_prov_ecx.c | 1164 ++++++++++++++++++++++++++++++++++++ src/uadk_prov_ffc.c | 24 +- src/uadk_prov_ffc.h | 1 - src/uadk_prov_init.c | 33 +- src/uadk_prov_pkey.c | 191 +++++- src/uadk_prov_pkey.h | 28 +- src/uadk_prov_rsa.c | 326 +++++----- src/uadk_prov_sm2.c | 71 +-- 19 files changed, 4329 insertions(+), 268 deletions(-) create mode 100644 src/uadk_prov_aead.c create mode 100644 src/uadk_prov_ec_kmgmt.c create mode 100644 src/uadk_prov_ecdh_exch.c create mode 100644 src/uadk_prov_ecx.c -- 2.33.0

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[PATCH v2 0/6] fix compination warnings.
by Qi Tao 17 Dec '24

17 Dec '24

*** BLURB HERE *** Chenghai Huang (1): uadk_provider: add aead alg for uadk_provider in openssl3.0 Weili Qian (4): uadk_provider: move functions to uadk_prov_pkey.c uadk_provider: add query_operation_name callback for keymgmt uadk_provider: support ec keymgmt hardware acceleration uadk_provider: support ecdh keyexch hardware acceleration Zhiqi Song (1): uadk_provider: support x448 alg src/Makefile.am | 4 +- src/uadk_prov.h | 12 +- src/uadk_prov_aead.c | 1030 ++++++++++++++++++++++++++++++++ src/uadk_prov_dh.c | 8 + src/uadk_prov_ec_kmgmt.c | 746 +++++++++++++++++++++++ src/uadk_prov_ecdh_exch.c | 884 +++++++++++++++++++++++++++ src/uadk_prov_ecx.c | 1192 +++++++++++++++++++++++++++++++++++++ src/uadk_prov_init.c | 24 +- src/uadk_prov_pkey.c | 183 +++++- src/uadk_prov_pkey.h | 26 +- src/uadk_prov_rsa.c | 8 + src/uadk_prov_sm2.c | 71 +-- 12 files changed, 4121 insertions(+), 67 deletions(-) create mode 100644 src/uadk_prov_aead.c create mode 100644 src/uadk_prov_ec_kmgmt.c create mode 100644 src/uadk_prov_ecdh_exch.c create mode 100644 src/uadk_prov_ecx.c -- 2.33.0

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【2024/12/11 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 10 Dec '24

10 Dec '24

您好！ sig-AccLib 邀请您参加 2024-12-11 11:00 召开的Zoom会议会议主题：【2024/12/11 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet 会议链接：https://us06web.zoom.us/j/84094811406?pwd=oVaPaIyP4VXx7aFiZFhAWFbla5JJ2j.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-12-11 11:00, The subject of the conference is 【2024/12/11 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet You can join the meeting at https://us06web.zoom.us/j/84094811406?pwd=oVaPaIyP4VXx7aFiZFhAWFbla5JJ2j.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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[PATCH OLK-6.6 0/7] uacce: fix some problems
by Yang Shen 06 Dec '24

06 Dec '24

From: JiangShui Yang <yangjiangshui(a)h-partners.com> Chenghai Huang (1): crypto: hisilicon/zip - correct the wrong word in the printed information Longfang Liu (1): migration: modify dfx error type without VM driver Weili Qian (1): uacce: check the qfr address before releasing the qfr Yang Shen (4): uacce: add error number for the unsupported mremap uacce: add stop_queue to replace put_queue in ioctl uacce: add mutex for check qfr crypto: hisilicon/qm - fix the uacce_alloc return value check drivers/crypto/hisilicon/qm.c | 8 ++ drivers/crypto/hisilicon/zip/zip_crypto.c | 2 +- drivers/misc/uacce/uacce.c | 76 ++++++++++++------- .../vfio/pci/hisilicon/hisi_acc_vfio_pci.c | 2 +- 4 files changed, 60 insertions(+), 28 deletions(-) -- 2.43.0

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[PATCH 1/8] uadk_provider: add aead alg for uadk_provider in openssl3.0
by Qi Tao 04 Dec '24

04 Dec '24

From: Chenghai Huang <huangchenghai2(a)huawei.com> The following 3 AES algorithms are added: AES-128-GCM AES-192-GCM AES-256-GCM Signed-off-by: Chenghai Huang <huangchenghai2(a)huawei.com> --- src/Makefile.am | 2 +- src/uadk_prov.h | 4 + src/uadk_prov_aead.c | 1028 ++++++++++++++++++++++++++++++++++++++++++ src/uadk_prov_init.c | 7 + 4 files changed, 1040 insertions(+), 1 deletion(-) create mode 100644 src/uadk_prov_aead.c diff --git a/src/Makefile.am b/src/Makefile.am index 54c00e7..921305b 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -65,7 +65,7 @@ uadk_provider_la_SOURCES=uadk_prov_init.c uadk_async.c uadk_utils.c \ uadk_prov_rsa.c uadk_prov_dh.c \ uadk_prov_bio.c uadk_prov_der_writer.c uadk_prov_packet.c \ uadk_prov_pkey.c uadk_prov_sm2.c \ - uadk_prov_ffc.c + uadk_prov_ffc.c uadk_prov_aead.c uadk_provider_la_LDFLAGS=-module -version-number $(VERSION) uadk_provider_la_LIBADD=$(WD_LIBS) -lpthread diff --git a/src/uadk_prov.h b/src/uadk_prov.h index 8756fc6..ac82245 100644 --- a/src/uadk_prov.h +++ b/src/uadk_prov.h @@ -162,6 +162,9 @@ extern const OSSL_DISPATCH uadk_sm4_ecb_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sm4_ofb128_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sm4_cfb128_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sm4_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_gcm_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_gcm_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_gcm_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_des_ede3_cbc_functions[]; extern const OSSL_DISPATCH uadk_des_ede3_ecb_functions[]; @@ -178,6 +181,7 @@ extern const OSSL_DISPATCH uadk_sm2_asym_cipher_functions[FUNC_MAX_NUM]; void uadk_prov_destroy_digest(void); void uadk_prov_destroy_cipher(void); +void uadk_prov_destroy_aead(void); void uadk_prov_destroy_rsa(void); void uadk_prov_destroy_dh(void); void uadk_prov_sm2_uninit(void); diff --git a/src/uadk_prov_aead.c b/src/uadk_prov_aead.c new file mode 100644 index 0000000..c396f39 --- /dev/null +++ b/src/uadk_prov_aead.c @@ -0,0 +1,1028 @@ +// SPDX-License-Identifier: Apache-2.0 +/* + * Copyright 2023-2024 Huawei Technologies Co.,Ltd. All rights reserved. + * Copyright 2023-2024 Linaro ltd. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#include <stdio.h> +#include <stdbool.h> +#include <string.h> +#include <dlfcn.h> +#include <numa.h> +#include <openssl/core_names.h> +#include <openssl/proverr.h> +#include <uadk/wd_aead.h> +#include <uadk/wd_sched.h> +#include "uadk.h" +#include "uadk_async.h" +#include "uadk_prov.h" + +#define MAX_IV_LEN 16 +#define MAX_KEY_LEN 64 +#define MAX_AAD_LEN 0xFFFF +#define ALG_NAME_SIZE 128 +#define AES_GCM_TAG_LEN 16 +/* The max data length is 16M-512B */ +#define AEAD_BLOCK_SIZE 0xFFFE00 + +#define UADK_OSSL_FAIL 0 +#define UADK_AEAD_SUCCESS 1 +#define UADK_AEAD_FAIL (-1) + +#define UNINITIALISED_SIZET ((size_t)-1) +#define IV_STATE_UNINITIALISED 0 +#define IV_STATE_SET 1 +#define KEY_STATE_SET 1 + +/* Internal flags that can be queried */ +#define PROV_CIPHER_FLAG_AEAD 0x0001 +#define PROV_CIPHER_FLAG_CUSTOM_IV 0x0002 +#define AEAD_FLAGS (PROV_CIPHER_FLAG_AEAD | PROV_CIPHER_FLAG_CUSTOM_IV) + +#define UADK_AEAD_DEF_CTXS 2 +#define UADK_AEAD_OP_NUM 1 + +struct aead_prov { + int pid; +}; +static struct aead_prov aprov; +static pthread_mutex_t aead_mutex = PTHREAD_MUTEX_INITIALIZER; + +enum uadk_aead_mode { + UNINIT_MODE, + ASYNC_MODE, + SYNC_MODE +}; + +enum aead_tag_status { + INIT_TAG, + READ_TAG, /* The MAC has been read. */ + SET_TAG /* The MAC has been set to req. */ +}; + +struct aead_priv_ctx { + int nid; + char alg_name[ALG_NAME_SIZE]; + size_t keylen; + size_t ivlen; + size_t taglen; + + unsigned int enc : 1; + unsigned int key_set : 1; /* Whether key is copied to priv key buffers */ + unsigned int iv_set : 1; /* Whether iv is copied to priv iv buffers */ + enum aead_tag_status tag_set; /* Whether mac is copied to priv mac buffers */ + + unsigned char iv[MAX_IV_LEN]; + unsigned char key[MAX_KEY_LEN]; + unsigned char buf[AES_GCM_TAG_LEN]; /* mac buffers */ + unsigned char *data; /* store input and output when block mode */ + + struct wd_aead_sess_setup setup; + struct wd_aead_req req; + enum uadk_aead_mode mode; + handle_t sess; +}; + +struct aead_info { + int nid; + enum wd_cipher_alg alg; + enum wd_cipher_mode mode; +}; + +static struct aead_info aead_info_table[] = { + { NID_aes_128_gcm, WD_CIPHER_AES, WD_CIPHER_GCM }, + { NID_aes_192_gcm, WD_CIPHER_AES, WD_CIPHER_GCM }, + { NID_aes_256_gcm, WD_CIPHER_AES, WD_CIPHER_GCM } +}; + +static int uadk_aead_poll(void *ctx) +{ + __u64 rx_cnt = 0; + __u32 recv = 0; + /* Poll one packet currently */ + int expt = 1; + int ret; + + do { + ret = wd_aead_poll(expt, &recv); + if (ret < 0 || recv >= expt) + return ret; + rx_cnt++; + } while (rx_cnt < ENGINE_RECV_MAX_CNT); + + fprintf(stderr, "failed to poll msg: timeout!\n"); + + return -ETIMEDOUT; +} + +static void uadk_aead_mutex_infork(void) +{ + /* Release the replication lock of the child process */ + pthread_mutex_unlock(&aead_mutex); +} + +static int uadk_prov_aead_dev_init(struct aead_priv_ctx *priv) +{ + struct wd_ctx_nums ctx_set_num; + struct wd_ctx_params cparams = {0}; + int ret = UADK_AEAD_SUCCESS; + + pthread_atfork(NULL, NULL, uadk_aead_mutex_infork); + pthread_mutex_lock(&aead_mutex); + if (aprov.pid == getpid()) + goto mutex_unlock; + + cparams.op_type_num = UADK_AEAD_OP_NUM; + cparams.ctx_set_num = &ctx_set_num; + cparams.bmp = numa_allocate_nodemask(); + if (!cparams.bmp) { + ret = UADK_AEAD_FAIL; + fprintf(stderr, "failed to create nodemask!\n"); + goto mutex_unlock; + } + + numa_bitmask_setall(cparams.bmp); + + ctx_set_num.sync_ctx_num = UADK_AEAD_DEF_CTXS; + ctx_set_num.async_ctx_num = UADK_AEAD_DEF_CTXS; + + ret = wd_aead_init2_(priv->alg_name, TASK_MIX, SCHED_POLICY_RR, &cparams); + if (unlikely(ret)) { + ret = UADK_AEAD_FAIL; + fprintf(stderr, "failed to init aead!\n"); + goto free_nodemask; + } + + aprov.pid = getpid(); + async_register_poll_fn(ASYNC_TASK_AEAD, uadk_aead_poll); + +free_nodemask: + numa_free_nodemask(cparams.bmp); +mutex_unlock: + pthread_mutex_unlock(&aead_mutex); + return ret; +} + +static int uadk_prov_aead_ctx_init(struct aead_priv_ctx *priv) +{ + struct sched_params params = {0}; + int ret; + + if (!priv->key_set || !priv->iv_set) { + fprintf(stderr, "key or iv is not set yet!\n"); + return UADK_AEAD_FAIL; + } + + priv->req.iv_bytes = priv->ivlen; + priv->req.iv = priv->iv; + priv->req.out_bytes = 0; + priv->req.mac = priv->buf; + priv->req.mac_bytes = priv->taglen; + + ret = uadk_prov_aead_dev_init(priv); + if (unlikely(ret < 0)) + return UADK_AEAD_FAIL; + + /* dec and enc use the same op */ + params.type = 0; + /* Use the default numa parameters */ + params.numa_id = -1; + priv->setup.sched_param = &params; + + if (!priv->sess) { + priv->sess = wd_aead_alloc_sess(&priv->setup); + if (!priv->sess) { + fprintf(stderr, "uadk failed to alloc session!\n"); + return UADK_AEAD_FAIL; + } + + ret = wd_aead_set_authsize(priv->sess, priv->taglen); + if (ret) { + fprintf(stderr, "uadk failed to set authsize!\n"); + goto free_sess; + } + + ret = wd_aead_set_ckey(priv->sess, priv->key, priv->keylen); + if (ret) { + fprintf(stderr, "uadk failed to set key!\n"); + goto free_sess; + } + } + + return UADK_AEAD_SUCCESS; + +free_sess: + wd_aead_free_sess(priv->sess); + priv->sess = 0; + return UADK_AEAD_FAIL; +} + +static void *uadk_prov_aead_cb(struct wd_aead_req *req, void *data) +{ + struct uadk_e_cb_info *cb_param; + struct wd_aead_req *req_origin; + struct async_op *op; + + if (!req) + return NULL; + + cb_param = req->cb_param; + if (!cb_param) + return NULL; + + req_origin = cb_param->priv; + req_origin->state = req->state; + + op = cb_param->op; + if (op && op->job && !op->done) { + op->done = 1; + async_free_poll_task(op->idx, 1); + async_wake_job(op->job); + } + + return NULL; +} + +static int do_aes_gcm_prepare(struct aead_priv_ctx *priv) +{ + if (priv->mode == UNINIT_MODE) { + if (ASYNC_get_current_job()) + priv->mode = ASYNC_MODE; + else + priv->mode = SYNC_MODE; + } + + if (!priv->enc && priv->tag_set == READ_TAG) { + if (likely(priv->taglen == AES_GCM_TAG_LEN)) { + memcpy(priv->req.mac, priv->buf, AES_GCM_TAG_LEN); + priv->tag_set = SET_TAG; + } else { + fprintf(stderr, "invalid: aead gcm mac length only support 16B.\n"); + return UADK_AEAD_FAIL; + } + } + + return UADK_AEAD_SUCCESS; +} + +static void uadk_do_aead_async_prepare(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen) +{ + priv->req.in_bytes = inlen; + /* AAD data is input or output together with plaintext or ciphertext. */ + if (priv->req.assoc_bytes) { + memcpy(priv->data + priv->req.assoc_bytes, in, inlen); + priv->req.src = priv->data; + priv->req.dst = priv->data + AEAD_BLOCK_SIZE; + } else { + priv->req.src = (unsigned char *)in; + priv->req.dst = out; + } +} + +static int uadk_do_aead_sync_inner(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen, enum wd_aead_msg_state state) +{ + int ret; + + if ((state == AEAD_MSG_BLOCK || state == AEAD_MSG_END) + && !priv->enc && priv->tag_set != SET_TAG) { + fprintf(stderr, "The tag for synchronous decryption is not set.\n"); + return UADK_AEAD_FAIL; + } + + priv->req.msg_state = state; + priv->req.src = in; + priv->req.dst = out; + priv->req.in_bytes = inlen; + priv->req.state = 0; + ret = wd_do_aead_sync(priv->sess, &priv->req); + if (unlikely(ret < 0 || priv->req.state)) { + fprintf(stderr, "do aead task failed, msg state: %u, ret: %d, state: %u!\n", + state, ret, priv->req.state); + return UADK_AEAD_FAIL; + } + + return inlen; +} + +static int uadk_do_aead_sync(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen) +{ + size_t nbytes, tail, processing_len, max_mid_len; + const unsigned char *in_block = in; + unsigned char *out_block = out; + int ret; + + /* Due to a hardware limitation, zero-length aad using block mode. */ + if (!priv->req.assoc_bytes) + return uadk_do_aead_sync_inner(priv, out, in, inlen, AEAD_MSG_BLOCK); + + tail = inlen % AES_BLOCK_SIZE; + nbytes = inlen - tail; + max_mid_len = AEAD_BLOCK_SIZE - priv->req.assoc_bytes; + + /* If the data length is not 16-byte aligned, it is split according to the protocol. */ + while (nbytes > 0) { + processing_len = nbytes > max_mid_len ? max_mid_len : nbytes; + processing_len -= (processing_len % AES_BLOCK_SIZE); + + ret = uadk_do_aead_sync_inner(priv, out_block, in_block, + processing_len, AEAD_MSG_MIDDLE); + if (ret < 0) + return UADK_AEAD_FAIL; + nbytes -= processing_len; + in_block = in_block + processing_len; + out_block = out_block + processing_len; + } + + if (tail) { + ret = uadk_do_aead_sync_inner(priv, out_block, in_block, tail, AEAD_MSG_END); + if (ret < 0) + return UADK_AEAD_FAIL; + } + + return inlen; +} + +static int uadk_do_aead_async(struct aead_priv_ctx *priv, struct async_op *op, + unsigned char *out, const unsigned char *in, size_t inlen) +{ + struct uadk_e_cb_info *cb_param; + int cnt = 0; + int ret; + + if (!priv->enc && priv->tag_set != SET_TAG) { + fprintf(stderr, "The tag for asynchronous decryption is not set.\n"); + return UADK_AEAD_FAIL; + } + + if (unlikely(priv->req.assoc_bytes + inlen > AEAD_BLOCK_SIZE)) { + fprintf(stderr, "aead input data length is too long!\n"); + return UADK_AEAD_FAIL; + } + + uadk_do_aead_async_prepare(priv, out, in, inlen); + + cb_param = malloc(sizeof(struct uadk_e_cb_info)); + if (unlikely(!cb_param)) { + fprintf(stderr, "failed to alloc cb_param.\n"); + return UADK_AEAD_FAIL; + } + + cb_param->op = op; + cb_param->priv = &priv->req; + priv->req.cb = uadk_prov_aead_cb; + priv->req.cb_param = cb_param; + priv->req.msg_state = AEAD_MSG_BLOCK; + priv->req.state = UADK_AEAD_FAIL; + + ret = async_get_free_task(&op->idx); + if (unlikely(!ret)) + goto free_cb_param; + + do { + ret = wd_do_aead_async(priv->sess, &priv->req); + if (unlikely(ret < 0)) { + if (unlikely(ret != -EBUSY)) + fprintf(stderr, "do aead async operation failed ret = %d.\n", ret); + else if (unlikely(cnt++ > ENGINE_SEND_MAX_CNT)) + fprintf(stderr, "do aead async operation timeout.\n"); + else + continue; + + async_free_poll_task(op->idx, 0); + ret = UADK_AEAD_FAIL; + goto free_cb_param; + } + } while (ret == -EBUSY); + + ret = async_pause_job(priv, op, ASYNC_TASK_AEAD); + if (unlikely(!ret || priv->req.state)) { + fprintf(stderr, "do aead async job failed, ret: %d, state: %u!\n", + ret, priv->req.state); + ret = UADK_AEAD_FAIL; + goto free_cb_param; + } + + if (priv->req.assoc_bytes) + memcpy(out, priv->req.dst + priv->req.assoc_bytes, inlen); + +free_cb_param: + free(cb_param); + return ret; +} + +static int uadk_prov_do_aes_gcm_first(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen) +{ + int ret; + + if (inlen > MAX_AAD_LEN) { + fprintf(stderr, "the aad len is out of range, aad len = %lu.\n", inlen); + return UADK_AEAD_FAIL; + } + + priv->req.assoc_bytes = inlen; + + /* Asynchronous jobs use the block mode. */ + if (priv->mode == ASYNC_MODE || !priv->req.assoc_bytes) { + memcpy(priv->data, in, inlen); + return UADK_AEAD_SUCCESS; + } + + ret = uadk_do_aead_sync_inner(priv, out, in, inlen, AEAD_MSG_FIRST); + if (unlikely(ret < 0)) + return UADK_AEAD_FAIL; + + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_do_aes_gcm_update(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen) +{ + struct async_op *op; + int ret; + + if (priv->mode == ASYNC_MODE) { + op = malloc(sizeof(struct async_op)); + if (unlikely(!op)) + return UADK_AEAD_FAIL; + + ret = async_setup_async_event_notification(op); + if (unlikely(!ret)) { + fprintf(stderr, "failed to setup async event notification.\n"); + goto free_op; + } + + ret = uadk_do_aead_async(priv, op, out, in, inlen); + if (unlikely(ret < 0)) { + fprintf(stderr, "uadk_do_aead_async failed ret = %d.\n", ret); + goto free_notification; + } + + free(op); + return inlen; + } + + return uadk_do_aead_sync(priv, out, in, inlen); + +free_notification: + (void)async_clear_async_event_notification(); +free_op: + free(op); + return UADK_AEAD_FAIL; +} + +static int uadk_prov_do_aes_gcm_final(struct aead_priv_ctx *priv, unsigned char *out, + const unsigned char *in, size_t inlen) +{ + int ret; + + if (priv->mode == ASYNC_MODE || !priv->req.assoc_bytes || + priv->req.msg_state == AEAD_MSG_END) + goto out; + + ret = uadk_do_aead_sync_inner(priv, out, in, inlen, AEAD_MSG_END); + if (unlikely(ret < 0)) + return UADK_AEAD_FAIL; + +out: + if (priv->enc) + memcpy(priv->buf, priv->req.mac, priv->taglen); + else + priv->tag_set = INIT_TAG; + + priv->mode = UNINIT_MODE; + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_do_aes_gcm(struct aead_priv_ctx *priv, unsigned char *out, + size_t *outl, size_t outsize, + const unsigned char *in, size_t inlen) +{ + int ret; + + ret = uadk_prov_aead_ctx_init(priv); + if (ret != UADK_AEAD_SUCCESS) + return UADK_AEAD_FAIL; + + ret = do_aes_gcm_prepare(priv); + if (unlikely(ret < 0)) + return UADK_AEAD_FAIL; + + if (in) { + if (!out) + return uadk_prov_do_aes_gcm_first(priv, out, in, inlen); + + return uadk_prov_do_aes_gcm_update(priv, out, in, inlen); + } + + return uadk_prov_do_aes_gcm_final(priv, out, NULL, 0); +} + +void uadk_prov_destroy_aead(void) +{ + pthread_mutex_lock(&aead_mutex); + if (aprov.pid == getpid()) { + wd_aead_uninit2(); + aprov.pid = 0; + } + pthread_mutex_unlock(&aead_mutex); +} + +static OSSL_FUNC_cipher_encrypt_init_fn uadk_prov_aead_einit; +static OSSL_FUNC_cipher_decrypt_init_fn uadk_prov_aead_dinit; +static OSSL_FUNC_cipher_freectx_fn uadk_prov_aead_freectx; +static OSSL_FUNC_cipher_dupctx_fn uadk_prov_aead_dupctx; +static OSSL_FUNC_cipher_get_ctx_params_fn uadk_prov_aead_get_ctx_params; +static OSSL_FUNC_cipher_gettable_ctx_params_fn uadk_prov_aead_gettable_ctx_params; +static OSSL_FUNC_cipher_set_ctx_params_fn uadk_prov_aead_set_ctx_params; +static OSSL_FUNC_cipher_settable_ctx_params_fn uadk_prov_aead_settable_ctx_params; + +static int uadk_prov_aead_cipher(void *vctx, unsigned char *out, size_t *outl, + size_t outsize, const unsigned char *in, + size_t inl) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + int ret; + + if (!vctx || !out || !outl) + return UADK_OSSL_FAIL; + + if (outsize < inl) { + ERR_raise(ERR_LIB_PROV, PROV_R_OUTPUT_BUFFER_TOO_SMALL); + return UADK_OSSL_FAIL; + } + + ret = uadk_prov_do_aes_gcm(priv, out, outl, outsize, in, inl); + if (ret < 0) + return UADK_OSSL_FAIL; + + *outl = inl; + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_aead_stream_update(void *vctx, unsigned char *out, + size_t *outl, size_t outsize, + const unsigned char *in, size_t inl) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + int ret; + + if (!vctx) + return UADK_OSSL_FAIL; + + if (outsize < inl) { + ERR_raise(ERR_LIB_PROV, PROV_R_OUTPUT_BUFFER_TOO_SMALL); + return UADK_OSSL_FAIL; + } + + ret = uadk_prov_do_aes_gcm(priv, out, outl, outsize, in, inl); + if (ret < 0) { + fprintf(stderr, "stream data update failed.\n"); + return UADK_OSSL_FAIL; + } + + *outl = inl; + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_aead_stream_final(void *vctx, unsigned char *out, + size_t *outl, size_t outsize) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + int ret; + + if (!vctx || !out || !outl) + return UADK_OSSL_FAIL; + + ret = uadk_prov_do_aes_gcm(priv, out, outl, outsize, NULL, 0); + if (ret < 0) { + fprintf(stderr, "stream data final failed, ret = %d\n", ret); + return UADK_OSSL_FAIL; + } + + *outl = 0; + return UADK_AEAD_SUCCESS; +} + +static int uadk_get_aead_info(struct aead_priv_ctx *priv) +{ + int aead_counts = ARRAY_SIZE(aead_info_table); + int i; + + for (i = 0; i < aead_counts; i++) { + if (priv->nid == aead_info_table[i].nid) { + priv->setup.calg = aead_info_table[i].alg; + priv->setup.cmode = aead_info_table[i].mode; + break; + } + } + + if (unlikely(i == aead_counts)) { + fprintf(stderr, "failed to setup the private ctx.\n"); + return UADK_AEAD_FAIL; + } + + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_aead_init(struct aead_priv_ctx *priv, + const unsigned char *key, size_t keylen, + const unsigned char *iv, size_t ivlen) +{ + int ret; + + if (ivlen > MAX_IV_LEN || keylen > MAX_KEY_LEN) { + fprintf(stderr, "invalid keylen or ivlen.\n"); + return UADK_OSSL_FAIL; + } + + if (iv) { + memcpy(priv->iv, iv, ivlen); + priv->iv_set = IV_STATE_SET; + } + + ret = uadk_get_aead_info(priv); + if (unlikely(ret < 0)) + return UADK_OSSL_FAIL; + + if (key) { + memcpy(priv->key, key, keylen); + priv->key_set = KEY_STATE_SET; + } + + ret = uadk_prov_aead_dev_init(priv); + if (unlikely(ret < 0)) + return UADK_OSSL_FAIL; + + return UADK_AEAD_SUCCESS; +} + +static int uadk_prov_aead_einit(void *vctx, const unsigned char *key, size_t keylen, + const unsigned char *iv, size_t ivlen, + const OSSL_PARAM params[]) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + + if (!vctx) + return UADK_OSSL_FAIL; + + priv->req.op_type = WD_CIPHER_ENCRYPTION_DIGEST; + priv->enc = 1; + + return uadk_prov_aead_init(priv, key, keylen, iv, ivlen); +} + +static int uadk_prov_aead_dinit(void *vctx, const unsigned char *key, size_t keylen, + const unsigned char *iv, size_t ivlen, + const OSSL_PARAM params[]) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + + if (!vctx) + return UADK_OSSL_FAIL; + + priv->req.op_type = WD_CIPHER_DECRYPTION_DIGEST; + priv->enc = 0; + + return uadk_prov_aead_init(priv, key, keylen, iv, ivlen); +} + +static const OSSL_PARAM uadk_prov_settable_ctx_params[] = { + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_KEYLEN, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_AEAD_IVLEN, NULL), + OSSL_PARAM_octet_string(OSSL_CIPHER_PARAM_AEAD_TAG, NULL, 0), + OSSL_PARAM_END +}; + +const OSSL_PARAM *uadk_prov_aead_settable_ctx_params(ossl_unused void *cctx, + ossl_unused void *provctx) +{ + return uadk_prov_settable_ctx_params; +} + +static int uadk_prov_aead_set_ctx_params(void *vctx, const OSSL_PARAM params[]) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + const OSSL_PARAM *p; + size_t sz = 0; + void *vp; + + if (!vctx) + return UADK_OSSL_FAIL; + + p = OSSL_PARAM_locate_const(params, OSSL_CIPHER_PARAM_AEAD_TAG); + if (p) { + vp = priv->buf; + if (!OSSL_PARAM_get_octet_string(p, &vp, EVP_GCM_TLS_TAG_LEN, &sz)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_GET_PARAMETER); + return UADK_OSSL_FAIL; + } + + if (sz == 0 || priv->enc) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_TAG); + return UADK_OSSL_FAIL; + } + priv->tag_set = READ_TAG; + priv->taglen = sz; + } + + p = OSSL_PARAM_locate_const(params, OSSL_CIPHER_PARAM_KEYLEN); + if (p) { + size_t keylen; + + if (!OSSL_PARAM_get_size_t(p, &keylen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_GET_PARAMETER); + return UADK_OSSL_FAIL; + } + if (priv->keylen != keylen) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_KEY_LENGTH); + return UADK_OSSL_FAIL; + } + } + + p = OSSL_PARAM_locate_const(params, OSSL_CIPHER_PARAM_AEAD_IVLEN); + if (p) { + if (!OSSL_PARAM_get_size_t(p, &sz)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_GET_PARAMETER); + return UADK_OSSL_FAIL; + } + if (sz == 0 || sz > priv->ivlen) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_IV_LENGTH); + return UADK_OSSL_FAIL; + } + priv->ivlen = sz; + } + + return UADK_AEAD_SUCCESS; +} + +static const OSSL_PARAM uadk_prov_aead_ctx_params[] = { + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_KEYLEN, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_IVLEN, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_AEAD_TAGLEN, NULL), + OSSL_PARAM_octet_string(OSSL_CIPHER_PARAM_IV, NULL, 0), + OSSL_PARAM_octet_string(OSSL_CIPHER_PARAM_UPDATED_IV, NULL, 0), + OSSL_PARAM_octet_string(OSSL_CIPHER_PARAM_AEAD_TAG, NULL, 0), + OSSL_PARAM_END +}; + +static const OSSL_PARAM *uadk_prov_aead_gettable_ctx_params(ossl_unused void *cctx, + ossl_unused void *provctx) +{ + return uadk_prov_aead_ctx_params; +} + +static int uadk_prov_aead_get_ctx_params(void *vctx, OSSL_PARAM params[]) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)vctx; + OSSL_PARAM *p; + + if (!vctx || !params) + return UADK_OSSL_FAIL; + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_IVLEN); + if (p && !OSSL_PARAM_set_size_t(p, priv->ivlen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_KEYLEN); + if (p && !OSSL_PARAM_set_size_t(p, priv->keylen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_AEAD_TAGLEN); + if (p) { + size_t taglen = (priv->taglen != UNINITIALISED_SIZET) ? + priv->taglen : AES_GCM_TAG_LEN; + + if (!OSSL_PARAM_set_size_t(p, taglen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + } + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_IV); + if (p) { + if (priv->iv_set == IV_STATE_UNINITIALISED) + return UADK_OSSL_FAIL; + if (priv->ivlen > p->data_size) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_IV_LENGTH); + return UADK_OSSL_FAIL; + } + if (!OSSL_PARAM_set_octet_string(p, priv->iv, priv->ivlen) + && !OSSL_PARAM_set_octet_ptr(p, &priv->iv, priv->ivlen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + } + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_UPDATED_IV); + if (p) { + if (priv->iv_set == IV_STATE_UNINITIALISED) + return UADK_OSSL_FAIL; + if (priv->ivlen > p->data_size) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_IV_LENGTH); + return UADK_OSSL_FAIL; + } + if (!OSSL_PARAM_set_octet_string(p, priv->iv, priv->ivlen) + && !OSSL_PARAM_set_octet_ptr(p, &priv->iv, priv->ivlen)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + } + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_AEAD_TAG); + if (p) { + size_t sz = p->data_size; + + if (sz == 0 || sz > EVP_GCM_TLS_TAG_LEN || !priv->enc + || priv->taglen == UNINITIALISED_SIZET) { + ERR_raise(ERR_LIB_PROV, PROV_R_INVALID_TAG); + return UADK_OSSL_FAIL; + } + + if (!OSSL_PARAM_set_octet_string(p, priv->buf, sz)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + } + return UADK_AEAD_SUCCESS; +} + +static const OSSL_PARAM aead_known_gettable_params[] = { + OSSL_PARAM_uint(OSSL_CIPHER_PARAM_MODE, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_KEYLEN, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_IVLEN, NULL), + OSSL_PARAM_size_t(OSSL_CIPHER_PARAM_BLOCK_SIZE, NULL), + OSSL_PARAM_int(OSSL_CIPHER_PARAM_AEAD, NULL), + OSSL_PARAM_int(OSSL_CIPHER_PARAM_CUSTOM_IV, NULL), + OSSL_PARAM_END +}; + +static const OSSL_PARAM *uadk_prov_aead_gettable_params(ossl_unused void *provctx) +{ + return aead_known_gettable_params; +} + +static int uadk_cipher_aead_get_params(OSSL_PARAM params[], unsigned int md, + uint64_t flags, size_t kbits, + size_t blkbits, size_t ivbits) +{ + OSSL_PARAM *p; + + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_MODE); + if (p && !OSSL_PARAM_set_uint(p, md)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_AEAD); + if (p && !OSSL_PARAM_set_int(p, (flags & PROV_CIPHER_FLAG_AEAD) != 0)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_CUSTOM_IV); + if (p && !OSSL_PARAM_set_int(p, (flags & PROV_CIPHER_FLAG_CUSTOM_IV) != 0)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_KEYLEN); + if (p && !OSSL_PARAM_set_size_t(p, kbits)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_BLOCK_SIZE); + if (p && !OSSL_PARAM_set_size_t(p, blkbits)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + p = OSSL_PARAM_locate(params, OSSL_CIPHER_PARAM_IVLEN); + if (p && !OSSL_PARAM_set_size_t(p, ivbits)) { + ERR_raise(ERR_LIB_PROV, PROV_R_FAILED_TO_SET_PARAMETER); + return UADK_OSSL_FAIL; + } + + return UADK_AEAD_SUCCESS; +} + +static void *uadk_prov_aead_dupctx(void *ctx) +{ + struct aead_priv_ctx *priv, *ret; + + priv = (struct aead_priv_ctx *)ctx; + if (!priv) + return NULL; + + ret = OPENSSL_memdup(priv, sizeof(*priv)); + if (!ret) + return NULL; + + ret->sess = 0; + ret->data = OPENSSL_memdup(priv->data, AEAD_BLOCK_SIZE << 1); + if (!ret->data) { + OPENSSL_clear_free(ret, sizeof(*ret)); + return NULL; + } + + return ret; +} + +static void uadk_prov_aead_freectx(void *ctx) +{ + struct aead_priv_ctx *priv = (struct aead_priv_ctx *)ctx; + + if (!ctx) + return; + + if (priv->sess) { + wd_aead_free_sess(priv->sess); + priv->sess = 0; + } + + if (priv->data) { + OPENSSL_clear_free(priv->data, AEAD_BLOCK_SIZE << 1); + priv->data = NULL; + } + OPENSSL_clear_free(priv, sizeof(*priv)); +} + +#define UADK_AEAD_DESCR(nm, tag_len, key_len, iv_len, blk_size, \ + flags, e_nid, algnm, mode) \ +static OSSL_FUNC_cipher_newctx_fn uadk_##nm##_newctx; \ +static void *uadk_##nm##_newctx(void *provctx) \ +{ \ + struct aead_priv_ctx *ctx = OPENSSL_zalloc(sizeof(*ctx)); \ + if (!ctx) \ + return NULL; \ + \ + ctx->data = OPENSSL_zalloc(AEAD_BLOCK_SIZE << 1); \ + if (!ctx->data) { \ + OPENSSL_clear_free(ctx, sizeof(*ctx)); \ + return NULL; \ + } \ + \ + ctx->keylen = key_len; \ + ctx->ivlen = iv_len; \ + ctx->nid = e_nid; \ + ctx->taglen = tag_len; \ + strncpy(ctx->alg_name, #algnm, ALG_NAME_SIZE - 1); \ + \ + return ctx; \ +} \ +static OSSL_FUNC_cipher_get_params_fn uadk_##nm##_get_params; \ +static int uadk_##nm##_get_params(OSSL_PARAM params[]) \ +{ \ + return uadk_cipher_aead_get_params(params, mode, flags, \ + key_len, blk_size, iv_len); \ +} \ +const OSSL_DISPATCH uadk_##nm##_functions[] = { \ + { OSSL_FUNC_CIPHER_NEWCTX, (void (*)(void))uadk_##nm##_newctx }, \ + { OSSL_FUNC_CIPHER_FREECTX, (void (*)(void))uadk_prov_aead_freectx }, \ + { OSSL_FUNC_CIPHER_DUPCTX, (void (*)(void))uadk_prov_aead_dupctx }, \ + { OSSL_FUNC_CIPHER_ENCRYPT_INIT, \ + (void (*)(void))uadk_prov_aead_einit }, \ + { OSSL_FUNC_CIPHER_DECRYPT_INIT, \ + (void (*)(void))uadk_prov_aead_dinit }, \ + { OSSL_FUNC_CIPHER_UPDATE, \ + (void (*)(void))uadk_prov_aead_stream_update }, \ + { OSSL_FUNC_CIPHER_FINAL, \ + (void (*)(void))uadk_prov_aead_stream_final }, \ + { OSSL_FUNC_CIPHER_CIPHER, (void (*)(void))uadk_prov_aead_cipher }, \ + { OSSL_FUNC_CIPHER_GET_PARAMS, \ + (void (*)(void))uadk_##nm##_get_params }, \ + { OSSL_FUNC_CIPHER_GETTABLE_PARAMS, \ + (void (*)(void))uadk_prov_aead_gettable_params }, \ + { OSSL_FUNC_CIPHER_GET_CTX_PARAMS, \ + (void (*)(void))uadk_prov_aead_get_ctx_params }, \ + { OSSL_FUNC_CIPHER_GETTABLE_CTX_PARAMS, \ + (void (*)(void))uadk_prov_aead_gettable_ctx_params }, \ + { OSSL_FUNC_CIPHER_SET_CTX_PARAMS, \ + (void (*)(void))uadk_prov_aead_set_ctx_params }, \ + { OSSL_FUNC_CIPHER_SETTABLE_CTX_PARAMS, \ + (void (*)(void))uadk_prov_aead_settable_ctx_params }, \ + { 0, NULL } \ +} + +UADK_AEAD_DESCR(aes_128_gcm, AES_GCM_TAG_LEN, 16, 12, 8, AEAD_FLAGS, NID_aes_128_gcm, gcm(aes), + EVP_CIPH_GCM_MODE); +UADK_AEAD_DESCR(aes_192_gcm, AES_GCM_TAG_LEN, 24, 12, 8, AEAD_FLAGS, NID_aes_192_gcm, gcm(aes), + EVP_CIPH_GCM_MODE); +UADK_AEAD_DESCR(aes_256_gcm, AES_GCM_TAG_LEN, 32, 12, 8, AEAD_FLAGS, NID_aes_256_gcm, gcm(aes), + EVP_CIPH_GCM_MODE); diff --git a/src/uadk_prov_init.c b/src/uadk_prov_init.c index 972f953..772ddbb 100644 --- a/src/uadk_prov_init.c +++ b/src/uadk_prov_init.c @@ -137,6 +137,12 @@ const OSSL_ALGORITHM uadk_prov_ciphers_v3[] = { uadk_aes_192_cfb128_functions, "uadk_provider aes-192-cfb" }, { "AES-256-CFB", UADK_DEFAULT_PROPERTIES, uadk_aes_256_cfb128_functions, "uadk_provider aes-256-cfb" }, + { "AES-128-GCM", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_gcm_functions, "uadk_provider aes-128-gcm" }, + { "AES-192-GCM", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_gcm_functions, "uadk_provider aes-192-gcm" }, + { "AES-256-GCM", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_gcm_functions, "uadk_provider aes-256-gcm" }, { "SM4-CBC", UADK_DEFAULT_PROPERTIES, uadk_sm4_cbc_functions, "uadk_provider sm4-cbc" }, { "SM4-ECB", UADK_DEFAULT_PROPERTIES, @@ -232,6 +238,7 @@ static void uadk_teardown(void *provctx) uadk_prov_destroy_digest(); uadk_prov_destroy_cipher(); + uadk_prov_destroy_aead(); uadk_prov_destroy_rsa(); uadk_prov_sm2_uninit(); uadk_prov_dh_uninit(); -- 2.33.0

1 6

[PATCH] uadk_engine: Add release note for uadk_engine 1.5
by Zhiqi Song 02 Dec '24

02 Dec '24

Add new feature and fixes release note of uadk_engine 1.5. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- docs/ReleaseNotes.md | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/docs/ReleaseNotes.md b/docs/ReleaseNotes.md index 20163a2..94fc7bb 100644 --- a/docs/ReleaseNotes.md +++ b/docs/ReleaseNotes.md @@ -2,11 +2,23 @@ # UADK engine Release v1.5 Dec 2024 ## New Features +- Support SM2 asymmetric algorithm with openssl 3.0 provider mechanism. +- Support processing single diesgt block function with openssl 3.0 provider mechanism. +- Support AES CTS alg with openssl 3.0 provider mechanism. ## Fixes +- Reconstructing uadk_provider DH implementation with unified data structure and FFC \ + extended functions. +- Add different AES algorithm key bit width specifications in the uadk_provider. +- For digest algorithms, for both uadk_engine and uadk_provider, increasing the \ + amount of data delivered to the hardware at a time to reduce the number of interactions. +- Fixup bio fseek() suspending problem in uadk_provider. +- Fixup an async problem: wakup async_poll_process_func before free async_poll_task_free. +- Fixip cipher issue when input len is 0 in decrypto update. +- Fixip the key and IV verification methods for cipher init. +- Remove update iv for cipher, as the iv has been updated by the UADK. ## Working combination - - UADK v2.8 - OpenSSL 1.1.1f & OpenSSL 3.0+ -- 2.33.0

1 0

[PATCH 0/6] uadk_prov: fix compination warning
by Qi Tao 02 Dec '24

02 Dec '24

*** BLURB HERE *** Chenghai Huang (2): uadk_provider: fixed the variable type inconsistency issue uadk_provider/sec: cleanup variable definition and return value Zhiqi Song (4): async: modify the condition for async module uninit uadk_provider/pkey: cleanup unused functions in pkey uadk_provider/pkey: cleanup variable definition and return uadk_provider: fix discards 'const' qulifier from pointer src/uadk_async.c | 85 ++++++------ src/uadk_async.h | 1 + src/uadk_engine_init.c | 3 +- src/uadk_prov_cipher.c | 285 ++++++++++++++++++++--------------------- src/uadk_prov_dh.c | 3 +- src/uadk_prov_digest.c | 66 +++++----- src/uadk_prov_init.c | 2 +- src/uadk_prov_pkey.c | 171 ++++++++++++------------- src/uadk_prov_pkey.h | 59 +-------- src/uadk_prov_rsa.c | 44 ++++++- src/uadk_prov_sm2.c | 252 ++++++++++++++++++------------------ 11 files changed, 477 insertions(+), 494 deletions(-) -- 2.33.0

1 0

[PATCH] uadk_provider: fixed the variable type inconsistency issue
by Qi Tao 29 Nov '24

29 Nov '24

From: Chenghai Huang <huangchenghai2(a)huawei.com> The output parameter outl is of the size_t * type in the interface defined by OpenSSL. The int * type is different in uadk_prov_cipher. Signed-off-by: Chenghai Huang <huangchenghai2(a)huawei.com> --- src/uadk_prov_cipher.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/uadk_prov_cipher.c b/src/uadk_prov_cipher.c index 0d01a6a..3e0a5de 100644 --- a/src/uadk_prov_cipher.c +++ b/src/uadk_prov_cipher.c @@ -329,7 +329,7 @@ static int uadk_prov_cipher_soft_work(struct cipher_priv_ctx *priv, unsigned cha } static int uadk_prov_cipher_soft_final(struct cipher_priv_ctx *priv, unsigned char *out, - int *outl) + size_t *outl) { int sw_final_len = 0; @@ -681,7 +681,7 @@ static int ossl_cipher_unpadblock(unsigned char *buf, size_t *buflen, size_t blo } static int uadk_prov_hw_cipher(struct cipher_priv_ctx *priv, unsigned char *out, - int *outl, size_t outsize, + size_t *outl, size_t outsize, const unsigned char *in, size_t inlen) { size_t blksz = priv->blksize; @@ -729,7 +729,7 @@ static int uadk_prov_hw_cipher(struct cipher_priv_ctx *priv, unsigned char *out, } static int uadk_prov_do_cipher(struct cipher_priv_ctx *priv, unsigned char *out, - int *outl, size_t outsize, + size_t *outl, size_t outsize, const unsigned char *in, size_t inlen) { size_t blksz = priv->blksize; @@ -831,7 +831,7 @@ static OSSL_FUNC_cipher_gettable_ctx_params_fn uadk_prov_cipher_gettable_ctx_par static OSSL_FUNC_cipher_set_ctx_params_fn uadk_prov_cipher_set_ctx_params; static OSSL_FUNC_cipher_settable_ctx_params_fn uadk_prov_cipher_settable_ctx_params; -static int uadk_prov_cipher_cipher(void *vctx, unsigned char *out, int *outl, +static int uadk_prov_cipher_cipher(void *vctx, unsigned char *out, size_t *outl, size_t outsize, const unsigned char *in, size_t inl) { @@ -861,9 +861,9 @@ static int uadk_prov_cipher_cipher(void *vctx, unsigned char *out, int *outl, } static int uadk_prov_cipher_block_encrypto(struct cipher_priv_ctx *priv, - unsigned char *out, int *outl, size_t outsize) + unsigned char *out, size_t *outl, size_t outsize) { - int blksz = priv->blksize; + size_t blksz = priv->blksize; int ret; if (priv->pad) { @@ -893,7 +893,7 @@ static int uadk_prov_cipher_block_encrypto(struct cipher_priv_ctx *priv, } static int uadk_prov_cipher_block_decrypto(struct cipher_priv_ctx *priv, - unsigned char *out, int *outl, size_t outsize) + unsigned char *out, size_t *outl, size_t outsize) { size_t blksz = priv->blksize; int ret; @@ -932,7 +932,7 @@ static int uadk_prov_cipher_block_decrypto(struct cipher_priv_ctx *priv, } static int uadk_prov_cipher_block_final(void *vctx, unsigned char *out, - int *outl, size_t outsize) + size_t *outl, size_t outsize) { struct cipher_priv_ctx *priv = (struct cipher_priv_ctx *)vctx; int ret; @@ -952,7 +952,7 @@ static int uadk_prov_cipher_block_final(void *vctx, unsigned char *out, } static int uadk_prov_cipher_block_update(void *vctx, unsigned char *out, - int *outl, size_t outsize, + size_t *outl, size_t outsize, const unsigned char *in, size_t inl) { struct cipher_priv_ctx *priv = (struct cipher_priv_ctx *)vctx; @@ -974,7 +974,7 @@ static int uadk_prov_cipher_block_update(void *vctx, unsigned char *out, } static int uadk_prov_cipher_stream_update(void *vctx, unsigned char *out, - int *outl, size_t outsize, + size_t *outl, size_t outsize, const unsigned char *in, size_t inl) { struct cipher_priv_ctx *priv = (struct cipher_priv_ctx *)vctx; @@ -1024,7 +1024,7 @@ do_soft: } static int uadk_prov_cipher_stream_final(void *vctx, unsigned char *out, - int *outl, size_t outsize) + size_t *outl, size_t outsize) { struct cipher_priv_ctx *priv = (struct cipher_priv_ctx *)vctx; -- 2.33.0

1 0

[PATCH 0/8] add new algs for uadk_prov
by Qi Tao 27 Nov '24

27 Nov '24

*** BLURB HERE *** Chenghai Huang (2): uadk_provider: add aead alg for uadk_provider in openssl3.0 uadk_provider: fixed the variable type inconsistency issue Weili Qian (4): uadk_provider: move functions to uadk_prov_pkey.c uadk_provider: add query_operation_name callback for keymgmt uadk_provider: support ec keymgmt hardware acceleration uadk_provider: support ecdh keyexch hardware acceleration Zhiqi Song (1): uadk_provider: support x448 alg lizhi (1): uadk_engine: Clear some compilation warnings, specific cleanup is as follows. src/Makefile.am | 4 +- src/uadk_prov.h | 12 +- src/uadk_prov_aead.c | 1028 ++++++++++++++++++++++++++++++++ src/uadk_prov_bio.c | 2 + src/uadk_prov_cipher.c | 28 +- src/uadk_prov_der_writer.c | 2 +- src/uadk_prov_dh.c | 17 +- src/uadk_prov_ec_kmgmt.c | 782 ++++++++++++++++++++++++ src/uadk_prov_ecdh_exch.c | 965 ++++++++++++++++++++++++++++++ src/uadk_prov_ecx.c | 1145 ++++++++++++++++++++++++++++++++++++ src/uadk_prov_ffc.c | 24 +- src/uadk_prov_ffc.h | 1 - src/uadk_prov_init.c | 24 +- src/uadk_prov_pkey.c | 109 +++- src/uadk_prov_pkey.h | 28 +- src/uadk_prov_rsa.c | 8 + src/uadk_prov_sm2.c | 71 +-- 17 files changed, 4145 insertions(+), 105 deletions(-) create mode 100644 src/uadk_prov_aead.c create mode 100644 src/uadk_prov_ec_kmgmt.c create mode 100644 src/uadk_prov_ecdh_exch.c create mode 100644 src/uadk_prov_ecx.c -- 2.33.0

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【2024/11/27 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 26 Nov '24

26 Nov '24

您好！ sig-AccLib 邀请您参加 2024-11-27 11:00 召开的Zoom会议会议主题：【2024/11/27 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meetings 会议链接：https://us06web.zoom.us/j/89022246024?pwd=GrFAG6Ko1v0NRvb73If2PnKJ401Tet.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-11-27 11:00, The subject of the conference is 【2024/11/27 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meetings You can join the meeting at https://us06web.zoom.us/j/89022246024?pwd=GrFAG6Ko1v0NRvb73If2PnKJ401Tet.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 00/15] uadk_tool: add comp test
by Qi Tao 21 Nov '24

21 Nov '24

*** BLURB HERE *** Hao Fang (14): uadk_tool: test: change the comp_test directory to uadk_tool uadk_tool: test: unified the log print uadk_tool: test: remove comp test unused cmd uadk_tool: test: comp test remove the --ilist/olist cmd uadk_tool: test: remove unuse functions in comp_lib.h uadk_tool: test: reduce duplicate code in hw_blk_compress uadk_tool: test: comp test remove poll_thread_func uadk_tool: test: comp test remove the number in function name uadk_tool: test: comp test remove the batch mode uadk_tool: test: comp test remove the send_thread_func uadk_tool: comp test: move info.in_buf alloction into create_send_tdata uadk_tool: comp test: simplified the test_hw function uadk_tool: comp test: unified the test cmd format uadk_tool: comp test: some fixes found with checkpatch Qi Tao (1): uadk_tool: fix error in saving the aead dst data uadk_tool/Makefile.am | 11 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 6 + uadk_tool/benchmark/uadk_benchmark.h | 2 +- uadk_tool/test/comp_lib.c | 1410 ++++++++++++++++++++++ uadk_tool/test/comp_lib.h | 300 +++++ uadk_tool/test/comp_main.c | 1393 +++++++++++++++++++++ uadk_tool/test/comp_main.h | 11 + uadk_tool/test/uadk_test.c | 8 +- 8 files changed, 3133 insertions(+), 8 deletions(-) create mode 100644 uadk_tool/test/comp_lib.c create mode 100644 uadk_tool/test/comp_lib.h create mode 100644 uadk_tool/test/comp_main.c create mode 100644 uadk_tool/test/comp_main.h -- 2.33.0

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[PATCH 00/15] add comp test
by Qi Tao 21 Nov '24

21 Nov '24

*** BLURB HERE *** Hao Fang (14): uadk_tool: test: change the comp_test directory to uadk_tool uadk_tool: test: unified the log print uadk_tool: test: remove comp test unused cmd uadk_tool: test: comp test remove the --ilist/olist cmd uadk_tool: test: remove unuse functions in comp_lib.h uadk_tool: test: reduce duplicate code in hw_blk_compress uadk_tool: test: comp test remove poll_thread_func uadk_tool: test: comp test remove the number in function name uadk_tool: test: comp test remove the batch mode uadk_tool: test: comp test remove the send_thread_func uadk_tool: comp test: move info.in_buf alloction into create_send_tdata uadk_tool: comp test: simplified the test_hw function uadk_tool: comp test: unified the test cmd format uadk_tool: comp test: some fixes found with checkpatch Qi Tao (1): uadk_tool: fix error in saving the aead dst data uadk_tool/Makefile.am | 11 +- uadk_tool/benchmark/sec_uadk_benchmark.c | 6 + uadk_tool/benchmark/uadk_benchmark.h | 2 +- uadk_tool/test/comp_lib.c | 1410 ++++++++++++++++++++++ uadk_tool/test/comp_lib.h | 300 +++++ uadk_tool/test/comp_main.c | 1393 +++++++++++++++++++++ uadk_tool/test/comp_main.h | 11 + uadk_tool/test/uadk_test.c | 8 +- 8 files changed, 3133 insertions(+), 8 deletions(-) create mode 100644 uadk_tool/test/comp_lib.c create mode 100644 uadk_tool/test/comp_lib.h create mode 100644 uadk_tool/test/comp_main.c create mode 100644 uadk_tool/test/comp_main.h -- 2.33.0

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2024/11/13 AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 12 Nov '24

12 Nov '24

您好！ sig-AccLib 邀请您参加 2024-11-13 11:00 召开的Zoom会议会议主题：2024/11/13 AccLIb SIG 双周例会 11:00 - 12:00 会议内容：【2024/11/13 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https 会议链接：https://us06web.zoom.us/j/88376532953?pwd=kka7dbzWQYpWW0eYHW8ia76IfrMOx5.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-11-13 11:00, The subject of the conference is 2024/11/13 AccLIb SIG 双周例会 11:00 - 12:00, Summary: 【2024/11/13 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https You can join the meeting at https://us06web.zoom.us/j/88376532953?pwd=kka7dbzWQYpWW0eYHW8ia76IfrMOx5.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 1/2] uadk: fix for hashagg include files
by Qi Tao 01 Nov '24

01 Nov '24

A compilation error occurred because the wd_util.h is not an externally visible header file, so use wd.h and wd_alg_common.h here. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- include/drv/wd_agg_drv.h | 1 + include/wd_agg.h | 1 - include/wd_dae.h | 1 + 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/drv/wd_agg_drv.h b/include/drv/wd_agg_drv.h index cf99a704..3d26eeb3 100644 --- a/include/drv/wd_agg_drv.h +++ b/include/drv/wd_agg_drv.h @@ -8,6 +8,7 @@ #include <asm/types.h> #include "wd_agg.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/wd_agg.h b/include/wd_agg.h index e37023b5..aac3d406 100644 --- a/include/wd_agg.h +++ b/include/wd_agg.h @@ -8,7 +8,6 @@ #include <dlfcn.h> #include <asm/types.h> -#include "wd_util.h" #include "wd_dae.h" #ifdef __cplusplus diff --git a/include/wd_dae.h b/include/wd_dae.h index 5f22d90c..aa9f966c 100644 --- a/include/wd_dae.h +++ b/include/wd_dae.h @@ -9,6 +9,7 @@ #include <dlfcn.h> #include <stdbool.h> #include <asm/types.h> +#include "wd_alg_common.h" #include "wd.h" #ifdef __cplusplus -- 2.33.0

1 0

【2024/10/30 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 29 Oct '24

29 Oct '24

您好！ sig-AccLib 邀请您参加 2024-10-30 11:00 召开的Zoom会议会议主题：【2024/10/30 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：【2024/10/30 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https 会议链接：https://us06web.zoom.us/j/87676404752?pwd=F3iZtD19sxQUxpK0AYLQHVMgx5ukg2.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-10-30 11:00, The subject of the conference is 【2024/10/30 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 【2024/10/30 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https You can join the meeting at https://us06web.zoom.us/j/87676404752?pwd=F3iZtD19sxQUxpK0AYLQHVMgx5ukg2.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH v2 00/24] fix compile warming
by Qi Tao 21 Oct '24

21 Oct '24

*** BLURB HERE *** Chenghai Huang (15): uadk_provider: add input pointer length check for digest and cipher uadk_provider: code cleanup for provider bio uadk_provider: add length check for input pointer uadk_provider: add a timeout exit condition to the loop uadk_provider: code cleanup for uadk_provider and uadk_engine uadk_provider: add aes alg for uadk_provider in openssl3.0 uadk_engine: optimized engine update process uadk_provider: fix cipher issue when input len is 0 in decrypto update uadk_provider: fix the set ctx param function for ivlen and pad uadk_provider: fix the key and IV verification methods for cipher init uadk_provider: fix the switch condition issue of soft digest in engine uadk_provider: extract hardware initialization functions to separate functions uadk_provider: modify poll loop exit condition uadk_provider: add aes cts alg to uadk_provider in openssl3.0 uadk_provider: bugfix cipher decryption issue Qi Tao (2): uadk_prov: fix some cleancode issues and bugs for rsa uadk_prov: fix data type conversion errors Wenkai Lin (1): uadk_engine: remove update iv for cipher Zhiqi Song (6): uadk_provider: add openssl ffc library function uadk_provider: reconstructing dh implementation uadk_engine/ecx: merge some similar code logic uadk_engine: fixup pubkey size used in reverse operation uadk_provider/rsa: unify function definitions with macro uadk_provider/pkey: fixup functions with the same name src/Makefile.am | 3 +- src/uadk_async.c | 6 +- src/uadk_cipher.c | 114 +- src/uadk_digest.c | 41 +- src/uadk_ecx.c | 303 ++--- src/uadk_prov.h | 56 +- src/uadk_prov_bio.c | 19 +- src/uadk_prov_bio.h | 2 +- src/uadk_prov_cipher.c | 867 +++++++------ src/uadk_prov_dh.c | 2609 +++++++++++++++++++++------------------- src/uadk_prov_digest.c | 61 +- src/uadk_prov_ffc.c | 1888 +++++++++++++++++++++++++++++ src/uadk_prov_ffc.h | 330 +++++ src/uadk_prov_init.c | 46 +- src/uadk_prov_pkey.h | 114 +- src/uadk_prov_rsa.c | 1138 +++++++----------- src/uadk_prov_sm2.c | 94 +- 17 files changed, 5044 insertions(+), 2647 deletions(-) create mode 100644 src/uadk_prov_ffc.c create mode 100644 src/uadk_prov_ffc.h -- 2.33.0

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[PATCH 09/24] uadk_provider: add aes alg for uadk_provider in openssl3.0
by Zhiqi Song 18 Oct '24

18 Oct '24

From: Chenghai Huang <huangchenghai2(a)huawei.com> The following 17 AES algorithms are added: AES-128-CBC AES-192-CBC AES-256-CBC AES-128-ECB AES-192-ECB AES-256-ECB AES-128-XTS AES-256-XTS AES-128-CTR AES-192-CTR AES-256-CTR AES-128-OFB AES-192-OFB AES-256-OFB AES-128-CFB AES-192-CFB AES-256-CFB Signed-off-by: Chenghai Huang <huangchenghai2(a)huawei.com> Signed-off-by: JiangShui Yang <yangjiangshui(a)h-partners.com> --- src/uadk_prov.h | 33 ++++++++++++++++++++++----------- src/uadk_prov_init.c | 26 +++++++++++++++++++++++++- 2 files changed, 47 insertions(+), 12 deletions(-) diff --git a/src/uadk_prov.h b/src/uadk_prov.h index 1b4816e..3655437 100644 --- a/src/uadk_prov.h +++ b/src/uadk_prov.h @@ -128,17 +128,28 @@ extern const OSSL_DISPATCH uadk_sha512_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sha512_224_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_sha512_256_functions[FUNC_MAX_NUM]; - -extern const OSSL_DISPATCH uadk_aes_128_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_192_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_cbc_functions[]; -extern const OSSL_DISPATCH uadk_aes_128_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_192_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_ecb_functions[]; -extern const OSSL_DISPATCH uadk_aes_128_xts_functions[]; -extern const OSSL_DISPATCH uadk_aes_256_xts_functions[]; -extern const OSSL_DISPATCH uadk_sm4_cbc_functions[]; -extern const OSSL_DISPATCH uadk_sm4_ecb_functions[]; +extern const OSSL_DISPATCH uadk_aes_128_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_xts_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_xts_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ctr_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_128_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_192_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_aes_256_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_cbc_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ecb_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ofb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_cfb128_functions[FUNC_MAX_NUM]; +extern const OSSL_DISPATCH uadk_sm4_ctr_functions[FUNC_MAX_NUM]; extern const OSSL_DISPATCH uadk_des_ede3_cbc_functions[]; extern const OSSL_DISPATCH uadk_des_ede3_ecb_functions[]; diff --git a/src/uadk_prov_init.c b/src/uadk_prov_init.c index 52a5da0..05a1b9f 100644 --- a/src/uadk_prov_init.c +++ b/src/uadk_prov_init.c @@ -89,10 +89,34 @@ const OSSL_ALGORITHM uadk_prov_ciphers[] = { uadk_aes_128_xts_functions, "uadk_provider aes-128-xts" }, { "AES-256-XTS", UADK_DEFAULT_PROPERTIES, uadk_aes_256_xts_functions, "uadk_provider aes-256-xts" }, - { "SM4-CBC:SM4", UADK_DEFAULT_PROPERTIES, + { "AES-128-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_ctr_functions, "uadk_provider aes-128-ctr" }, + { "AES-192-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_ctr_functions, "uadk_provider aes-192-ctr" }, + { "AES-256-CTR", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_ctr_functions, "uadk_provider aes-256-ctr" }, + { "AES-128-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_ofb128_functions, "uadk_provider aes-128-ofb" }, + { "AES-192-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_ofb128_functions, "uadk_provider aes-192-ofb" }, + { "AES-256-OFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_ofb128_functions, "uadk_provider aes-256-ofb" }, + { "AES-128-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_128_cfb128_functions, "uadk_provider aes-128-cfb" }, + { "AES-192-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_192_cfb128_functions, "uadk_provider aes-192-cfb" }, + { "AES-256-CFB", UADK_DEFAULT_PROPERTIES, + uadk_aes_256_cfb128_functions, "uadk_provider aes-256-cfb" }, + { "SM4-CBC", UADK_DEFAULT_PROPERTIES, uadk_sm4_cbc_functions, "uadk_provider sm4-cbc" }, { "SM4-ECB", UADK_DEFAULT_PROPERTIES, uadk_sm4_ecb_functions, "uadk_provider sm4-ecb" }, + { "SM4-OFB", UADK_DEFAULT_PROPERTIES, + uadk_sm4_ofb128_functions, "uadk_provider sm4-ofb" }, + { "SM4-CFB", UADK_DEFAULT_PROPERTIES, + uadk_sm4_cfb128_functions, "uadk_provider sm4-cfb" }, + { "SM4-CTR", UADK_DEFAULT_PROPERTIES, + uadk_sm4_ctr_functions, "uadk_provider sm4-ctr" }, { "DES-EDE3-CBC", UADK_DEFAULT_PROPERTIES, uadk_des_ede3_cbc_functions, "uadk_provider des-ede3-cbc" }, { "DES-EDE3-ECB", UADK_DEFAULT_PROPERTIES, -- 2.33.0

1 0

[PATCH 00/24] uadk_provider: some algorithm optimization and problem fixing
by Zhiqi Song 17 Oct '24

17 Oct '24

From: JiangShui Yang <yangjiangshui(a)h-partners.com> Chenghai Huang (15): uadk_provider: add input pointer length check for digest and cipher uadk_provider: code cleanup for provider bio uadk_provider: add length check for input pointer uadk_provider: add a timeout exit condition to the loop uadk_provider: code cleanup for uadk_provider and uadk_engine uadk_provider: add aes alg for uadk_provider in openssl3.0 uadk_engine: optimized engine update process uadk_provider: fix cipher issue when input len is 0 in decrypto update uadk_provider: fix the set ctx param function for ivlen and pad uadk_provider: fix the key and IV verification methods for cipher init uadk_provider: fix the switch condition issue of soft digest in engine uadk_provider: extract hardware initialization functions to separate functions uadk_provider: modify poll loop exit condition uadk_provider: add aes cts alg to uadk_provider in openssl3.0 uadk_provider: bugfix cipher decryption issue Qi Tao (2): uadk_prov: fix some cleancode issues and bugs for rsa uadk_prov: fix data type conversion errors Wenkai Lin (1): uadk_engine: remove update iv for cipher Zhiqi Song (6): uadk_provider: add openssl ffc library function uadk_provider: reconstructing dh implementation uadk_engine/ecx: merge some similar code logic uadk_engine: fixup pubkey size used in reverse operation uadk_provider/rsa: unify function definitions with macro uadk_provider/pkey: fixup functions with the same name src/Makefile.am | 3 +- src/uadk_async.c | 6 +- src/uadk_cipher.c | 114 +- src/uadk_digest.c | 41 +- src/uadk_ecx.c | 303 ++--- src/uadk_prov.h | 55 +- src/uadk_prov_bio.c | 19 +- src/uadk_prov_bio.h | 2 +- src/uadk_prov_cipher.c | 869 +++++++------ src/uadk_prov_dh.c | 2611 +++++++++++++++++++++------------------- src/uadk_prov_digest.c | 61 +- src/uadk_prov_ffc.c | 1888 +++++++++++++++++++++++++++++ src/uadk_prov_ffc.h | 330 +++++ src/uadk_prov_init.c | 46 +- src/uadk_prov_pkey.h | 114 +- src/uadk_prov_rsa.c | 1134 +++++++---------- src/uadk_prov_sm2.c | 94 +- 17 files changed, 5043 insertions(+), 2647 deletions(-) create mode 100644 src/uadk_prov_ffc.c create mode 100644 src/uadk_prov_ffc.h -- 2.33.0

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【2024/10/16 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 15 Oct '24

15 Oct '24

您好！ sig-AccLib 邀请您参加 2024-10-16 11:00 召开的Zoom会议会议主题：【2024/10/16 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：【2024/10/16 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https 会议链接：https://us06web.zoom.us/j/83315878441?pwd=OYVJ9DV7nAjz91ZEQYzhhAJMkpe6nc.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-10-16 11:00, The subject of the conference is 【2024/10/16 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 【2024/10/16 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https You can join the meeting at https://us06web.zoom.us/j/83315878441?pwd=OYVJ9DV7nAjz91ZEQYzhhAJMkpe6nc.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 0/6] uadk patch
by Qi Tao 12 Oct '24

12 Oct '24

*** BLURB HERE *** Chenghai Huang (1): uadk - reduce the print rating of specific logs Weili Qian (4): Revert "uadk/v1: replace wd_spinlock to pthread_spin_lock" Revert "uadk/v1: check queue status before sending doorbells" uadk/v1: not check hardware status when BD not processed uadk/v1: check queue status before sending doorbells Wenkai Lin (1): uadk/v1: replace wd_spinlock to pthread_spin_lock drv/hisi_comp.c | 11 +++++++++-- v1/drv/hisi_zip_udrv.c | 40 ++++++++++++++++++++++++++++++++++++---- 2 files changed, 45 insertions(+), 6 deletions(-) -- 2.33.0

1 1

[PATCH 0/7] uadk bugfix and cleancode
by Qi Tao 11 Oct '24

11 Oct '24

*** BLURB HERE *** Hao Fang (1): uadk/test: move main function to testsuit.c and rm test_sva_perf.c Longfang Liu (1): uadk: fix some code bugs Qi Tao (1): uadk: add null pointer check Wenkai Lin (3): uadk: fix for sec software compute check uadk: fix for cipher update iv uadk/v1: fix for cipher update iv Yang Shen (1): uadk/cipher - add length check of CBC_CTS mode drv/hash_mb/hash_mb.c | 6 +- drv/hisi_comp.c | 10 +- drv/hisi_dae.c | 6 +- drv/hisi_hpre.c | 8 +- drv/hisi_sec.c | 61 ++-- drv/isa_ce_sm3.c | 6 +- drv/isa_ce_sm4.c | 6 +- test/hisi_zip_test/Makefile.am | 2 +- test/hisi_zip_test/test_sva_perf.c | 524 ----------------------------- test/hisi_zip_test/testsuit.c | 474 +++++++++++++++++++++++++- v1/drv/hisi_sec_udrv.c | 80 ++++- wd_cipher.c | 36 +- wd_ecc.c | 6 +- wd_util.c | 11 +- 14 files changed, 639 insertions(+), 597 deletions(-) delete mode 100644 test/hisi_zip_test/test_sva_perf.c -- 2.33.0

1 7

[PATCH 0/4] cleancode and bugfix for uadk
by Qi Tao 10 Oct '24

10 Oct '24

*** BLURB HERE *** Hao Fang (1): uadk/test: move main function to testsuit.c and rm test_sva_perf.c Longfang Liu (1): uadk: fix some code bugs Qi Tao (1): uadk: add null pointer check Wenkai Lin (1): uadk: fix for sec software compute check drv/hash_mb/hash_mb.c | 6 +- drv/hisi_comp.c | 10 +- drv/hisi_dae.c | 6 +- drv/hisi_hpre.c | 8 +- drv/hisi_sec.c | 21 +- drv/isa_ce_sm3.c | 6 +- drv/isa_ce_sm4.c | 6 +- test/hisi_zip_test/Makefile.am | 2 +- test/hisi_zip_test/test_sva_perf.c | 524 ----------------------------- test/hisi_zip_test/testsuit.c | 474 +++++++++++++++++++++++++- wd_ecc.c | 6 +- wd_util.c | 11 +- 12 files changed, 520 insertions(+), 560 deletions(-) delete mode 100644 test/hisi_zip_test/test_sva_perf.c -- 2.33.0

1 4

[PATCH] uadk: fix for sec software compute check
by Qi Tao 10 Oct '24

10 Oct '24

From: Wenkai Lin <linwenkai6(a)hisilicon.com> For aead stream mode, the final message is not sent to hardware when the qm V3 version is used or when the length of the message is 0, so software compute check should return true to stop qm_recv process. Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- drv/hisi_sec.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 36d65bcc..f008c163 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -2652,8 +2652,17 @@ static void parse_aead_bd2(struct hisi_qp *qp, struct hisi_sec_sqe *sqe, static bool soft_compute_check(struct hisi_qp *qp, struct wd_aead_msg *msg) { /* Asynchronous mode does not use the sent message, so ignores it */ - if (msg->cmode == WD_CIPHER_GCM) - return (msg->msg_state == AEAD_MSG_END) && qp->q_info.qp_mode == CTX_MODE_SYNC; + if (qp->q_info.qp_mode == CTX_MODE_ASYNC) + return false; + /* + * For aead gcm stream mode, due to some hardware limitations, + * the final message was not sent to hardware if the qm is + * not higher than v3 version or the input length of the + * message is 0, the software calculation has been executed. + */ + if (msg->msg_state == AEAD_MSG_END && msg->cmode == WD_CIPHER_GCM && + (qp->q_info.hw_type <= HISI_QM_API_VER3_BASE || !msg->in_bytes)) + return true; return false; } -- 2.33.0

1 0

[PATCH] uadk/test: move main function to testsuit.c and rm test_sva_perf.c
by Qi Tao 10 Oct '24

10 Oct '24

From: Hao Fang <fanghao11(a)huawei.com> test_suit.c should be the main function file, and these two files have the duplicate code. Signed-off-by: Hao Fang <fanghao11(a)huawei.com> --- test/hisi_zip_test/Makefile.am | 2 +- test/hisi_zip_test/test_sva_perf.c | 524 ----------------------------- test/hisi_zip_test/testsuit.c | 474 +++++++++++++++++++++++++- 3 files changed, 474 insertions(+), 526 deletions(-) delete mode 100644 test/hisi_zip_test/test_sva_perf.c diff --git a/test/hisi_zip_test/Makefile.am b/test/hisi_zip_test/Makefile.am index 827a0d4c..92ef1de7 100644 --- a/test/hisi_zip_test/Makefile.am +++ b/test/hisi_zip_test/Makefile.am @@ -3,7 +3,7 @@ AUTOMAKE_OPTIONS = subdir-objects bin_PROGRAMS=zip_sva_perf -zip_sva_perf_SOURCES=test_sva_perf.c test_lib.c testsuit.c +zip_sva_perf_SOURCES=testsuit.c test_lib.c if WD_STATIC_DRV zip_sva_perf_LDADD=../../.libs/libwd.a ../../.libs/libwd_comp.a \ diff --git a/test/hisi_zip_test/test_sva_perf.c b/test/hisi_zip_test/test_sva_perf.c deleted file mode 100644 index 98670a5b..00000000 --- a/test/hisi_zip_test/test_sva_perf.c +++ /dev/null @@ -1,524 +0,0 @@ -// SPDX-License-Identifier: Apache-2.0 -/* - * Copyright 2020-2021 Huawei Technologies Co.,Ltd. All rights reserved. - * Copyright 2020-2021 Linaro ltd. - */ - -/* - * Test performance of the SVA API - */ -#include <asm/unistd.h> /* For __NR_perf_event_open */ -#include <fenv.h> -#include <getopt.h> -#include <inttypes.h> -#include <math.h> -#include <signal.h> -#include <time.h> -#include <sys/ioctl.h> -#include <sys/mman.h> -#include <sys/types.h> -#include <sys/wait.h> -#include <unistd.h> - -#include <linux/perf_event.h> - -#include "test_lib.h" -#include "wd_sched.h" - -enum hizip_stats_variable { - ST_SETUP_TIME, - ST_RUN_TIME, - ST_CPU_TIME, - - /* CPU usage */ - ST_USER_TIME, - ST_SYSTEM_TIME, - - /* Faults */ - ST_MINFLT, - ST_MAJFLT, - - /* Context switches */ - ST_INVCTX, - ST_VCTX, - - /* Signals */ - ST_SIGNALS, - - /* Aggregated */ - ST_SPEED, - ST_TOTAL_SPEED, - ST_CPU_IDLE, - ST_FAULTS, - ST_IOPF, - - ST_COMPRESSION_RATIO, - - NUM_STATS -}; - -struct hizip_stats { - double v[NUM_STATS]; -}; - -int perf_event_open(struct perf_event_attr *attr, - pid_t pid, int cpu, int group_fd, - unsigned long flags) -{ - return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); -} - -unsigned long long perf_event_put(int *perf_fds, int nr_fds); - -int perf_event_get(const char *event_name, int **perf_fds, int *nr_fds) -{ - int ret; - int cpu; - FILE *fd; - int nr_cpus; - unsigned int event_id; - char event_id_file[256]; - struct perf_event_attr event = { - .type = PERF_TYPE_TRACEPOINT, - .size = sizeof(event), - .disabled = true, - }; - - *perf_fds = NULL; - *nr_fds = 0; - - nr_cpus = sysconf(_SC_NPROCESSORS_ONLN); - if (nr_cpus <= 0) { - WD_ERR("invalid number of CPUs\n"); - return nr_cpus; - } - - ret = snprintf(event_id_file, sizeof(event_id_file), - "/sys/kernel/debug/tracing/events/%s/id", event_name); - if (ret >= sizeof(event_id_file)) { - WD_ERR("event_id buffer overflow\n"); - return -EOVERFLOW; - } - fd = fopen(event_id_file, "r"); - if (fd == NULL) { - ret = -errno; - WD_ERR("Couldn't open file %s\n", event_id_file); - return ret; - } - - if (fscanf(fd, "%d", &event_id) != 1) { - WD_ERR("Couldn't parse file %s\n", event_id_file); - return -EINVAL; - } - fclose(fd); - event.config = event_id; - - *perf_fds = calloc(nr_cpus, sizeof(int)); - if (!*perf_fds) - return -ENOMEM; - *nr_fds = nr_cpus; - - /* - * An event is bound to either a CPU or a PID. If we want both, we need - * to open the event on all CPUs. Note that we can't use a perf group - * since they have to be on the same CPU. - */ - for (cpu = 0; cpu < nr_cpus; cpu++) { - int fd = perf_event_open(&event, -1, cpu, -1, 0); - - if (fd < 0) { - WD_ERR("Couldn't get perf event %s on CPU%d: %d\n", - event_name, cpu, errno); - perf_event_put(*perf_fds, cpu); - return fd; - } - - ioctl(fd, PERF_EVENT_IOC_RESET, 0); - ioctl(fd, PERF_EVENT_IOC_ENABLE, 0); - (*perf_fds)[cpu] = fd; - } - - return 0; -} - -/* - * Closes the perf fd and return the sample count. If it wasn't open, return 0. - */ -unsigned long long perf_event_put(int *perf_fds, int nr_fds) -{ - int ret; - int cpu; - uint64_t count, total = 0; - - if (!perf_fds) - return 0; - - for (cpu = 0; cpu < nr_fds; cpu++) { - int fd = perf_fds[cpu]; - - if (fd <= 0) { - WD_ERR("Invalid perf fd %d\n", cpu); - continue; - } - - ioctl(fd, PERF_EVENT_IOC_DISABLE, 0); - - ret = read(fd, &count, sizeof(count)); - if (ret < sizeof(count)) - WD_ERR("Couldn't read perf event for CPU%d\n", cpu); - - total += count; - close(fd); - - } - - free(perf_fds); - return total; -} - -static void set_thp(struct test_options *opts) -{ - char *p; - char s[14]; - FILE *file; - - file = fopen("/sys/kernel/mm/transparent_hugepage/enabled", "r"); - if (!file) - goto out_err; - p = fgets(s, 14, file); - fclose(file); - if (!p) - goto out_err; - - if (strcmp(s, "never") == 0) { - printf("Cannot test THP with enable=never\n"); - return; - } - - file = fopen("/sys/kernel/mm/transparent_hugepage/defrag", "r"); - if (!file) - goto out_err; - p = fgets(s, 14, file); - fclose(file); - if (!p) - goto out_err; - - if (strcmp(s, "defer") == 0 || strcmp(s, "never") == 0) { - printf("Cannot test THP with defrag=%s\n", s); - return; - } - - return; -out_err: - printf("THP unsupported?\n"); -} - -void stat_setup(struct hizip_test_info *info) -{ - clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.setup_time); - clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.setup_cputime); - getrusage(RUSAGE_SELF, &info->tv.setup_rusage); -} - -void stat_start(struct hizip_test_info *info) -{ - clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.start_time); - clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.start_cputime); - getrusage(RUSAGE_SELF, &info->tv.start_rusage); -} - -void stat_end(struct hizip_test_info *info) -{ - struct test_options *opts = info->opts; - struct hizip_stats *stats = info->stats; - double v; - size_t total_out; - unsigned long total_len; - - total_out = __atomic_load_n(&info->total_out, __ATOMIC_ACQUIRE); - clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.end_time); - clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.end_cputime); - getrusage(RUSAGE_SELF, &info->tv.end_rusage); - - stats->v[ST_SETUP_TIME] = (info->tv.start_time.tv_sec - - info->tv.setup_time.tv_sec) * 1000000000 + - info->tv.start_time.tv_nsec - - info->tv.setup_time.tv_nsec; - stats->v[ST_RUN_TIME] = (info->tv.end_time.tv_sec - - info->tv.start_time.tv_sec) * 1000000000 + - info->tv.end_time.tv_nsec - - info->tv.start_time.tv_nsec; - - stats->v[ST_CPU_TIME] = (info->tv.end_cputime.tv_sec - - info->tv.setup_cputime.tv_sec) * 1000000000 + - info->tv.end_cputime.tv_nsec - - info->tv.setup_cputime.tv_nsec; - stats->v[ST_USER_TIME] = (info->tv.end_rusage.ru_utime.tv_sec - - info->tv.setup_rusage.ru_utime.tv_sec) * - 1000000 + - info->tv.end_rusage.ru_utime.tv_usec - - info->tv.setup_rusage.ru_utime.tv_usec; - stats->v[ST_SYSTEM_TIME] = (info->tv.end_rusage.ru_stime.tv_sec - - info->tv.setup_rusage.ru_stime.tv_sec) * - 1000000 + - info->tv.end_rusage.ru_stime.tv_usec - - info->tv.setup_rusage.ru_stime.tv_usec; - - stats->v[ST_MINFLT] = info->tv.end_rusage.ru_minflt - - info->tv.setup_rusage.ru_minflt; - stats->v[ST_MAJFLT] = info->tv.end_rusage.ru_majflt - - info->tv.setup_rusage.ru_majflt; - - stats->v[ST_VCTX] = info->tv.end_rusage.ru_nvcsw - - info->tv.setup_rusage.ru_nvcsw; - stats->v[ST_INVCTX] = info->tv.end_rusage.ru_nivcsw - - info->tv.setup_rusage.ru_nivcsw; - - stats->v[ST_SIGNALS] = info->tv.end_rusage.ru_nsignals - - info->tv.setup_rusage.ru_nsignals; - - /* check last loop is enough, same as below hizip_verify_output */ - stats->v[ST_COMPRESSION_RATIO] = (double)opts->total_len / - total_out * 100; - - total_len = opts->total_len * opts->compact_run_num; - /* ST_RUN_TIME records nanoseconds */ - stats->v[ST_SPEED] = (total_len * opts->thread_num * 1000) / - (1.024 * 1.024 * stats->v[ST_RUN_TIME]); - - stats->v[ST_TOTAL_SPEED] = (total_len * opts->thread_num * 1000) / - ((stats->v[ST_RUN_TIME] + - stats->v[ST_SETUP_TIME]) * 1.024 * 1.024); - - v = stats->v[ST_RUN_TIME] + stats->v[ST_SETUP_TIME]; - stats->v[ST_CPU_IDLE] = (v - stats->v[ST_CPU_TIME]) / v * 100; - stats->v[ST_FAULTS] = stats->v[ST_MAJFLT] + stats->v[ST_MINFLT]; -} - -static void handle_sigbus(int sig) -{ - printf("SIGBUS!\n"); - _exit(0); -} - -int main(int argc, char **argv) -{ - struct test_options opts = { - .alg_type = WD_GZIP, - .op_type = WD_DIR_COMPRESS, - .q_num = 1, - .run_num = 1, - .compact_run_num = 1, - .thread_num = 1, - .sync_mode = 0, - .block_size = 512000, - .total_len = opts.block_size * 10, - .verify = false, - .verbose = false, - .is_decomp = false, - .is_stream = false, - .is_file = false, - .display_stats = STATS_PRETTY, - .children = 0, - .faults = 0, - .data_fmt = 0, - }; - struct option long_options[] = { - {"self", no_argument, 0, 0 }, - {"in", required_argument, 0, 0 }, - {"out", required_argument, 0, 0 }, - {"ilist", required_argument, 0, 0 }, - {"olist", required_argument, 0, 0 }, - {"env", no_argument, 0, 0 }, - {0, 0, 0, 0 }, - }; - int show_help = 0; - int opt, option_idx; - int self = 0; - - opts.fd_in = -1; - opts.fd_out = -1; - opts.fd_ilist = -1; - opts.fd_olist = -1; - opts.alg_type = WD_COMP_ALG_MAX; - while ((opt = getopt_long(argc, argv, COMMON_OPTSTRING "f:o:w:k:r:", - long_options, &option_idx)) != -1) { - switch (opt) { - case 0: - switch (option_idx) { - case 0: /* self */ - self = 1; - break; - case 1: /* in */ - if (optarg) { - opts.fd_in = open(optarg, O_RDONLY); - if (opts.fd_in < 0) { - printf("Fail to open %s\n", - optarg); - show_help = 1; - } else - opts.is_file = true; - } else { - printf("Input file is missing!\n"); - show_help = 1; - } - if (lseek(opts.fd_in, 0, SEEK_SET) < 0) { - printf("Fail on lseek()!\n"); - show_help = 1; - } - break; - case 2: /* out */ - if (optarg) { - opts.fd_out = open(optarg, - O_CREAT | O_WRONLY, - S_IWUSR | S_IRGRP | - S_IROTH); - if (opts.fd_out < 0) { - printf("Fail to open %s\n", - optarg); - show_help = 1; - } else - opts.is_file = true; - } else { - printf("Output file is missing!\n"); - show_help = 1; - } - if (lseek(opts.fd_out, 0, SEEK_SET) < 0) { - printf("Fail on lseek()!\n"); - show_help = 1; - } - break; - case 3: /* ilist */ - if (!optarg) { - printf("IN list file is missing!\n"); - show_help = 1; - break; - } - opts.fd_ilist = open(optarg, O_RDONLY); - if (opts.fd_ilist < 0) { - printf("Fail to open %s\n", optarg); - show_help = 1; - break; - } - opts.is_file = true; - if (lseek(opts.fd_ilist, 0, SEEK_SET) < 0) { - printf("Fail on lseek()!\n"); - show_help = 1; - break; - } - break; - case 4: /* olist */ - if (!optarg) { - printf("OUT list file is missing!\n"); - show_help = 1; - break; - } - opts.fd_olist = open(optarg, - O_CREAT | O_WRONLY, - S_IWUSR | S_IRGRP | - S_IROTH); - if (opts.fd_olist < 0) { - printf("Fail to open %s\n", optarg); - show_help = 1; - break; - } - opts.is_file = true; - if (lseek(opts.fd_olist, 0, SEEK_SET) < 0) { - printf("Fail on lseek()!\n"); - show_help = 1; - break; - } - break; - case 5: /* env */ - opts.use_env = true; - break; - default: - show_help = 1; - break; - } - break; - case 'f': - if (strcmp(optarg, "none") == 0) { - opts.display_stats = STATS_NONE; - } else if (strcmp(optarg, "csv") == 0) { - opts.display_stats = STATS_CSV; - } else if (strcmp(optarg, "pretty") == 0) { - opts.display_stats = STATS_PRETTY; - } else { - SYS_ERR_COND(1, "invalid argument to -f: '%s'\n", optarg); - break; - } - break; - case 'o': - switch (optarg[0]) { - case 'p': - opts.option |= PERFORMANCE; - break; - case 't': - opts.option |= TEST_THP; - set_thp(&opts); - break; - default: - SYS_ERR_COND(1, "invalid argument to -o: '%s'\n", optarg); - break; - } - break; - case 'c': - opts.option |= TEST_ZLIB; - break; - case 'r': - opts.children = strtol(optarg, NULL, 0); - if (opts.children < 0) - show_help = 1; - break; - case 'k': - switch (optarg[0]) { - case 'b': - opts.faults |= INJECT_SIG_BIND; - break; - case 't': - opts.faults |= INJECT_TLB_FAULT; - break; - case 'w': - opts.faults |= INJECT_SIG_WORK; - break; - default: - SYS_ERR_COND(1, "invalid argument to -k: '%s'\n", optarg); - break; - } - break; - default: - show_help = parse_common_option(opt, optarg, &opts); - break; - } - } - - signal(SIGBUS, handle_sigbus); - - if (!show_help) { - if (self) - return run_self_test(&opts); - return run_cmd(&opts); - } - - hizip_test_adjust_len(&opts); - - SYS_ERR_COND(show_help || optind > argc, - COMMON_HELP - " -f <format> output format for the statistics\n" - " 'none' do not output statistics\n" - " 'pretty' human readable format\n" - " 'csv' raw, machine readable\n" - " -o <mode> options\n" - " 'perf' prefaults the output pages\n" - " 'thp' try to enable transparent huge pages\n" - " 'zlib' use zlib instead of the device\n" - " -r <children> number of children to create\n" - " -k <mode> kill thread\n" - " 'bind' kills the process after bind\n" - " 'tlb' tries to access an unmapped buffer\n" - " 'work' kills the process while the queue is working\n", - argv[0] - ); - return 0; -} diff --git a/test/hisi_zip_test/testsuit.c b/test/hisi_zip_test/testsuit.c index ac1a5f68..e1b157a7 100644 --- a/test/hisi_zip_test/testsuit.c +++ b/test/hisi_zip_test/testsuit.c @@ -3,12 +3,22 @@ * Copyright 2020-2021 Huawei Technologies Co.,Ltd. All rights reserved. * Copyright 2020-2021 Linaro ltd. */ - #include <linux/perf_event.h> +#include <asm/unistd.h> /* For __NR_perf_event_open */ +#include <fenv.h> +#include <getopt.h> +#include <inttypes.h> +#include <math.h> #include <signal.h> +#include <time.h> +#include <sys/ioctl.h> +#include <sys/mman.h> #include <sys/types.h> #include <sys/wait.h> +#include <unistd.h> + #include "test_lib.h" +#include "wd_sched.h" #define POLL_STRING_LEN 128 @@ -1370,3 +1380,465 @@ int run_cmd(struct test_options *opts) ret = run_one_cmd(opts); return ret; } + +int perf_event_open(struct perf_event_attr *attr, + pid_t pid, int cpu, int group_fd, + unsigned long flags) +{ + return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); +} + +unsigned long long perf_event_put(int *perf_fds, int nr_fds); + +int perf_event_get(const char *event_name, int **perf_fds, int *nr_fds) +{ + int ret; + int cpu; + FILE *fd; + int nr_cpus; + unsigned int event_id; + char event_id_file[256]; + struct perf_event_attr event = { + .type = PERF_TYPE_TRACEPOINT, + .size = sizeof(event), + .disabled = true, + }; + + *perf_fds = NULL; + *nr_fds = 0; + + nr_cpus = sysconf(_SC_NPROCESSORS_ONLN); + if (nr_cpus <= 0) { + WD_ERR("invalid number of CPUs\n"); + return nr_cpus; + } + + ret = snprintf(event_id_file, sizeof(event_id_file), + "/sys/kernel/debug/tracing/events/%s/id", event_name); + if (ret >= sizeof(event_id_file)) { + WD_ERR("event_id buffer overflow\n"); + return -EOVERFLOW; + } + fd = fopen(event_id_file, "r"); + if (fd == NULL) { + ret = -errno; + WD_ERR("Couldn't open file %s\n", event_id_file); + return ret; + } + + if (fscanf(fd, "%d", &event_id) != 1) { + WD_ERR("Couldn't parse file %s\n", event_id_file); + return -EINVAL; + } + fclose(fd); + event.config = event_id; + + *perf_fds = calloc(nr_cpus, sizeof(int)); + if (!*perf_fds) + return -ENOMEM; + *nr_fds = nr_cpus; + + /* + * An event is bound to either a CPU or a PID. If we want both, we need + * to open the event on all CPUs. Note that we can't use a perf group + * since they have to be on the same CPU. + */ + for (cpu = 0; cpu < nr_cpus; cpu++) { + int fd = perf_event_open(&event, -1, cpu, -1, 0); + + if (fd < 0) { + WD_ERR("Couldn't get perf event %s on CPU%d: %d\n", + event_name, cpu, errno); + perf_event_put(*perf_fds, cpu); + return fd; + } + + ioctl(fd, PERF_EVENT_IOC_RESET, 0); + ioctl(fd, PERF_EVENT_IOC_ENABLE, 0); + (*perf_fds)[cpu] = fd; + } + + return 0; +} + +/* + * Closes the perf fd and return the sample count. If it wasn't open, return 0. + */ +unsigned long long perf_event_put(int *perf_fds, int nr_fds) +{ + int ret; + int cpu; + uint64_t count, total = 0; + + if (!perf_fds) + return 0; + + for (cpu = 0; cpu < nr_fds; cpu++) { + int fd = perf_fds[cpu]; + + if (fd <= 0) { + WD_ERR("Invalid perf fd %d\n", cpu); + continue; + } + + ioctl(fd, PERF_EVENT_IOC_DISABLE, 0); + + ret = read(fd, &count, sizeof(count)); + if (ret < sizeof(count)) + WD_ERR("Couldn't read perf event for CPU%d\n", cpu); + + total += count; + close(fd); + + } + + free(perf_fds); + return total; +} + +static void set_thp(struct test_options *opts) +{ + char *p; + char s[14]; + FILE *file; + + file = fopen("/sys/kernel/mm/transparent_hugepage/enabled", "r"); + if (!file) + goto out_err; + p = fgets(s, 14, file); + fclose(file); + if (!p) + goto out_err; + + if (strcmp(s, "never") == 0) { + printf("Cannot test THP with enable=never\n"); + return; + } + + file = fopen("/sys/kernel/mm/transparent_hugepage/defrag", "r"); + if (!file) + goto out_err; + p = fgets(s, 14, file); + fclose(file); + if (!p) + goto out_err; + + if (strcmp(s, "defer") == 0 || strcmp(s, "never") == 0) { + printf("Cannot test THP with defrag=%s\n", s); + return; + } + + return; +out_err: + printf("THP unsupported?\n"); +} + +void stat_setup(struct hizip_test_info *info) +{ + clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.setup_time); + clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.setup_cputime); + getrusage(RUSAGE_SELF, &info->tv.setup_rusage); +} + +void stat_start(struct hizip_test_info *info) +{ + clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.start_time); + clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.start_cputime); + getrusage(RUSAGE_SELF, &info->tv.start_rusage); +} + +void stat_end(struct hizip_test_info *info) +{ + struct test_options *opts = info->opts; + struct hizip_stats *stats = info->stats; + double v; + size_t total_out; + unsigned long total_len; + + total_out = __atomic_load_n(&info->total_out, __ATOMIC_ACQUIRE); + clock_gettime(CLOCK_MONOTONIC_RAW, &info->tv.end_time); + clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &info->tv.end_cputime); + getrusage(RUSAGE_SELF, &info->tv.end_rusage); + + stats->v[ST_SETUP_TIME] = (info->tv.start_time.tv_sec - + info->tv.setup_time.tv_sec) * 1000000000 + + info->tv.start_time.tv_nsec - + info->tv.setup_time.tv_nsec; + stats->v[ST_RUN_TIME] = (info->tv.end_time.tv_sec - + info->tv.start_time.tv_sec) * 1000000000 + + info->tv.end_time.tv_nsec - + info->tv.start_time.tv_nsec; + + stats->v[ST_CPU_TIME] = (info->tv.end_cputime.tv_sec - + info->tv.setup_cputime.tv_sec) * 1000000000 + + info->tv.end_cputime.tv_nsec - + info->tv.setup_cputime.tv_nsec; + stats->v[ST_USER_TIME] = (info->tv.end_rusage.ru_utime.tv_sec - + info->tv.setup_rusage.ru_utime.tv_sec) * + 1000000 + + info->tv.end_rusage.ru_utime.tv_usec - + info->tv.setup_rusage.ru_utime.tv_usec; + stats->v[ST_SYSTEM_TIME] = (info->tv.end_rusage.ru_stime.tv_sec - + info->tv.setup_rusage.ru_stime.tv_sec) * + 1000000 + + info->tv.end_rusage.ru_stime.tv_usec - + info->tv.setup_rusage.ru_stime.tv_usec; + + stats->v[ST_MINFLT] = info->tv.end_rusage.ru_minflt - + info->tv.setup_rusage.ru_minflt; + stats->v[ST_MAJFLT] = info->tv.end_rusage.ru_majflt - + info->tv.setup_rusage.ru_majflt; + + stats->v[ST_VCTX] = info->tv.end_rusage.ru_nvcsw - + info->tv.setup_rusage.ru_nvcsw; + stats->v[ST_INVCTX] = info->tv.end_rusage.ru_nivcsw - + info->tv.setup_rusage.ru_nivcsw; + + stats->v[ST_SIGNALS] = info->tv.end_rusage.ru_nsignals - + info->tv.setup_rusage.ru_nsignals; + + /* check last loop is enough, same as below hizip_verify_output */ + stats->v[ST_COMPRESSION_RATIO] = (double)opts->total_len / + total_out * 100; + + total_len = opts->total_len * opts->compact_run_num; + /* ST_RUN_TIME records nanoseconds */ + stats->v[ST_SPEED] = (total_len * opts->thread_num * 1000) / + (1.024 * 1.024 * stats->v[ST_RUN_TIME]); + + stats->v[ST_TOTAL_SPEED] = (total_len * opts->thread_num * 1000) / + ((stats->v[ST_RUN_TIME] + + stats->v[ST_SETUP_TIME]) * 1.024 * 1.024); + + v = stats->v[ST_RUN_TIME] + stats->v[ST_SETUP_TIME]; + stats->v[ST_CPU_IDLE] = (v - stats->v[ST_CPU_TIME]) / v * 100; + stats->v[ST_FAULTS] = stats->v[ST_MAJFLT] + stats->v[ST_MINFLT]; +} + +static void handle_sigbus(int sig) +{ + printf("SIGBUS!\n"); + _exit(0); +} + +int main(int argc, char **argv) +{ + struct test_options opts = { + .alg_type = WD_GZIP, + .op_type = WD_DIR_COMPRESS, + .q_num = 1, + .run_num = 1, + .compact_run_num = 1, + .thread_num = 1, + .sync_mode = 0, + .block_size = 512000, + .total_len = opts.block_size * 10, + .verify = false, + .verbose = false, + .is_decomp = false, + .is_stream = false, + .is_file = false, + .display_stats = STATS_PRETTY, + .children = 0, + .faults = 0, + .data_fmt = 0, + }; + struct option long_options[] = { + {"self", no_argument, 0, 0 }, + {"in", required_argument, 0, 0 }, + {"out", required_argument, 0, 0 }, + {"ilist", required_argument, 0, 0 }, + {"olist", required_argument, 0, 0 }, + {"env", no_argument, 0, 0 }, + {0, 0, 0, 0 }, + }; + int show_help = 0; + int opt, option_idx; + int self = 0; + + opts.fd_in = -1; + opts.fd_out = -1; + opts.fd_ilist = -1; + opts.fd_olist = -1; + opts.alg_type = WD_COMP_ALG_MAX; + while ((opt = getopt_long(argc, argv, COMMON_OPTSTRING "f:o:w:k:r:", + long_options, &option_idx)) != -1) { + switch (opt) { + case 0: + switch (option_idx) { + case 0: /* self */ + self = 1; + break; + case 1: /* in */ + if (optarg) { + opts.fd_in = open(optarg, O_RDONLY); + if (opts.fd_in < 0) { + printf("Fail to open %s\n", + optarg); + show_help = 1; + } else + opts.is_file = true; + } else { + printf("Input file is missing!\n"); + show_help = 1; + } + if (lseek(opts.fd_in, 0, SEEK_SET) < 0) { + printf("Fail on lseek()!\n"); + show_help = 1; + } + break; + case 2: /* out */ + if (optarg) { + opts.fd_out = open(optarg, + O_CREAT | O_WRONLY, + S_IWUSR | S_IRGRP | + S_IROTH); + if (opts.fd_out < 0) { + printf("Fail to open %s\n", + optarg); + show_help = 1; + } else + opts.is_file = true; + } else { + printf("Output file is missing!\n"); + show_help = 1; + } + if (lseek(opts.fd_out, 0, SEEK_SET) < 0) { + printf("Fail on lseek()!\n"); + show_help = 1; + } + break; + case 3: /* ilist */ + if (!optarg) { + printf("IN list file is missing!\n"); + show_help = 1; + break; + } + opts.fd_ilist = open(optarg, O_RDONLY); + if (opts.fd_ilist < 0) { + printf("Fail to open %s\n", optarg); + show_help = 1; + break; + } + opts.is_file = true; + if (lseek(opts.fd_ilist, 0, SEEK_SET) < 0) { + printf("Fail on lseek()!\n"); + show_help = 1; + break; + } + break; + case 4: /* olist */ + if (!optarg) { + printf("OUT list file is missing!\n"); + show_help = 1; + break; + } + opts.fd_olist = open(optarg, + O_CREAT | O_WRONLY, + S_IWUSR | S_IRGRP | + S_IROTH); + if (opts.fd_olist < 0) { + printf("Fail to open %s\n", optarg); + show_help = 1; + break; + } + opts.is_file = true; + if (lseek(opts.fd_olist, 0, SEEK_SET) < 0) { + printf("Fail on lseek()!\n"); + show_help = 1; + break; + } + break; + case 5: /* env */ + opts.use_env = true; + break; + default: + show_help = 1; + break; + } + break; + case 'f': + if (strcmp(optarg, "none") == 0) { + opts.display_stats = STATS_NONE; + } else if (strcmp(optarg, "csv") == 0) { + opts.display_stats = STATS_CSV; + } else if (strcmp(optarg, "pretty") == 0) { + opts.display_stats = STATS_PRETTY; + } else { + SYS_ERR_COND(1, "invalid argument to -f: '%s'\n", optarg); + break; + } + break; + case 'o': + switch (optarg[0]) { + case 'p': + opts.option |= PERFORMANCE; + break; + case 't': + opts.option |= TEST_THP; + set_thp(&opts); + break; + default: + SYS_ERR_COND(1, "invalid argument to -o: '%s'\n", optarg); + break; + } + break; + case 'c': + opts.option |= TEST_ZLIB; + break; + case 'r': + opts.children = strtol(optarg, NULL, 0); + if (opts.children < 0) + show_help = 1; + break; + case 'k': + switch (optarg[0]) { + case 'b': + opts.faults |= INJECT_SIG_BIND; + break; + case 't': + opts.faults |= INJECT_TLB_FAULT; + break; + case 'w': + opts.faults |= INJECT_SIG_WORK; + break; + default: + SYS_ERR_COND(1, "invalid argument to -k: '%s'\n", optarg); + break; + } + break; + default: + show_help = parse_common_option(opt, optarg, &opts); + break; + } + } + + signal(SIGBUS, handle_sigbus); + + if (!show_help) { + if (self) + return run_self_test(&opts); + return run_cmd(&opts); + } + + hizip_test_adjust_len(&opts); + + SYS_ERR_COND(show_help || optind > argc, + COMMON_HELP + " -f <format> output format for the statistics\n" + " 'none' do not output statistics\n" + " 'pretty' human readable format\n" + " 'csv' raw, machine readable\n" + " -o <mode> options\n" + " 'perf' prefaults the output pages\n" + " 'thp' try to enable transparent huge pages\n" + " 'zlib' use zlib instead of the device\n" + " -r <children> number of children to create\n" + " -k <mode> kill thread\n" + " 'bind' kills the process after bind\n" + " 'tlb' tries to access an unmapped buffer\n" + " 'work' kills the process while the queue is working\n", + argv[0] + ); + return 0; +} \ No newline at end of file -- 2.33.0

1 0

[PATCH] uadk: add null pointer check
by Qi Tao 10 Oct '24

10 Oct '24

Add null pointer check to avoid segment errors. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- drv/hash_mb/hash_mb.c | 6 +++--- drv/hisi_comp.c | 8 +++----- drv/hisi_dae.c | 6 +++--- drv/hisi_hpre.c | 8 +++----- drv/hisi_sec.c | 8 +++----- drv/isa_ce_sm3.c | 6 +++--- drv/isa_ce_sm4.c | 6 +++--- 7 files changed, 21 insertions(+), 27 deletions(-) diff --git a/drv/hash_mb/hash_mb.c b/drv/hash_mb/hash_mb.c index e4a9564f..9ad36b81 100644 --- a/drv/hash_mb/hash_mb.c +++ b/drv/hash_mb/hash_mb.c @@ -217,11 +217,11 @@ static int hash_mb_init(struct wd_alg_driver *drv, void *conf) static void hash_mb_exit(struct wd_alg_driver *drv) { - struct hash_mb_ctx *priv = (struct hash_mb_ctx *)drv->priv; - - if (!priv) + if(!drv || !drv->priv) return; + struct hash_mb_ctx *priv = (struct hash_mb_ctx *)drv->priv; + hash_mb_queue_uninit(&priv->config, priv->config.ctx_num); free(priv); drv->priv = NULL; diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c index 4c8e18b2..c5569986 100644 --- a/drv/hisi_comp.c +++ b/drv/hisi_comp.c @@ -835,16 +835,14 @@ out: static void hisi_zip_exit(struct wd_alg_driver *drv) { + if(!drv || !drv->priv) + return; + struct hisi_zip_ctx *priv = (struct hisi_zip_ctx *)drv->priv; struct wd_ctx_config_internal *config; handle_t h_qp; __u32 i; - if (!priv) { - /* return if already exit */ - return; - } - config = &priv->config; for (i = 0; i < config->ctx_num; i++) { h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx); diff --git a/drv/hisi_dae.c b/drv/hisi_dae.c index 09d23874..864d21ba 100644 --- a/drv/hisi_dae.c +++ b/drv/hisi_dae.c @@ -1604,14 +1604,14 @@ out: static void dae_exit(struct wd_alg_driver *drv) { + if(!drv || !drv->priv) + return; + struct hisi_dae_ctx *priv = (struct hisi_dae_ctx *)drv->priv; struct wd_ctx_config_internal *config; handle_t h_qp; __u32 i; - if (!priv) - return; - config = &priv->config; for (i = 0; i < config->ctx_num; i++) { h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx); diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c index 37bb5ee1..313cdcc8 100644 --- a/drv/hisi_hpre.c +++ b/drv/hisi_hpre.c @@ -583,16 +583,14 @@ static int hpre_ecc_init(struct wd_alg_driver *drv, void *conf) static void hpre_exit(struct wd_alg_driver *drv) { + if(!drv || !drv->priv) + return; + struct hisi_hpre_ctx *priv = (struct hisi_hpre_ctx *)drv->priv; struct wd_ctx_config_internal *config; handle_t h_qp; __u32 i; - if (!priv) { - /* return if already exit */ - return; - } - config = &priv->config; for (i = 0; i < config->ctx_num; i++) { h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx); diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 0a1bcc1e..63775869 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -3102,16 +3102,14 @@ out: static void hisi_sec_exit(struct wd_alg_driver *drv) { + if(!drv || !drv->priv) + return; + struct hisi_sec_ctx *priv = (struct hisi_sec_ctx *)drv->priv; struct wd_ctx_config_internal *config; handle_t h_qp; __u32 i; - if (!priv) { - /* return if already exit */ - return; - } - config = &priv->config; for (i = 0; i < config->ctx_num; i++) { h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx); diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c index 99cd6404..54c2a9e7 100644 --- a/drv/isa_ce_sm3.c +++ b/drv/isa_ce_sm3.c @@ -392,11 +392,11 @@ static int sm3_ce_drv_init(struct wd_alg_driver *drv, void *conf) static void sm3_ce_drv_exit(struct wd_alg_driver *drv) { - struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv; - - if (!sctx) + if(!drv || !drv->priv) return; + struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv; + free(sctx); drv->priv = NULL; } diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c index 3404465b..5e448fa0 100644 --- a/drv/isa_ce_sm4.c +++ b/drv/isa_ce_sm4.c @@ -53,11 +53,11 @@ static int isa_ce_init(struct wd_alg_driver *drv, void *conf) static void isa_ce_exit(struct wd_alg_driver *drv) { - struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv; - - if (!sctx) + if(!drv || !drv->priv) return; + struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv; + free(sctx); drv->priv = NULL; } -- 2.33.0

1 0

[PATCH 0/3] uadk bugfix and cleancode
by Qi Tao 20 Sep '24

20 Sep '24

1 3

[PATCH 0/2] uadk bugfix
by Qi Tao 18 Sep '24

18 Sep '24

1 1

【2024/9/18 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 18 Sep '24

18 Sep '24

您好！ sig-AccLib 邀请您参加 2024-09-18 11:00 召开的Zoom会议会议主题：【2024/9/18 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet 会议链接：https://us06web.zoom.us/j/82527197073?pwd=v1a6nAa4mhNveGnL8lI0RkJcQahjqR.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-09-18 11:00, The subject of the conference is 【2024/9/18 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：etherpad.openeuler.org/p/sig-AccLib-meet You can join the meeting at https://us06web.zoom.us/j/82527197073?pwd=v1a6nAa4mhNveGnL8lI0RkJcQahjqR.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH v4 0/4] Support SM2 in uadk provider
by Zhiqi Song 14 Sep '24

14 Sep '24

Support SM2 in uadk provider and add sanity test for it. v4: Update sanity test, check whether SM2 is supported. v3: Fixup parameter error in sanity test. v2: Fixup compile warning and add sanity test. v1: Support SM2 in uadk provider. Zhiqi Song (4): uadk_provider: add der encode and packet for SM2 uadk_provider: support sm2 hardware acceleration uadk_provider: add sanity test command for SM2 uadk_engine/digest: cleanup pointer type src/Makefile.am | 4 +- src/uadk_digest.c | 2 +- src/uadk_prov.h | 15 +- src/uadk_prov_bio.c | 3 +- src/uadk_prov_der_writer.c | 236 +++ src/uadk_prov_der_writer.h | 129 ++ src/uadk_prov_init.c | 14 +- src/uadk_prov_packet.c | 514 ++++++ src/uadk_prov_packet.h | 959 +++++++++++ src/uadk_prov_pkey.c | 770 +++++++++ src/uadk_prov_pkey.h | 389 +++++ src/uadk_prov_sm2.c | 3127 ++++++++++++++++++++++++++++++++++ test/sanity_test_provider.sh | 32 + 13 files changed, 6186 insertions(+), 8 deletions(-) create mode 100644 src/uadk_prov_der_writer.c create mode 100644 src/uadk_prov_der_writer.h create mode 100644 src/uadk_prov_packet.c create mode 100644 src/uadk_prov_packet.h create mode 100644 src/uadk_prov_pkey.c create mode 100644 src/uadk_prov_pkey.h create mode 100644 src/uadk_prov_sm2.c -- 2.33.0

1 4

[PATCH v3 0/4] Support SM2 in uadk provider
by Zhiqi Song 05 Sep '24

05 Sep '24

Support SM2 in uadk provider and add sanity test for it. v3: Fixup parameter error in sanity test. v2: Fixup compile warning and add sanity test. v1: Support SM2 in uadk provider. Zhiqi Song (4): uadk_provider: add der encode and packet for SM2 uadk_provider: support sm2 hardware acceleration uadk_provider: add sanity test command for SM2 uadk_engine/digest: cleanup pointer type src/Makefile.am | 4 +- src/uadk_digest.c | 2 +- src/uadk_prov.h | 15 +- src/uadk_prov_bio.c | 3 +- src/uadk_prov_der_writer.c | 236 +++ src/uadk_prov_der_writer.h | 129 ++ src/uadk_prov_init.c | 14 +- src/uadk_prov_packet.c | 514 ++++++ src/uadk_prov_packet.h | 959 +++++++++++ src/uadk_prov_pkey.c | 770 +++++++++ src/uadk_prov_pkey.h | 389 +++++ src/uadk_prov_sm2.c | 3127 ++++++++++++++++++++++++++++++++++ test/sanity_test_provider.sh | 18 + 13 files changed, 6172 insertions(+), 8 deletions(-) create mode 100644 src/uadk_prov_der_writer.c create mode 100644 src/uadk_prov_der_writer.h create mode 100644 src/uadk_prov_packet.c create mode 100644 src/uadk_prov_packet.h create mode 100644 src/uadk_prov_pkey.c create mode 100644 src/uadk_prov_pkey.h create mode 100644 src/uadk_prov_sm2.c -- 2.33.0

1 4

[PATCH v2 0/4] Fixup compile warning
by Zhiqi Song 05 Sep '24

05 Sep '24

This version fixup some compile warning and add sanity test for SM2. Zhiqi Song (4): uadk_provider: add der encode and packet for SM2 uadk_provider: support sm2 hardware acceleration uadk_provider: add sanity test command for SM2 uadk_engine/digest: cleanup pointer type src/Makefile.am | 4 +- src/uadk_digest.c | 2 +- src/uadk_prov.h | 15 +- src/uadk_prov_bio.c | 3 +- src/uadk_prov_der_writer.c | 236 +++ src/uadk_prov_der_writer.h | 129 ++ src/uadk_prov_init.c | 14 +- src/uadk_prov_packet.c | 514 ++++++ src/uadk_prov_packet.h | 959 +++++++++++ src/uadk_prov_pkey.c | 770 +++++++++ src/uadk_prov_pkey.h | 389 +++++ src/uadk_prov_sm2.c | 3127 ++++++++++++++++++++++++++++++++++ test/sanity_test_provider.sh | 18 + 13 files changed, 6172 insertions(+), 8 deletions(-) create mode 100644 src/uadk_prov_der_writer.c create mode 100644 src/uadk_prov_der_writer.h create mode 100644 src/uadk_prov_packet.c create mode 100644 src/uadk_prov_packet.h create mode 100644 src/uadk_prov_pkey.c create mode 100644 src/uadk_prov_pkey.h create mode 100644 src/uadk_prov_sm2.c -- 2.33.0

1 1

[PATCH] uadk/isa-ce: fix sm4 CE driver initialization error
by Qi Tao 05 Sep '24

05 Sep '24

CE driver of sm4 should alloc and free private ctx by himself. The cleancode issue of sm3 CE driver is also solved. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- drv/isa_ce_sm3.c | 15 ++++++--------- drv/isa_ce_sm4.c | 18 +++++++++++++++--- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c index 59f39409..99cd6404 100644 --- a/drv/isa_ce_sm3.c +++ b/drv/isa_ce_sm3.c @@ -373,22 +373,19 @@ static int sm3_ce_drv_recv(struct wd_alg_driver *drv, handle_t ctx, void *digest static int sm3_ce_drv_init(struct wd_alg_driver *drv, void *conf) { struct wd_ctx_config_internal *config = (struct wd_ctx_config_internal *)conf; - struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv; + struct sm3_ce_drv_ctx *priv; /* Fallback init is NULL */ if (!drv || !conf) return 0; - config->epoll_en = 0; - - /* return if already inited */ - if (sctx) - return WD_SUCCESS; - sctx = malloc(sizeof(struct sm3_ce_drv_ctx)); - if (!sctx) + priv = malloc(sizeof(struct sm3_ce_drv_ctx)); + if (!priv) return -WD_EINVAL; - memcpy(&sctx->config, config, sizeof(struct wd_ctx_config_internal)); + config->epoll_en = 0; + memcpy(&priv->config, config, sizeof(struct wd_ctx_config_internal)); + drv->priv = priv; return WD_SUCCESS; } diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c index e9378930..3404465b 100644 --- a/drv/isa_ce_sm4.c +++ b/drv/isa_ce_sm4.c @@ -34,20 +34,32 @@ static int isa_ce_init(struct wd_alg_driver *drv, void *conf) { struct wd_ctx_config_internal *config = conf; - struct sm4_ce_drv_ctx *sctx = drv->priv; + struct sm4_ce_drv_ctx *priv; /* Fallback init is NULL */ if (!drv || !conf) return 0; + priv = malloc(sizeof(struct sm4_ce_drv_ctx)); + if (!priv) + return -WD_EINVAL; + config->epoll_en = 0; - memcpy(&sctx->config, config, sizeof(struct wd_ctx_config_internal)); + memcpy(&priv->config, config, sizeof(struct wd_ctx_config_internal)); + drv->priv = priv; - return 0; + return WD_SUCCESS; } static void isa_ce_exit(struct wd_alg_driver *drv) { + struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv; + + if (!sctx) + return; + + free(sctx); + drv->priv = NULL; } /* increment upper 96 bits of 128-bit counter by 1 */ -- 2.33.0

1 0

[PATCH] uadk/isa-ce: fix sm4 ce INSTR driver initialization error
by Qi Tao 05 Sep '24

05 Sep '24

INSTR driver should alloc and free private ctx by himself. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- drv/isa_ce_sm4.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c index e9378930..b81362c8 100644 --- a/drv/isa_ce_sm4.c +++ b/drv/isa_ce_sm4.c @@ -34,20 +34,31 @@ static int isa_ce_init(struct wd_alg_driver *drv, void *conf) { struct wd_ctx_config_internal *config = conf; - struct sm4_ce_drv_ctx *sctx = drv->priv; + struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv; - /* Fallback init is NULL */ - if (!drv || !conf) - return 0; + /* return if already inited */ + if (sctx) + return WD_SUCCESS; + + sctx = malloc(sizeof(struct sm4_ce_drv_ctx)); + if (!sctx) + return -WD_EINVAL; config->epoll_en = 0; memcpy(&sctx->config, config, sizeof(struct wd_ctx_config_internal)); - return 0; + return WD_SUCCESS; } static void isa_ce_exit(struct wd_alg_driver *drv) { + struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv; + + if (!sctx) + return; + + free(sctx); + drv->priv = NULL; } /* increment upper 96 bits of 128-bit counter by 1 */ -- 2.33.0

1 0

[PATCH] uadk: fix null pointer error
by Qi Tao 04 Sep '24

04 Sep '24

The null pointer check is added. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- drv/isa_ce_sm4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c index e9378930..3420f992 100644 --- a/drv/isa_ce_sm4.c +++ b/drv/isa_ce_sm4.c @@ -37,7 +37,7 @@ static int isa_ce_init(struct wd_alg_driver *drv, void *conf) struct sm4_ce_drv_ctx *sctx = drv->priv; /* Fallback init is NULL */ - if (!drv || !conf) + if (!drv->priv || !conf) return 0; config->epoll_en = 0; -- 2.33.0

1 0

【2024/9/4 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 03 Sep '24

03 Sep '24

您好！ sig-AccLib 邀请您参加 2024-09-04 11:00 召开的Zoom会议会议主题：【2024/9/4 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：【2024/9/4 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https:/ 会议链接：https://us06web.zoom.us/j/85996804695?pwd=YIMrj33nWD5nvse9QhruMbHa6DFmWU.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-09-04 11:00, The subject of the conference is 【2024/9/4 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 【2024/9/4 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https:/ You can join the meeting at https://us06web.zoom.us/j/85996804695?pwd=YIMrj33nWD5nvse9QhruMbHa6DFmWU.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

【2024/8/21 AccLIb SIG 双周例会 11:00 - 12:00】
by openEuler conference 20 Aug '24

20 Aug '24

您好！ sig-AccLib 邀请您参加 2024-08-21 11:00 召开的Zoom会议会议主题：【2024/8/21 AccLIb SIG 双周例会 11:00 - 12:00】会议内容：【2024/8/21 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https: 会议链接：https://us06web.zoom.us/j/84500973610?pwd=rlenzFNEjZYQxQQiPsLI1ulhPIGwpj.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-08-21 11:00, The subject of the conference is 【2024/8/21 AccLIb SIG 双周例会 11:00 - 12:00】, Summary: 【2024/8/21 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https: You can join the meeting at https://us06web.zoom.us/j/84500973610?pwd=rlenzFNEjZYQxQQiPsLI1ulhPIGwpj.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 0/6] uadk bugfix and cleancode
by Qi Tao 20 Aug '24

20 Aug '24

*** BLURB HERE *** Weili Qian (3): uadk: modify address check uadk: check calloc return value drv/hisi_sec: modify minor errors in hisi_sec.c Wenkai Lin (3): uadk/v1: fix for sec_dump_bd uadk/v1: fix for wd_recv_sync print uadk/v1: update the symbol table for libraries drv/hisi_sec.c | 59 ++++++++++++++++++++++++++---------------- include/wd_util.h | 2 +- v1/drv/hisi_sec_udrv.c | 13 ++++------ v1/libwd.map | 1 + v1/wd.c | 11 +++++--- wd_aead.c | 19 +++++++------- wd_cipher.c | 14 +++++----- wd_digest.c | 18 ++++++++----- wd_util.c | 14 ++++++---- 9 files changed, 88 insertions(+), 63 deletions(-) -- 2.33.0

1 0

[PATCH 0/2] support data analysis engine (DAE)
by Qi Tao 20 Aug '24

20 Aug '24

*** BLURB HERE *** Weili Qian (1): drv/dae: support hashagg algorithm Wenkai Lin (1): uadk: support for the DAE algorithm layer Makefile.am | 28 +- drv/hisi_dae.c | 1686 ++++++++++++++++++++++++++++++++++++++ drv/hisi_qm_udrv.h | 1 + include/drv/wd_agg_drv.h | 56 ++ include/wd_agg.h | 233 ++++++ include/wd_alg.h | 3 + include/wd_dae.h | 80 ++ include/wd_util.h | 1 + libwd_dae.map | 21 + wd_agg.c | 1572 +++++++++++++++++++++++++++++++++++ wd_util.c | 2 + 11 files changed, 3680 insertions(+), 3 deletions(-) create mode 100644 drv/hisi_dae.c create mode 100644 include/drv/wd_agg_drv.h create mode 100644 include/wd_agg.h create mode 100644 include/wd_dae.h create mode 100644 libwd_dae.map create mode 100644 wd_agg.c -- 2.33.0

1 0

[PATCH 00/12] uadk_provider: add sm2 combined digest support
by Zhiqi Song 09 Aug '24

09 Aug '24

From: JiangShui Yang <yangjiangshui(a)h-partners.com> Chenghai Huang (9): uadk_provider: define the err and success return name uadk_provider: add digest single block function for provider uadk_provider: add input pointer check uadk_provider: code cleanup for provider digest uadk_provider: extract Digest info table check function uadk_provider: optimized provider update performance uadk_provider: add sha512_XXX algorithm name processing uadk_provider: fix the uadk_provider digest ctx copy function uadk_engine: optimized engine update process Zhiqi Song (3): uadk_provider: fixup bio problem in provider uadk_provider: add der encode and packet for SM2 uadk_provider: support sm2 hardware acceleration src/Makefile.am | 5 +- src/uadk_digest.c | 44 +- src/uadk_prov.h | 54 +- src/uadk_prov_bio.c | 265 +++ src/uadk_prov_bio.h | 34 + src/uadk_prov_der_writer.c | 236 +++ src/uadk_prov_der_writer.h | 129 ++ src/uadk_prov_digest.c | 352 ++-- src/uadk_prov_init.c | 84 +- src/uadk_prov_packet.c | 514 ++++++ src/uadk_prov_packet.h | 959 +++++++++++ src/uadk_prov_pkey.c | 770 +++++++++ src/uadk_prov_pkey.h | 429 +++++ src/uadk_prov_sm2.c | 3146 ++++++++++++++++++++++++++++++++++++ 14 files changed, 6864 insertions(+), 157 deletions(-) create mode 100644 src/uadk_prov_bio.c create mode 100644 src/uadk_prov_bio.h create mode 100644 src/uadk_prov_der_writer.c create mode 100644 src/uadk_prov_der_writer.h create mode 100644 src/uadk_prov_packet.c create mode 100644 src/uadk_prov_packet.h create mode 100644 src/uadk_prov_pkey.c create mode 100644 src/uadk_prov_pkey.h create mode 100644 src/uadk_prov_sm2.c -- 2.33.0

1 12

2024/8/7 AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 06 Aug '24

06 Aug '24

您好！ sig-AccLib 邀请您参加 2024-08-07 11:00 召开的Zoom会议会议主题：2024/8/7 AccLIb SIG 双周例会 11:00 - 12:00 会议内容：【2024/8/7 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https:/ 会议链接：https://us06web.zoom.us/j/81334232449?pwd=rifafowIKDAIffEuwmXrCsgxxyk4aG.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-08-07 11:00, The subject of the conference is 2024/8/7 AccLIb SIG 双周例会 11:00 - 12:00, Summary: 【2024/8/7 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：linaro-org.zoom.us/j/91879279131 会议纪要：https:/ You can join the meeting at https://us06web.zoom.us/j/81334232449?pwd=rifafowIKDAIffEuwmXrCsgxxyk4aG.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 24 Jul '24

24 Jul '24

您好！ sig-AccLib 邀请您参加 2024-07-24 11:00 召开的Zoom会议会议主题：AccLIb SIG 双周例会 11:00 - 12:00 会议内容：【2024/7/24 AccLIb SIG 双周例会 11:00 - 12:00】 linaro-org.zoom.us/j/91879279131 会议纪要：https 会议链接：https://us06web.zoom.us/j/83030265057?pwd=q7Ojxc1bVEbDbgUdwUdywbl5zxZgWd.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-07-24 11:00, The subject of the conference is AccLIb SIG 双周例会 11:00 - 12:00, Summary: 【2024/7/24 AccLIb SIG 双周例会 11:00 - 12:00】 linaro-org.zoom.us/j/91879279131 会议纪要：https You can join the meeting at https://us06web.zoom.us/j/83030265057?pwd=q7Ojxc1bVEbDbgUdwUdywbl5zxZgWd.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 0/9] bugfix for uadk
by Qi Tao 23 Jul '24

23 Jul '24

*** BLURB HERE *** Longfang Liu (2): uadk_tools: add segfault locating function uadk: bugfix CE driver initialization problem Wenkai Lin (5): uadk/v1: fix for atomic memory order uadk: replace wd_lock to pthread_spinlock uadk/v1: fix for wd_lock implementation uadk: fix for env uninit segment fault uadk/v1: replace wd_spinlock to pthread_spin_lock Yang Shen (1): uadk/v1/drv: hisi_zip_udrv - fix the wrong literal buffer size Zhiqi Song (1): uadk/v1/hpre: remove redundant comments drv/hash_mb/hash_mb.c | 4 ++ drv/isa_ce_sm3.c | 6 +- drv/isa_ce_sm4.c | 4 ++ uadk_tool/benchmark/hpre_uadk_benchmark.c | 1 + uadk_tool/benchmark/hpre_wd_benchmark.c | 1 + uadk_tool/benchmark/sec_soft_benchmark.c | 1 + uadk_tool/benchmark/sec_uadk_benchmark.c | 1 + uadk_tool/benchmark/sec_wd_benchmark.c | 1 + uadk_tool/benchmark/trng_wd_benchmark.c | 1 + uadk_tool/benchmark/uadk_benchmark.c | 15 +++++ uadk_tool/benchmark/uadk_benchmark.h | 3 + uadk_tool/benchmark/zip_uadk_benchmark.c | 1 + uadk_tool/benchmark/zip_wd_benchmark.c | 1 + v1/drv/hisi_hpre_udrv.c | 14 +---- v1/drv/hisi_qm_udrv.c | 51 +++++++++++----- v1/drv/hisi_qm_udrv.h | 4 +- v1/drv/hisi_rng_udrv.c | 25 +++++--- v1/drv/hisi_rng_udrv.h | 2 +- v1/drv/hisi_zip_udrv.c | 14 ++--- v1/wd_util.c | 17 ++++-- wd_mempool.c | 74 +++++++++++------------ wd_util.c | 1 + 22 files changed, 154 insertions(+), 88 deletions(-) -- 2.33.0

1 9

ACCLIB例会
by openEuler conference 09 Jul '24

09 Jul '24

您好！ sig-AccLib 邀请您参加 2024-07-10 11:00 召开的Zoom会议会议主题：ACCLIB例会会议链接：https://us06web.zoom.us/j/82951584231?pwd=FatBbR4c0Fbsq6bFkrmxvoCBvs84Pq.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-07-10 11:00, The subject of the conference is ACCLIB例会, You can join the meeting at https://us06web.zoom.us/j/82951584231?pwd=FatBbR4c0Fbsq6bFkrmxvoCBvs84Pq.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

AccLIb SIG 双周例会
by openEuler conference 25 Jun '24

25 Jun '24

您好！ sig-AccLib 邀请您参加 2024-06-26 11:00 召开的Zoom会议会议主题：AccLIb SIG 双周例会会议内容： linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/87077812516?pwd=2JSawhFFCG6wBq0DK0kWpxcwZjBcty.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-06-26 11:00, The subject of the conference is AccLIb SIG 双周例会, Summary: linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/87077812516?pwd=2JSawhFFCG6wBq0DK0kWpxcwZjBcty.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

AccLib SIG双周例会
by openEuler conference 11 Jun '24

11 Jun '24

您好！ sig-AccLib 邀请您参加 2024-06-12 11:00 召开的Zoom会议会议主题：AccLib SIG双周例会会议内容：固定会议链接 linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/84998548777?pwd=jCmVgPW70gOEfFDG2794b2UhYoR1zq.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-06-12 11:00, The subject of the conference is AccLib SIG双周例会, Summary: 固定会议链接 linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/84998548777?pwd=jCmVgPW70gOEfFDG2794b2UhYoR1zq.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH 01/15] cipher: add ctrl function, used by ASF set numa affinity
by Zhiqi Song 31 May '24

31 May '24

From: wangzengliang <wangzengliang2(a)huawei.com> Signed-off-by: wangzengliang <wangzengliang2(a)huawei.com> Signed-off-by: JiangShui Yang <yangjiangshui(a)h-partners.com> --- src/uadk_cipher.c | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index b506c22..adcde01 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -67,6 +67,7 @@ struct cipher_priv_ctx { /* Crypto small packet offload threshold */ size_t switch_threshold; bool update_iv; + struct sched_params sched_param; }; struct cipher_info { @@ -690,11 +691,26 @@ static int do_cipher_async(struct cipher_priv_ctx *priv, struct async_op *op) return 1; } +static int uadk_e_cipher_ctrl(EVP_CIPHER_CTX *ctx, int type, int numa_node, void *ptr) +{ + struct cipher_priv_ctx *priv = + (struct cipher_priv_ctx *)EVP_CIPHER_CTX_get_cipher_data(ctx); + + if (unlikely(!priv)) { + fprintf(stderr, "cipher priv ctx is NULL!\n"); + return 0; + } + + priv->sched_param.numa_id = numa_node; + priv->setup.sched_param = (void *)&(priv->sched_param); + return 1; +} + static void uadk_e_ctx_init(EVP_CIPHER_CTX *ctx, struct cipher_priv_ctx *priv) { __u32 cipher_counts = ARRAY_SIZE(cipher_info_table); - struct sched_params params = {0}; - int nid, ret; + struct sched_params *para; + int nid, ret, type; __u32 i; priv->req.iv_bytes = EVP_CIPHER_CTX_iv_length(ctx); @@ -715,14 +731,17 @@ static void uadk_e_ctx_init(EVP_CIPHER_CTX *ctx, struct cipher_priv_ctx *priv) * the cipher algorithm does not distinguish between * encryption and decryption queues */ - params.type = priv->req.op_type; + type = priv->req.op_type; ret = uadk_e_is_env_enabled("cipher"); if (ret) - params.type = 0; + type = 0; /* Use the default numa parameters */ - params.numa_id = -1; - priv->setup.sched_param = &params; + if (priv->setup.sched_param != &priv->sched_param) + uadk_e_cipher_ctrl(ctx, 0, -1, NULL); + + para = (struct sched_params *)priv->setup.sched_param; + para->type = type; if (!priv->sess) { nid = EVP_CIPHER_CTX_nid(ctx); @@ -820,6 +839,7 @@ do { \ !EVP_CIPHER_meth_set_init(uadk_##name, uadk_e_cipher_init) || \ !EVP_CIPHER_meth_set_do_cipher(uadk_##name, uadk_e_do_cipher) || \ !EVP_CIPHER_meth_set_cleanup(uadk_##name, uadk_e_cipher_cleanup) || \ + !EVP_CIPHER_meth_set_ctrl(uadk_##name, uadk_e_cipher_ctrl) || \ !EVP_CIPHER_meth_set_set_asn1_params(uadk_##name, EVP_CIPHER_set_asn1_iv) || \ !EVP_CIPHER_meth_set_get_asn1_params(uadk_##name, EVP_CIPHER_get_asn1_iv)) \ return 0; \ -- 2.33.0

1 14

[PATCH 00/10] uadk patches sync
by Qi Tao 31 May '24

31 May '24

*** BLURB HERE *** Chenghai Huang (3): uadk/uadk_tool - merges two similar algorithm structures uadk - modify error report information of pool management functions uadk - modify the error report and error code Longfang Liu (1): uadk: update declaration of unsigned data types Qi Tao (1): uadk_tool: fix zip optype configuration error Weili Qian (1): uadk/v1: check queue status before sending doorbells Wenkai Lin (1): uadk/sec: fix for length limit of aead stream mode Zhiqi Song (3): uadk_tool/v1: bugfix hpre async send logic uadk/v1: cleanup put cookie operation uadk/isa_ce: cleanup header file Makefile.am | 1 - drv/hisi_sec.c | 123 +++++----- include/wd.h | 5 +- uadk_tool/benchmark/hpre_wd_benchmark.c | 56 +++-- uadk_tool/benchmark/uadk_benchmark.c | 276 ++++++++--------------- uadk_tool/benchmark/zip_uadk_benchmark.c | 4 +- v1/drv/hisi_hpre_udrv.c | 10 +- v1/drv/hisi_qm_udrv.c | 60 +++-- v1/drv/hisi_qm_udrv.h | 4 +- v1/wd.h | 4 +- v1/wd_comp.h | 4 - v1/wd_util.c | 4 +- v1/wd_util.h | 8 +- wd_aead.c | 10 +- wd_cipher.c | 2 +- wd_comp.c | 2 +- wd_digest.c | 2 +- wd_ecc.c | 2 +- wd_rsa.c | 2 +- 19 files changed, 266 insertions(+), 313 deletions(-) -- 2.33.0

1 10

2024/5/29 AccLIb SIG 双周例会 11:00 - 12:00
by openEuler conference 28 May '24

28 May '24

您好！ sig-AccLib 邀请您参加 2024-05-29 11:00 召开的Zoom会议会议主题：2024/5/29 AccLIb SIG 双周例会 11:00 - 12:00 会议内容： 2024/5/29 AccLIb SIG 双周例会 11:00 - 12:00 linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/86056520904?pwd=MRAnOgxfxkfUDoXsW7fB7Yg4FMctqO.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-05-29 11:00, The subject of the conference is 2024/5/29 AccLIb SIG 双周例会 11:00 - 12:00, Summary: 2024/5/29 AccLIb SIG 双周例会 11:00 - 12:00 linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/86056520904?pwd=MRAnOgxfxkfUDoXsW7fB7Yg4FMctqO.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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acclib例会
by openEuler conference 14 May '24

14 May '24

您好！ sig-AccLib 邀请您参加 2024-05-15 11:00 召开的Zoom会议会议主题：acclib例会会议链接：https://us06web.zoom.us/j/89929805835?pwd=T1VNyujE2w2pyWHbpBBgl5f2VvCrgq.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-05-15 11:00, The subject of the conference is acclib例会, You can join the meeting at https://us06web.zoom.us/j/89929805835?pwd=T1VNyujE2w2pyWHbpBBgl5f2VvCrgq.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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acclib 例会
by openEuler conference 17 Apr '24

17 Apr '24

您好！ sig-AccLib 邀请您参加 2024-04-17 11:00 召开的Zoom会议会议主题：acclib 例会会议链接：https://us06web.zoom.us/j/88188747788?pwd=IdrOPZUFwUKTmRE6aHTqbnEKSgyjbH.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-04-17 11:00, The subject of the conference is acclib 例会, You can join the meeting at https://us06web.zoom.us/j/88188747788?pwd=IdrOPZUFwUKTmRE6aHTqbnEKSgyjbH.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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[PATCH 0/5] uadk cleancode
by Qi Tao 15 Apr '24

15 Apr '24

*** BLURB HERE *** Hao Fang (3): uadk/drv: move hisi_qm_udrv.h to drv directory uadk/test: remove unused header file uadk/libapi: cleanup for some format alignment Wenkai Lin (2): uadk: v1: fix redundant head uadk: v1: remove dummy .gitignore | 1 - {include => drv}/hisi_qm_udrv.h | 0 test/hisi_zip_test/test_lib.c | 1 - test/hisi_zip_test/test_lib.h | 1 + v1/drv/dummy_drv.c | 174 -------------------------------- v1/drv/dummy_drv.h | 35 ------- v1/drv/hisi_hpre_udrv.c | 5 - v1/drv/hisi_qm_udrv.c | 4 - v1/drv/hisi_qm_udrv.h | 1 - v1/drv/hisi_sec_udrv.c | 5 - v1/drv/hisi_sec_udrv.h | 1 - v1/drv/hisi_zip_udrv.c | 1 - v1/internal/dummy_hw_usr_if.h | 57 ----------- v1/uacce.h | 1 - v1/wd.h | 1 + v1/wd_adapter.c | 1 - wd_aead.c | 8 +- wd_alg.c | 4 +- wd_cipher.c | 8 +- wd_dh.c | 2 +- wd_digest.c | 10 +- wd_ecc.c | 12 +-- wd_mempool.c | 20 ++-- wd_rsa.c | 36 +++---- wd_sched.c | 6 +- wd_util.c | 12 +-- 26 files changed, 61 insertions(+), 346 deletions(-) rename {include => drv}/hisi_qm_udrv.h (100%) delete mode 100644 v1/drv/dummy_drv.c delete mode 100644 v1/drv/dummy_drv.h delete mode 100644 v1/internal/dummy_hw_usr_if.h -- 2.33.0

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[PATCH 0/3] uadk: some bugfixes
by Qi Tao 03 Apr '24

03 Apr '24

*** BLURB HERE *** Weili Qian (2): ecc: check need_debug before calling WD_DEBUG uadk: remove unused ioctl cmd Wenkai Lin (1): uadk: v1: remove dummy Makefile.am | 1 - include/uacce.h | 1 - v1/internal/wd_dummy_usr_if.h | 45 ------------ v1/test/test_dummy.c | 126 ---------------------------------- v1/wd_adapter.c | 13 ---- wd_ecc.c | 8 ++- 6 files changed, 5 insertions(+), 189 deletions(-) delete mode 100644 v1/internal/wd_dummy_usr_if.h delete mode 100644 v1/test/test_dummy.c -- 2.33.0

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AccLib SIG 双周例会
by openEuler conference 02 Apr '24

02 Apr '24

您好！ sig-AccLib 邀请您参加 2024-04-03 11:00 召开的Zoom会议会议主题：AccLib SIG 双周例会会议内容：固定会议链接linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/81432955622?pwd=KbfGknjEcVt86ce0fxpyetjS59lqtg.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-04-03 11:00, The subject of the conference is AccLib SIG 双周例会, Summary: 固定会议链接linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/81432955622?pwd=KbfGknjEcVt86ce0fxpyetjS59lqtg.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

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[PATCH 00/11] sync uadk patches
by Qi Tao 29 Mar '24

29 Mar '24

*** BLURB HERE *** Longfang Liu (2): uadk/v1: improve the judgment conditions of tag uadk: modify uadk static compile Qi Tao (3): uadk: fix some cleancode issues uadk: delete useless codes. uadk: simplify repetitive codes Wenkai Lin (6): cipher: optimze input lengths check uadk/v1: fix for sec cipher bd1 ci_gen configuration uadk: fix for shmget shmflag sec: optimze for directly assigning values to structures util: optimize for wd_handle_msg_sync uadk: drv/hisi - optimize qm recv function drv/hisi_comp.c | 8 ++++ drv/hisi_hpre.c | 9 ++++ drv/hisi_qm_udrv.c | 45 ++++++++++--------- drv/hisi_sec.c | 63 +++++++++++--------------- drv/isa_ce_sm4.c | 96 ++++++++++++++++------------------------ include/wd_alg.h | 26 ++++++++--- include/wd_alg_common.h | 17 ++++--- uadk_tool/dfx/uadk_dfx.c | 2 +- v1/drv/hisi_hpre_udrv.c | 4 +- v1/drv/hisi_sec_udrv.c | 12 +++-- v1/wd.c | 3 +- v1/wd_rng.c | 4 +- wd_aead.c | 61 +++++++++++++++++-------- wd_alg.c | 25 ++++++++++- wd_cipher.c | 87 ++++++++++++++++++++++++++++-------- wd_comp.c | 63 +++++++++++++++++--------- wd_dh.c | 61 +++++++++++++++++-------- wd_digest.c | 63 ++++++++++++++++++-------- wd_ecc.c | 61 +++++++++++++++++-------- wd_rsa.c | 61 +++++++++++++++++-------- wd_util.c | 28 +++++++----- 21 files changed, 508 insertions(+), 291 deletions(-) -- 2.33.0

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[PATCH 0/4] uadk_engine: some cleanup
by Zhiqi Song 29 Mar '24

29 Mar '24

This series of patches are mainly used for cleanup. Zhiqi Song (4): uadk_engine: cleanup code style of async functions cipher: cleanup repeated function invoking digest: add ctx allocation check sm2: add ctx allocation check src/uadk_async.c | 126 ++++++++++++++++++++++------------------------ src/uadk_async.h | 3 ++ src/uadk_cipher.c | 7 ++- src/uadk_digest.c | 2 + src/uadk_sm2.c | 6 ++- 5 files changed, 74 insertions(+), 70 deletions(-) -- 2.33.0

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[PATCH 0/4] uadk: support sm3 and md5 multi-buffer calculation
by Weili Qian 23 Mar '24

23 Mar '24

Support sm3 and md5 multi-buffer calculation by SVE instructions. Weili Qian (4): uadk/wd_alg: check whether the platform supports SVE uadk/sched: fix async mode ctx id uadk: initializes ctx resources in SVE mode uadk/hash_mb: support multi-buffer calculation for sm3 and md5 Makefile.am | 15 +- drv/hash_mb/hash_mb.c | 860 ++++++++++++++++++++++++++++++++++ drv/hash_mb/hash_mb.h | 60 +++ drv/hash_mb/md5_mb_asimd_x1.S | 248 ++++++++++ drv/hash_mb/md5_mb_asimd_x4.S | 526 +++++++++++++++++++++ drv/hash_mb/md5_mb_sve.S | 158 +++++++ drv/hash_mb/md5_sve_common.S | 478 +++++++++++++++++++ drv/hash_mb/sm3_mb_asimd_x1.S | 387 +++++++++++++++ drv/hash_mb/sm3_mb_asimd_x4.S | 576 +++++++++++++++++++++++ drv/hash_mb/sm3_mb_sve.S | 161 +++++++ drv/hash_mb/sm3_sve_common.S | 505 ++++++++++++++++++++ include/wd_alg_common.h | 4 + wd_alg.c | 14 + wd_sched.c | 4 +- wd_util.c | 95 +++- 15 files changed, 4074 insertions(+), 17 deletions(-) create mode 100644 drv/hash_mb/hash_mb.c create mode 100644 drv/hash_mb/hash_mb.h create mode 100644 drv/hash_mb/md5_mb_asimd_x1.S create mode 100644 drv/hash_mb/md5_mb_asimd_x4.S create mode 100644 drv/hash_mb/md5_mb_sve.S create mode 100644 drv/hash_mb/md5_sve_common.S create mode 100644 drv/hash_mb/sm3_mb_asimd_x1.S create mode 100644 drv/hash_mb/sm3_mb_asimd_x4.S create mode 100644 drv/hash_mb/sm3_mb_sve.S create mode 100644 drv/hash_mb/sm3_sve_common.S -- 2.33.0

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申请增加sig-Acclib maintainer
by Zhangfei Gao 22 Mar '24

22 Mar '24

申请增加sig-Acclib maintainer Linaro: Zhangfei Gao 请大家review 2024/3/6 sig meeting minutes https://etherpad.openeuler.org/p/sig-AccLib-meetings 议题一： gitee sig 增加maintainer : Zhangfei Gao https://gitee.com/src-openeuler/libwd https://gitee.com/src-openeuler/uadk_engine Zhangfei Gao是 uadk in DPDK，uadk_engine (provider) for OpenSSL 的主要作者之一。目前在虚拟化场景下的uadk使用有持续跟踪。同时也是linux kernel uacce的维护者。需要统计数据 uadk$ git log --author="Zhangfei Gao" --pretty=oneline | wc -l 65 uadk_engine$ git log --author="Zhangfei Gao" --pretty=oneline | wc -l 82 src-openeuler/libwd$ git log --author="Zhangfei Gao" --pretty=oneline | wc -l 1 src-openeuler/uadk_engine$ git log --author="Zhangfei Gao" --pretty=oneline | wc -l 1 pr: https://gitee.com/openeuler/community/pulls/5495 Thanks

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[PATCH v2 0/8] ce instruction for SM4
by Qi Tao 20 Mar '24

20 Mar '24

*** BLURB HERE *** Qi Tao (2): cipher: add support for SM4(ECB) algorithm in CE instruction cipher: fix sm4 ce code defect Wenkai Lin (2): cipher: add support for SM4 CBC and CTR modes in CE instruction uadk: fix calloc zero size problem Yang Shen (3): uadk/cipher: isa_ce - support SM4 cbc_cts mode uadk/cipher: isa_ce - fix memcpy overwrite uadk/cipher: isa - fix code style Yuzeng Zhuang (1): cipher: add support for SM4 CFB and XTS modes in CE instruction Makefile.am | 5 +- drv/isa_ce_sm4.c | 472 +++++++++ drv/isa_ce_sm4.h | 62 ++ drv/isa_ce_sm4_armv8.S | 2296 ++++++++++++++++++++++++++++++++++++++++ wd_cipher.c | 4 +- 5 files changed, 2835 insertions(+), 4 deletions(-) create mode 100644 drv/isa_ce_sm4.c create mode 100644 drv/isa_ce_sm4.h create mode 100644 drv/isa_ce_sm4_armv8.S -- 2.33.0

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[PATCH 8/8] uadk/cipher: isa - fix code style
by Qi Tao 19 Mar '24

19 Mar '24

From: Yang Shen <shenyang39(a)huawei.com> Code the cbc_cts mode as openssl code style. Signed-off-by: Yang Shen <shenyang39(a)huawei.com> --- drv/isa_ce_sm4_armv8.S | 201 +++++++++++++++++++---------------------- 1 file changed, 94 insertions(+), 107 deletions(-) diff --git a/drv/isa_ce_sm4_armv8.S b/drv/isa_ce_sm4_armv8.S index 2f9477a..6ebf39b 100644 --- a/drv/isa_ce_sm4_armv8.S +++ b/drv/isa_ce_sm4_armv8.S @@ -24,11 +24,6 @@ .inst 0xce60c800 | (.L\vm << 16) | (.L\vn << 5) | .L\vd .endm -.macro adr_l, dst, sym - adrp \dst, \sym - add \dst, \dst, :lo12:\sym -.endm - .text .align 6 .Lck: @@ -517,63 +512,62 @@ sm4_v8_cbc_encrypt: .align 5 sm4_v8_cbc_cts_encrypt: AARCH64_VALID_CALL_TARGET - ld1 {v24.16b-v27.16b}, [x3], #64; - ld1 {v28.16b-v31.16b}, [x3]; - - sub x5, x2, #16 - - ld1 {v20.16b}, [x4] - - ld1 {v0.16b}, [x0] - eor v20.16b, v20.16b, v0.16b - rev32 v20.16b, v20.16b; - sm4e v20.4s, v24.4s; - sm4e v20.4s, v25.4s; - sm4e v20.4s, v26.4s; - sm4e v20.4s, v27.4s; - sm4e v20.4s, v28.4s; - sm4e v20.4s, v29.4s; - sm4e v20.4s, v30.4s; - sm4e v20.4s, v31.4s; - rev64 v20.4s, v20.4s; - ext v20.16b, v20.16b, v20.16b, #8; - rev32 v20.16b, v20.16b; + ld1 {v0.4s,v1.4s,v2.4s,v3.4s}, [x3], #64 + ld1 {v4.4s,v5.4s,v6.4s,v7.4s}, [x3] + sub x5, x2, #16 + + ld1 {v8.4s}, [x4] + + ld1 {v10.4s}, [x0] + eor v8.16b, v8.16b, v10.16b + rev32 v8.16b, v8.16b; + sm4e v8.4s, v0.4s; + sm4e v8.4s, v1.4s; + sm4e v8.4s, v2.4s; + sm4e v8.4s, v3.4s; + sm4e v8.4s, v4.4s; + sm4e v8.4s, v5.4s; + sm4e v8.4s, v6.4s; + sm4e v8.4s, v7.4s; + rev64 v8.4s, v8.4s; + ext v8.16b, v8.16b, v8.16b, #8; + rev32 v8.16b, v8.16b; /* load permute table */ - adr x6, .Lcts_permute_table - add x7, x6, #32 - add x6, x6, x5 - sub x7, x7, x5 - ld1 {v3.16b}, [x6] - ld1 {v4.16b}, [x7] + adr x6, .cts_permute_table + add x7, x6, #32 + add x6, x6, x5 + sub x7, x7, x5 + ld1 {v13.4s}, [x6] + ld1 {v14.4s}, [x7] /* overlapping loads */ - add x0, x0, x5 - ld1 {v1.16b}, [x0] + add x0, x0, x5 + ld1 {v11.4s}, [x0] /* create Cn from En-1 */ - tbl v0.16b, {v20.16b}, v3.16b + tbl v10.16b, {v8.16b}, v13.16b /* padding Pn with zeros */ - tbl v1.16b, {v1.16b}, v4.16b - - eor v1.16b, v1.16b, v20.16b - rev32 v1.16b, v1.16b; - sm4e v1.4s, v24.4s; - sm4e v1.4s, v25.4s; - sm4e v1.4s, v26.4s; - sm4e v1.4s, v27.4s; - sm4e v1.4s, v28.4s; - sm4e v1.4s, v29.4s; - sm4e v1.4s, v30.4s; - sm4e v1.4s, v31.4s; - rev64 v1.4s, v1.4s; - ext v1.16b, v1.16b, v1.16b, #8; - rev32 v1.16b, v1.16b; + tbl v11.16b, {v11.16b}, v14.16b + + eor v11.16b, v11.16b, v8.16b + rev32 v11.16b, v11.16b; + sm4e v11.4s, v0.4s; + sm4e v11.4s, v1.4s; + sm4e v11.4s, v2.4s; + sm4e v11.4s, v3.4s; + sm4e v11.4s, v4.4s; + sm4e v11.4s, v5.4s; + sm4e v11.4s, v6.4s; + sm4e v11.4s, v7.4s; + rev64 v11.4s, v11.4s; + ext v11.16b, v11.16b, v11.16b, #8; + rev32 v11.16b, v11.16b; /* overlapping stores */ - add x5, x1, x5 - st1 {v0.16b}, [x5] - st1 {v1.16b}, [x1] + add x5, x1, x5 + st1 {v10.16b}, [x5] + st1 {v11.16b}, [x1] ret .size sm4_v8_cbc_cts_encrypt,.-sm4_v8_cbc_cts_encrypt @@ -582,76 +576,69 @@ sm4_v8_cbc_cts_encrypt: .type sm4_v8_cbc_cts_decrypt,%function .align 5 sm4_v8_cbc_cts_decrypt: - ld1 {v24.16b-v27.16b}, [x3], #64; - ld1 {v28.16b-v31.16b}, [x3]; + AARCH64_VALID_CALL_TARGET + ld1 {v0.4s,v1.4s,v2.4s,v3.4s}, [x3], #64 + ld1 {v4.4s,v5.4s,v6.4s,v7.4s}, [x3] - sub x5, x2, #16 + sub x5, x2, #16 - ld1 {v20.16b}, [x4] + ld1 {v8.4s}, [x4] /* load permute table */ - adr_l x6, .Lcts_permute_table - add x7, x6, #32 - add x6, x6, x5 - sub x7, x7, x5 - ld1 {v3.16b}, [x6] - ld1 {v4.16b}, [x7] + adr x6, .cts_permute_table + add x7, x6, #32 + add x6, x6, x5 + sub x7, x7, x5 + ld1 {v13.4s}, [x6] + ld1 {v14.4s}, [x7] /* overlapping loads */ - ld1 {v0.16b}, [x0], x5 - ld1 {v1.16b}, [x0] - - rev32 v0.16b, v0.16b; - sm4e v0.4s, v24.4s; - sm4e v0.4s, v25.4s; - sm4e v0.4s, v26.4s; - sm4e v0.4s, v27.4s; - sm4e v0.4s, v28.4s; - sm4e v0.4s, v29.4s; - sm4e v0.4s, v30.4s; - sm4e v0.4s, v31.4s; - rev64 v0.4s, v0.4s; - ext v0.16b, v0.16b, v0.16b, #8; - rev32 v0.16b, v0.16b; + ld1 {v10.16b}, [x0], x5 + ld1 {v11.16b}, [x0] + + rev32 v10.16b, v10.16b; + sm4e v10.4s, v0.4s; + sm4e v10.4s, v1.4s; + sm4e v10.4s, v2.4s; + sm4e v10.4s, v3.4s; + sm4e v10.4s, v4.4s; + sm4e v10.4s, v5.4s; + sm4e v10.4s, v6.4s; + sm4e v10.4s, v7.4s; + rev64 v10.4s, v10.4s; + ext v10.16b, v10.16b, v10.16b, #8; + rev32 v10.16b, v10.16b; /* select the first Ln bytes of Xn to create Pn */ - tbl v2.16b, {v0.16b}, v3.16b - eor v2.16b, v2.16b, v1.16b + tbl v12.16b, {v10.16b}, v13.16b + eor v12.16b, v12.16b, v11.16b /* overwrite the first Ln bytes with Cn to create En-1 */ - tbx v0.16b, {v1.16b}, v4.16b - - rev32 v0.16b, v0.16b; - sm4e v0.4s, v24.4s; - sm4e v0.4s, v25.4s; - sm4e v0.4s, v26.4s; - sm4e v0.4s, v27.4s; - sm4e v0.4s, v28.4s; - sm4e v0.4s, v29.4s; - sm4e v0.4s, v30.4s; - sm4e v0.4s, v31.4s; - rev64 v0.4s, v0.4s; - ext v0.16b, v0.16b, v0.16b, #8; - rev32 v0.16b, v0.16b; - - eor v0.16b, v0.16b, v20.16b + tbx v10.16b, {v11.16b}, v14.16b + + rev32 v10.16b, v10.16b; + sm4e v10.4s, v0.4s; + sm4e v10.4s, v1.4s; + sm4e v10.4s, v2.4s; + sm4e v10.4s, v3.4s; + sm4e v10.4s, v4.4s; + sm4e v10.4s, v5.4s; + sm4e v10.4s, v6.4s; + sm4e v10.4s, v7.4s; + rev64 v10.4s, v10.4s; + ext v10.16b, v10.16b, v10.16b, #8; + rev32 v10.16b, v10.16b; + + eor v10.16b, v10.16b, v8.16b /* overlapping stores */ - add x5, x1, x5 - st1 {v2.16b}, [x5] - st1 {v0.16b}, [x1] + add x5, x1, x5 + st1 {v12.16b}, [x5] + st1 {v10.16b}, [x1] ret .size sm4_v8_cbc_cts_decrypt,.-sm4_v8_cbc_cts_decrypt -.Lcts_permute_table: - .byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff - .byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff - .byte 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 - .byte 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf - .byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff - .byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff - .globl sm4_v8_ecb_encrypt .type sm4_v8_ecb_encrypt,%function .align 5 -- 2.33.0

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[PATCH 0/8] add support for CE instruction
by Qi Tao 19 Mar '24

19 Mar '24

*** BLURB HERE *** Qi Tao (2): cipher: add support for SM4(ECB) algorithm in CE instruction cipher: fix sm4 ce code defect Wenkai Lin (2): cipher: add support for SM4 CBC and CTR modes in CE instruction uadk: fix calloc zero size problem Yang Shen (3): uadk/cipher: isa_ce - support SM4 cbc_cts mode uadk/cipher: isa_ce - fix memcpy overwrite uadk/cipher: isa - fix code style Yuzeng Zhuang (1): cipher: add support for SM4 CFB and XTS modes in CE instruction Makefile.am | 5 +- drv/isa_ce_sm4.c | 473 +++++++++ drv/isa_ce_sm4.h | 62 ++ drv/isa_ce_sm4_armv8.S | 2296 ++++++++++++++++++++++++++++++++++++++++ wd_cipher.c | 4 +- wd_util.c | 5 + 6 files changed, 2841 insertions(+), 4 deletions(-) create mode 100644 drv/isa_ce_sm4.c create mode 100644 drv/isa_ce_sm4.h create mode 100644 drv/isa_ce_sm4_armv8.S -- 2.33.0

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[PATCH 1/2] uadk/digest: modify spelling errors
by Zhiqi Song 15 Mar '24

15 Mar '24

Modify spelling errors related to digest stream mode. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- drv/hash_mb/hash_mb.c | 4 ++-- drv/hisi_sec.c | 8 ++++---- drv/isa_ce_sm3.c | 4 ++-- include/drv/wd_digest_drv.h | 6 +++--- v1/test/hisi_sec_test/test_hisi_sec.c | 4 ++-- v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c | 4 ++-- wd_digest.c | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drv/hash_mb/hash_mb.c b/drv/hash_mb/hash_mb.c index 0f27c11..4750062 100644 --- a/drv/hash_mb/hash_mb.c +++ b/drv/hash_mb/hash_mb.c @@ -406,7 +406,7 @@ static int hash_do_partial(struct hash_mb_poll_queue *poll_queue, int ret = WD_SUCCESS; switch (bd_type) { - case HASH_FRIST_BLOCK: + case HASH_FIRST_BLOCK: ret = hash_first_block_process(d_msg, job, poll_queue->ops->iv_bytes); break; case HASH_MIDDLE_BLOCK: @@ -434,7 +434,7 @@ static void hash_mb_init_iv(struct hash_mb_poll_queue *poll_queue, job->opad.opad_size = 0; switch (bd_type) { - case HASH_FRIST_BLOCK: + case HASH_FIRST_BLOCK: memcpy(job->result_digest, poll_queue->ops->iv_data, poll_queue->ops->iv_bytes); if (d_msg->mode != WD_DIGEST_HMAC) return; diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 2eaac51..e66fb00 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -1536,7 +1536,7 @@ static int fill_digest_long_hash(handle_t h_qp, struct wd_digest_msg *msg, if (ret) return ret; - if (block_type == HASH_FRIST_BLOCK) { + if (block_type == HASH_FIRST_BLOCK) { /* Long hash first */ sqe->ai_apd_cs = AI_GEN_INNER; sqe->ai_apd_cs |= AUTHPAD_NOPAD << AUTHPAD_OFFSET; @@ -1618,7 +1618,7 @@ static int digest_bd2_type_check(struct wd_digest_msg *msg) enum hash_block_type type = get_hash_block_type(msg); /* Long hash first and middle bd */ - if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) { + if (type == HASH_FIRST_BLOCK || type == HASH_MIDDLE_BLOCK) { WD_ERR("hardware v2 not supports 0 size in long hash!\n"); return -WD_EINVAL; } @@ -1636,7 +1636,7 @@ static int digest_bd3_type_check(struct wd_digest_msg *msg) { enum hash_block_type type = get_hash_block_type(msg); /* Long hash first and middle bd */ - if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) { + if (type == HASH_FIRST_BLOCK || type == HASH_MIDDLE_BLOCK) { WD_ERR("invalid: hardware v3 not supports 0 size in long hash!\n"); return -WD_EINVAL; } @@ -1889,7 +1889,7 @@ static int fill_digest_long_hash3(handle_t h_qp, struct wd_digest_msg *msg, if (ret) return ret; - if (block_type == HASH_FRIST_BLOCK) { + if (block_type == HASH_FIRST_BLOCK) { /* Long hash first */ sqe->auth_mac_key |= AI_GEN_INNER << SEC_AI_GEN_OFFSET_V3; sqe->stream_scene.stream_auth_pad = AUTHPAD_NOPAD; diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c index 2789a08..5fc7acc 100644 --- a/drv/isa_ce_sm3.c +++ b/drv/isa_ce_sm3.c @@ -188,7 +188,7 @@ static int do_sm3_ce(struct wd_digest_msg *msg, __u8 *out_digest) sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress); sm3_ce_final(&sctx, out_digest, sm3_ce_block_compress); break; - case HASH_FRIST_BLOCK: + case HASH_FIRST_BLOCK: sm3_ce_init(&sctx); sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress); trans_output_result(out_digest, sctx.word_reg); @@ -306,7 +306,7 @@ static int do_hmac_sm3_ce(struct wd_digest_msg *msg, __u8 *out_hmac) sm3_ce_hmac_update(&hctx, data, data_len); sm3_ce_hmac_final(&hctx, out_hmac); break; - case HASH_FRIST_BLOCK: + case HASH_FIRST_BLOCK: sm3_ce_hmac_init(&hctx, key, key_len); sm3_ce_hmac_update(&hctx, data, data_len); trans_output_result(out_hmac, hctx.sctx.word_reg); diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h index 7d86b65..5e3e821 100644 --- a/include/drv/wd_digest_drv.h +++ b/include/drv/wd_digest_drv.h @@ -12,7 +12,7 @@ extern "C" { #endif enum hash_block_type { - HASH_FRIST_BLOCK, + HASH_FIRST_BLOCK, HASH_MIDDLE_BLOCK, HASH_END_BLOCK, HASH_SINGLE_BLOCK, @@ -66,13 +66,13 @@ static inline enum hash_block_type get_hash_block_type(struct wd_digest_msg *msg { /* * [has_next , iv_bytes] - * [ 1 , 0 ] = long hash(frist bd) + * [ 1 , 0 ] = long hash(first bd) * [ 1 , 1 ] = long hash(middle bd) * [ 0 , 1 ] = long hash(end bd) * [ 0 , 0 ] = block hash(single bd) */ if (msg->has_next && !msg->iv_bytes) - return HASH_FRIST_BLOCK; + return HASH_FIRST_BLOCK; else if (msg->has_next && msg->iv_bytes) return HASH_MIDDLE_BLOCK; else if (!msg->has_next && msg->iv_bytes) diff --git a/v1/test/hisi_sec_test/test_hisi_sec.c b/v1/test/hisi_sec_test/test_hisi_sec.c index be4ee9d..05c91ad 100644 --- a/v1/test/hisi_sec_test/test_hisi_sec.c +++ b/v1/test/hisi_sec_test/test_hisi_sec.c @@ -1463,7 +1463,7 @@ static int sec_cipher_async_test(int thread_num, __u64 lcore_mask, SEC_TST_PRT("%s(): create pool fail!\n", __func__); return -ENOMEM; } - /* frist create the async poll thread! */ + /* first create the async poll thread! */ test_thrds_data[0].pool = pool; test_thrds_data[0].q = &q; test_thrds_data[0].thread_num = 1; @@ -2070,7 +2070,7 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask, SEC_TST_PRT("%s(): create pool fail!\n", __func__); return -ENOMEM; } - /* frist create the async poll thread! */ + /* first create the async poll thread! */ test_thrds_data[0].pool = pool; test_thrds_data[0].q = &q; test_thrds_data[0].thread_num = 1; diff --git a/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c b/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c index b7513d1..ba5cdfa 100644 --- a/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c +++ b/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c @@ -1733,7 +1733,7 @@ static int sec_cipher_async_test(int thread_num, __u64 lcore_mask, SEC_TST_PRT("%s(): create pool fail!\n", __func__); return -ENOMEM; } - /* frist create the async poll thread! */ + /* first create the async poll thread! */ test_thrds_data[0].pool = pool; test_thrds_data[0].q = &q; test_thrds_data[0].thread_num = 1; @@ -2640,7 +2640,7 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask, return -ENOMEM; } - /* frist create the async poll thread! */ + /* first create the async poll thread! */ test_thrds_data[0].pool = pool; test_thrds_data[0].q = &q; test_thrds_data[0].thread_num = 1; diff --git a/wd_digest.c b/wd_digest.c index dfe709b..4832de8 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -55,7 +55,7 @@ struct wd_digest_stream_data { /* Total data length for stream mode */ __u64 long_data_len; /* - * Notify the stream message state, zero is frist message, + * Notify the stream message state, zero is first message, * non-zero is middle or final message. */ int msg_state; -- 2.30.0

1 0

[PATCH 0/4] Support sm3 ce instruction
by Zhiqi Song 12 Mar '24

12 Mar '24

1. Support sync sm3 ce instruction. 2. Some cleanup and bugfix. Zhiqi Song (4): uadk: remove redundant header file in makefile uadk/isa-ce: support sm3 ce instruction uadk: fix control range of environmemt variable uadk/util: use default sched_type for instruction task Makefile.am | 20 +- configure.ac | 3 + drv/isa_ce_sm3.c | 401 ++++++++++++++++++++ drv/isa_ce_sm3.h | 86 +++++ drv/isa_ce_sm3_armv8.S | 765 ++++++++++++++++++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++++++ include/wd_alg.h | 43 +++ include/wd_sched.h | 2 +- wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 92 ++++- 12 files changed, 1619 insertions(+), 28 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3.h create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h -- 2.33.0

1 4

[PATCH] uadk: add zlibwrapper test
by Wenkai Lin 11 Mar '24

11 Mar '24

add zlibwrapper sample test Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- test/zlibwrapper.c | 410 +++++++++++++++++++++++++++++++++++++++++++++ test/zlibwrapper.h | 15 ++ 2 files changed, 425 insertions(+) create mode 100644 test/zlibwrapper.c create mode 100644 test/zlibwrapper.h diff --git a/test/zlibwrapper.c b/test/zlibwrapper.c new file mode 100644 index 0000000..20c053f --- /dev/null +++ b/test/zlibwrapper.c @@ -0,0 +1,410 @@ +#include "acc_v2_common.h" +#include "acc_v2_util.h" +#include <assert.h> + +#define RESERVE_MM 1024 +#define SIZE_1K 1024 + +static int stream_chunk = 1024 * 128; + +struct create_comp_data { + int threadid; + long long loop; + int numa_id; + bool sync; + bool use_env; + char *infile; + char *outfile; + char *alg; + enum wd_comp_op_type op; + acc_source_mode src_type; + acc_mem_mode mem_type; + comp_check_type check_type; + + size_t input_size; + size_t output_size; + int count; + int thread_num; + int cmode; + int win_sz; + int win_bs; + int comp_lv; + int debug; + int result; + struct v2_setup_util *util; + handle_t mp, bp; + bool perf_flag; + unsigned long perf; + double ops; +}; + +static int test_uadk_zlib_deflate(z_stream *zstrmp, void *src, size_t src_len, void *dest, + size_t *dst_len, int level, int windowbits) +{ + __u32 chunk = stream_chunk; + z_stream zstrm = {0}; + int ret, flush, have; + + if (zstrmp == NULL) { + zstrmp = &zstrm; + } + ret = wd_deflate_init(&zstrm, level, windowbits); + if (ret) { + LOG(ERR, "fail to init deflate.\n"); + return ret; + } + + zstrm.next_in = src; + do { + if (src_len > chunk) { + zstrm.avail_in = chunk; + src_len -= chunk; + } else { + zstrm.avail_in = src_len; + src_len = 0; + } + + flush = src_len ? Z_SYNC_FLUSH : Z_FINISH; + + /* + * Run wd_deflate() on input until output buffer not full, + * finish compression if all of source has been read in. + */ + do { + zstrm.avail_out = chunk; + zstrm.next_out = dest; + ret = wd_deflate(&zstrm, flush); + if (ret < 0) { + LOG(ERR, "Error: wd_deflate fail, ret = %d", ret); + return ret; + } + have = chunk - zstrm.avail_out; + dest += have; + } while (zstrm.avail_in > 0); + + /* done when last data in file processed */ + } while (flush != Z_FINISH); + + LOG(DBG, "zstrm.total_out is %lld\n", zstrm.total_out); + *dst_len = zstrm.total_out; + + (void)wd_deflate_end(&zstrm); + if (ret != Z_STREAM_END) { + ret = Z_ERRNO; + } else { + ret = Z_OK; + } + return ret; +} + +static int test_uadk_zlib_inflate(z_stream *zstrmp, void *src, size_t src_len, void *dest, + size_t *dst_len, int windowbits) +{ + __u32 chunk = stream_chunk; + z_stream zstrm = {0}; + int ret, have; + + if (zstrmp == NULL) { + zstrmp = &zstrm; + } + ret = wd_inflate_init(&zstrm, windowbits); + if (ret) { + LOG(ERR, "fail to init inflate.\n"); + return ret; + } + + zstrm.next_in = src; + do { + if (src_len > chunk) { + zstrm.avail_in = chunk; + src_len -= chunk; + } else { + zstrm.avail_in = src_len; + src_len = 0; + } + /* + * Run wd_deflate() on input until output buffer not full, + * finish compression if all of source has been read in. + */ + do { + zstrm.avail_out = chunk; + zstrm.next_out = dest; + ret = wd_inflate(&zstrm, Z_SYNC_FLUSH); + if (ret < 0) { + LOG(ERR, "Error: wd_deflate fail, ret = %d", ret); + return ret; + } + have = chunk - zstrm.avail_out; + dest += have; + } while (zstrm.avail_in > 0); + + /* done when last data in file processed */ + } while (ret != Z_STREAM_END); + + LOG(DBG, "zstrm.total_out is %lld\n", zstrm.total_out); + *dst_len = zstrm.total_out; + + (void)wd_inflate_end(&zstrm); + if (ret != Z_STREAM_END) { + ret = Z_ERRNO; + } else { + ret = Z_OK; + } + return ret; +} + +/* report a zlib or i/o error */ +static void zerr(int ret) +{ +} + +static int zlibwrapper_data_process(struct create_comp_data *data) +{ + z_stream zstrm = {0}, *zstrmp; + struct timeval begin_tval; + struct timeval end_tval; + unsigned long Perf = 0; + size_t output_size = 0; + size_t input_size = 0; + int cnt = data->count; + double time_used = 0; + char *output = NULL; + char *input = NULL; + double speed = 0; + double ops = 0; + int ret = AGF; + + input_size = data->input_size; + ret = v2_key_from_random(2, &input, input_size); + if (ret) { + LOG(ERR, "Error: generate_key_from_random failed!\n"); + ret = RSF; + goto err; + } + + if (data->op == WD_DIR_COMPRESS) { + output_size = (input_size * COMPRESS_TIMES) + RESERVE_MM; + } else { + output_size = (input_size * DECOMPRESS_TIMES) + RESERVE_MM; + } + output = malloc(output_size); + if (output == NULL) { + LOG(ERR, "Error: output malloc failed!\n"); + ret = RSF; + goto err; + } + memset(output, 0, output_size); + data->input_size = input_size; + data->output_size = output_size; + gettimeofday(&begin_tval, NULL); + + if (data->use_env) { + zstrmp = &zstrm; + if (data->threadid == 0) { + data->win_bs = ZLIB_MAX_WBITS; + } else if (data->threadid == 1) { + data->win_bs = GZIP_MAX_WBITS; + } else { + data->win_bs = DEFLATE_MAX_WBITS; + } + } else { + zstrmp = NULL; + } + if (data->loop > 0) { + LOG(NTC, "Notice: Start comp loop test.\n"); + while (1) { + if (data->op == WD_DIR_COMPRESS) { + ret = test_uadk_zlib_deflate(zstrmp, input, input_size, output, + &output_size, data->comp_lv, data->win_bs); + } else { + ret = test_uadk_zlib_inflate(zstrmp, input, input_size, output, &output_size, data->win_bs); + } + if (ret != Z_OK) { + zerr(ret); + return ret; + } + cnt++; + if (data->loop > 0) { + gettimeofday(&end_tval, NULL); + time_used = (double)((end_tval.tv_sec - begin_tval.tv_sec) * S_TO_US_TIME + + end_tval.tv_usec - begin_tval.tv_usec); + if (time_used >= data->loop * S_TO_US_TIME) + break; + } + } + } + while (data->count--) { + if (data->op == WD_DIR_COMPRESS) { + ret = test_uadk_zlib_deflate(zstrmp, input, input_size, output, &output_size, data->comp_lv, data->win_bs); + } else { + ret = test_uadk_zlib_inflate(zstrmp, input, input_size, output, &output_size, data->win_bs); + } + if (ret != Z_OK) { + zerr(ret); + return ret; + } + } +err: + data->result = ret; + if (input) { + free(input); + } + if (output) { + free(output); + } + return ret; +} + +static int zlibwrapper_setup(struct create_comp_data *data) +{ + int thread_num = data->thread_num; + unsigned long total_perf = 0; + int i = 0, start_thread = 0; + int debug = data->debug; + double total_ops = 0; + int ret = RSF; + + if (0 == thread_num) { + data->threadid = -1; + data->sync = true; + data->result = 0; + ret = zlibwrapper_data_process(data); + if (0 != ret) { + LOG(ERR, "Error: single process comp compute test failed, ret = %d \n", ret); + return ret; + } + total_perf = data->perf; + total_ops = data->ops; + } else { + LOG(INF, "Info: do multiple threads comp compute test. \n"); + struct create_comp_data thread_data[thread_num]; + pthread_t thread_process[thread_num]; + + for (i = start_thread; i < thread_num; i++) { + memcpy(&thread_data[i], data, sizeof(struct create_comp_data)); + thread_data[i].threadid = i; + thread_data[i].result = 0; + thread_data[i].debug = debug; + ret = pthread_create(&thread_process[i], NULL, (void *)zlibwrapper_data_process, (void *)&thread_data[i]); + if (ret) { + LOG(ERR, "Error: create data process thread failed, ret = %d \n", ret); + ret = THF; + return ret; + } + } + for (i = 0; i < thread_num; i++) { + ret = pthread_join(thread_process[i], NULL); + if (ret) { + LOG(ERR, "Error: join thread[%d] failed, return ret => %d \n", i, ret); + ret = THF; + return ret; + } + } + for (i = start_thread; i < thread_num; i++) { + total_perf += thread_data[i].perf; + total_ops += thread_data[i].ops; + if (0 != thread_data[i].result) { + LOG(ERR, "Error: thread[%d] run failed, return ret => %d \n", i, thread_data[i].result); + ret = THF; + return ret; + } + } + } + PRINTF_PERF(data->alg, thread_num, data->loop, total_perf, total_ops); + + return ret; +} + +int wd_zlibwrapper_test(void *param) +{ + struct acc_v2_common_param *g_acc_param = (struct acc_v2_common_param *)param; + char *infile = g_acc_param->comm_param.infile; + char a[10], b[10], c[10], d[10]; + char fileName[FILE_NAME_LEN]; + struct create_comp_data data; + size_t input_size = 0; + char *src = NULL; + int ret = AGF; + + memset(&data, 0, sizeof(struct create_comp_data)); + + data.comp_lv = WD_COMP_L8; + if (sscanf(g_acc_param->comm_param.alg_mode, "%[^-]-%[^-]-%[^-]-%s", a, b, c, d) == 4) + data.comp_lv = atoi(d); + else if (sscanf(g_acc_param->comm_param.alg_mode, "%[^-]-%[^-]-%s", a, b, c) != 3) { + LOG(ERR, "Error: comp alg_mode invalid \n"); + return AGF; + } + + if (!strcmp(a, "compress")) { + data.op = WD_DIR_COMPRESS; + } else if (!strcmp(a, "decompress")) { + data.op = WD_DIR_DECOMPRESS; + } else { + LOG(ERR, "Error: comp op is compress or decompress ? \n"); + return AGF; + } + if (!strcmp(b, "stream")) + data.cmode = 0; + else if (!strcmp(b, "block")) + LOG(ERR, "Error: zlibwrapper not support block\n"); + else { + LOG(ERR, "Error: comp mode is stream or block ? \n"); + return AGF; + } + + if (data.cmode == 0 && g_acc_param->comm_param.async) { + LOG(ERR, "Error: stream mode is not support async\n"); + return AGF; + } + if (strcmp(c, "4K") == 0) + data.win_sz = WD_COMP_WS_4K; + else if (strcmp(c, "8K") == 0) + data.win_sz = WD_COMP_WS_8K; + else if (strcmp(c, "16K") == 0) + data.win_sz = WD_COMP_WS_16K; + else if (strcmp(c, "24K") == 0) + data.win_sz = WD_COMP_WS_24K; + else if (strcmp(c, "32K") == 0) + data.win_sz = WD_COMP_WS_32K; + else { + LOG(ERR, "Error: windows size?\n"); + return AGF; + } + if (g_acc_param->comm_param.src_mode == SRC_RANDOM) { + if (sscanf(g_acc_param->comm_param.alg_key_size, "%ld", &input_size) != 1) { + LOG(ERR, "Error: comp size format invalid \n"); + return AGF; + } + } else { + LOG(ERR, "Error: comp not support do-openssl\n"); + return AGF; + } + data.input_size = input_size; + LOG (INF, "Info: input_size: %ld\n", data.input_size); + + { + data.alg = g_acc_param->comm_param.alg_name; + data.sync = !g_acc_param->comm_param.async; + data.loop = g_acc_param->comm_param.loop; + data.src_type = g_acc_param->comm_param.src_mode; + data.mem_type = g_acc_param->mem_mode; + data.use_env = g_acc_param->use_env; + data.numa_id = g_acc_param->numa_id; + data.count = g_acc_param->comm_param.count; + data.infile = g_acc_param->comm_param.infile; + data.outfile = g_acc_param->comm_param.outfile; + data.thread_num = g_acc_param->comm_param.thread_num; + data.perf_flag = g_acc_param->comm_param.perf_flag; + data.win_bs = g_acc_param->windowbits; + data.debug = log_lvl; + } + + if (data.use_env) { + data.thread_num = 3; + } + + ret = zlibwrapper_setup(&data); + + return ret; +} diff --git a/test/zlibwrapper.h b/test/zlibwrapper.h new file mode 100644 index 0000000..33395b1 --- /dev/null +++ b/test/zlibwrapper.h @@ -0,0 +1,15 @@ +#ifndef KP_TOOLS_ZLIBWRAPPER_H +#define KP_TOOLS_ZLIBWRAPPER_H + +#include "wd_zlibwrapper.h" + +#define Z_NULL 0 /* for initializing zalloc, zfree, opaque */ +#define FILE_NAME_LEN 500 +#define TOOLS_NAME_LEN 50 +#define ZLIB_MAX_WBITS 15 +#define GZIP_MAX_WBITS 31 +#define DEFLATE_MAX_WBITS -15 + +int wd_zlibwrapper_test(void *param); + +#endif -- 2.33.0

1 0

[PATCH 0/4] Support sm3 ce instruction
by Zhiqi Song 11 Mar '24

11 Mar '24

1. Support sync sm3 ce instruction. 2. Some cleanup and bugfix. Zhiqi Song (4): uadk: remove redundant header file in makefile uadk/isa-ce: support sm3 ce instruction uadk: fix control range of environmemt variable uadk/util: use default sched_type for instruction task Makefile.am | 20 +- configure.ac | 3 + drv/isa_ce_sm3.c | 401 ++++++++++++++++++++ drv/isa_ce_sm3.h | 86 +++++ drv/isa_ce_sm3_armv8.S | 765 ++++++++++++++++++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++++++ include/wd_alg.h | 43 +++ include/wd_sched.h | 2 +- wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 92 ++++- 12 files changed, 1619 insertions(+), 28 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3.h create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h -- 2.33.0

1 4

[PATCH 00/11] sync uadk_tool patch to linaro
by Qi Tao 11 Mar '24

11 Mar '24

*** BLURB HERE *** Chenghai Huang (3): uadk tool: fix the logic for counting retransmissions when busy uadk/tools - support the nosva test of a specified device uadk tool: fix the msg pool release bug of async zip benchmark Longfang Liu (1): uadk_tool: fix aead performance test issue Qi Tao (4): uadk_tool: support sm4 ce benchmark test uadk_tool: modify the description of the zip and sec uadk_tool: fix switch-case statement error uadk_tool: fix queue application failure from multiple devices Weili Qian (1): uadk_tool: support sm3/md5 multibuff benchmark test Yang Shen (1): uadk/tools - support designated device testing Zhiqi Song (1): uadk_tool: support sm3 ce benchmark and function test uadk_tool/Makefile.am | 1 + uadk_tool/benchmark/hpre_uadk_benchmark.c | 151 ++++++++-- uadk_tool/benchmark/hpre_wd_benchmark.c | 8 + uadk_tool/benchmark/sec_uadk_benchmark.c | 211 ++++++++++++-- uadk_tool/benchmark/sec_wd_benchmark.c | 26 ++ uadk_tool/benchmark/trng_wd_benchmark.c | 8 + uadk_tool/benchmark/uadk_benchmark.c | 125 +++++--- uadk_tool/benchmark/uadk_benchmark.h | 42 +-- uadk_tool/benchmark/zip_uadk_benchmark.c | 335 +++++++++++++++------- uadk_tool/benchmark/zip_wd_benchmark.c | 40 ++- uadk_tool/test/test_sec.c | 35 ++- 11 files changed, 747 insertions(+), 235 deletions(-) -- 2.33.0

1 11

acclib 例会
by openEuler conference 06 Mar '24

06 Mar '24

您好！ sig-AccLib 邀请您参加 2024-03-20 11:00 召开的Zoom会议会议主题：acclib 例会会议链接：https://us06web.zoom.us/j/82635780668?pwd=n0uTqzYc0RaCmo7X8znzuwworbLYZa.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-03-20 11:00, The subject of the conference is acclib 例会, You can join the meeting at https://us06web.zoom.us/j/82635780668?pwd=n0uTqzYc0RaCmo7X8znzuwworbLYZa.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH] uadk: sample - add test case for compression
by Yang Shen 06 Mar '24

06 Mar '24

1. Support test fork. 2. Support test wd_comp_init2. 3. Support test zlibwrapper. Signed-off-by: Yang Shen <shenyang39(a)huawei.com> --- sample/uadk_comp.c | 364 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 353 insertions(+), 11 deletions(-) diff --git a/sample/uadk_comp.c b/sample/uadk_comp.c index 908c7bcb..1d259f0b 100644 --- a/sample/uadk_comp.c +++ b/sample/uadk_comp.c @@ -7,6 +7,7 @@ #include "wd_alg_common.h" #include "wd_comp.h" #include "wd_sched.h" +#include "wd_zlibwrapper.h" #define SCHED_RR_NAME "sched_rr" @@ -19,6 +20,8 @@ #define required_argument 1 #define optional_argument 2 +#define MAX_THREAD 1024 + struct request_config { char algname[MAX_ALG_LEN]; enum wd_comp_alg_type alg; @@ -42,6 +45,11 @@ struct acc_alg_item { int alg; }; +struct comp_sample_data { + int size; + char data[128]; +}; + static struct request_config config = { .complv = WD_COMP_L8, .optype = WD_DIR_COMPRESS, @@ -52,6 +60,8 @@ static struct request_config config = { static struct request_data data; +static pthread_t threads[MAX_THREAD]; + static struct acc_alg_item alg_options[] = { {"zlib", WD_ZLIB}, {"gzip", WD_GZIP}, @@ -60,6 +70,11 @@ static struct acc_alg_item alg_options[] = { {"", WD_COMP_ALG_MAX} }; +static struct comp_sample_data sample_data = { + .size = 20, + .data = "Welcome to use uadk!", +}; + static void cowfail(char *s) { fprintf(stderr, "" @@ -74,6 +89,313 @@ static void cowfail(char *s) "\n", s); } +static void *initthread(void *data) +{ + int ret; + + ret = wd_comp_init2("zlib", 0, TASK_HW); + if (ret) + fprintf(stderr, "%s: something is wrong, ret = %d!", __func__, ret); + + return NULL; +} + +static int test_fork(void) +{ + int ret; + + pthread_create(&threads[0], NULL, initthread, NULL); + + sleep(2); + ret = fork(); + if (ret == 0) + ret = wd_comp_init2("zlib", 0, TASK_HW); + else + ret = pthread_join(threads[0], NULL); + + wd_comp_uninit2(); + + return ret; +} + +static int test_uadk_init2(void) +{ + struct wd_comp_sess_setup setup[2] = {0}; + struct sched_params param[2] = {0}; + struct wd_comp_req req[2] = {0}; + handle_t h_sess[2]; + void *src, *dst; + int ret; + + ret = wd_comp_init2("zlib", 0, TASK_HW); + if (ret) + return ret; + + setup[0].alg_type = WD_ZLIB; + setup[0].op_type = WD_DIR_COMPRESS; + setup[0].comp_lv = 1; + setup[0].win_sz = 1; + param[0].type = WD_DIR_COMPRESS; + setup[0].sched_param = &param[0]; + + h_sess[0] = wd_comp_alloc_sess(&setup[0]); + if (!h_sess[0]) { + fprintf(stderr, "%s fail to alloc comp sess.\n", __func__); + ret = -WD_EINVAL; + goto out_uninit; + } + + setup[1].alg_type = WD_ZLIB; + setup[1].op_type = WD_DIR_DECOMPRESS; + setup[1].comp_lv = 1; + setup[1].win_sz = 1; + param[1].type = WD_DIR_DECOMPRESS; + setup[1].sched_param = &param[1]; + h_sess[1] = wd_comp_alloc_sess(&setup[1]); + if (!h_sess[1]) { + fprintf(stderr, "%s fail to alloc decomp sess.\n", __func__); + ret = -WD_EINVAL; + goto out_free_comp_sess; + } + + src = calloc(1, sizeof(char) * 128); + if (!src) { + ret = -WD_ENOMEM; + goto out_free_decomp_sess; + } + + dst = calloc(1, sizeof(char) * 128); + if (!dst) { + ret = -WD_ENOMEM; + goto out_free_src; + } + + req[0].src = sample_data.data; + req[0].src_len = sample_data.size; + req[0].op_type = WD_DIR_COMPRESS; + req[0].dst = dst; + req[0].dst_len = 128; + + ret = wd_do_comp_sync(h_sess[0], &req[0]); + if (ret) + goto out_free_dst; + + req[1].src = dst; + req[1].src_len = req[0].dst_len; + req[1].op_type = WD_DIR_DECOMPRESS; + req[1].dst = src; + req[1].dst_len = 128; + + ret = wd_do_comp_sync(h_sess[1], &req[1]); + + ret = strcmp(sample_data.data, src); + if (ret) + fprintf(stderr, "decompress fail\n"); + else + fprintf(stderr, "good\n"); + +out_free_dst: + free(dst); +out_free_src: + free(src); +out_free_decomp_sess: + wd_comp_free_sess(h_sess[1]); +out_free_comp_sess: + wd_comp_free_sess(h_sess[0]); +out_uninit: + wd_comp_uninit2(); + return ret; +} + +static int test_uadk_zlib_deflate(void *src, int src_len, void *dest, int dst_len) +{ + __u32 chunk = 128 * 1024; + z_stream zstrm = {0}; + int ret, flush, have; + + ret = wd_comp_init2("zlib", 0, TASK_HW); + if (ret) { + fprintf(stderr, "%s fail to init wd_comp.\n", __func__); + return ret; + } + + ret = wd_deflate_init(&zstrm, 0, 15); + if (ret) { + fprintf(stderr, "%s fail to init deflate.\n", __func__); + return ret; + } + + zstrm.next_in = src; + do { + if (src_len > chunk) { + zstrm.avail_in = chunk; + src_len -= chunk; + } else { + zstrm.avail_in = src_len; + src_len = 0; + } + + flush = src_len ? Z_SYNC_FLUSH : Z_FINISH; + + /* + * Run wd_deflate() on input until output buffer not full, + * finish compression if all of source has been read in. + */ + do { + zstrm.avail_out = chunk; + zstrm.next_out = dest; + ret = wd_deflate(&zstrm, flush); + have = chunk - zstrm.avail_out; + dest += have; + } while (zstrm.avail_in > 0); + + /* done when last data in file processed */ + } while (flush != Z_FINISH); + + ret = ret == Z_STREAM_END ? zstrm.total_out : ret; + + (void)wd_deflate_end(&zstrm); + + return ret; +} + +static int test_uadk_zlib_inflate(void *src, int src_len, void *dest, int dst_len) +{ + __u32 chunk = 128 * 1024; + // __u32 chunk = 1024 * 1024 * 2; + z_stream zstrm = {0}; + int ret, have; + + ret = wd_inflate_init(&zstrm, 15); + if (ret) { + fprintf(stderr, "%s fail to init inflate.\n", __func__); + return ret; + } + + zstrm.next_in = src; + do { + if (src_len > chunk) { + zstrm.avail_in = chunk; + src_len -= chunk; + } else { + zstrm.avail_in = src_len; + src_len = 0; + } + /* + * Run wd_deflate() on input until output buffer not full, + * finish compression if all of source has been read in. + */ + do { + zstrm.avail_out = chunk; + zstrm.next_out = dest; + ret = wd_inflate(&zstrm, Z_SYNC_FLUSH); + have = chunk - zstrm.avail_out; + dest += have; + } while (zstrm.avail_in > 0); + + /* done when last data in file processed */ + } while (ret != Z_STREAM_END); + + ret = ret == Z_STREAM_END ? zstrm.total_out : ret; + + (void)wd_inflate_end(&zstrm); + + return ret; +} + +static int test_uadk_zlib(void) +{ + void *src, *dst, *src2; + FILE *source = stdin; + FILE *dest = stdout; + int ret, fd, sz; + struct stat s; + + fd = fileno(source); + ret = fstat(fd, &s); + if (ret < 0) { + fprintf(stderr, "%s fstat error!\n", __func__); + return ret; + } + + src = calloc(1, sizeof(char) * s.st_size); + if (!src) { + fprintf(stderr, "%s calloc error!\n", __func__); + return -WD_ENOMEM; + } + + src2 = calloc(1, sizeof(char) * s.st_size * 2); + if (!src2) { + fprintf(stderr, "%s calloc2 error!\n", __func__); + ret = -WD_ENOMEM; + goto free_src; + } + + dst = calloc(1, sizeof(char) * s.st_size * 2); + if (!dst) { + fprintf(stderr, "%s calloc error!\n", __func__); + ret = -WD_ENOMEM; + goto free_src2; + } + + sz = fread(src, 1, s.st_size, source); + if (sz != s.st_size) { + fprintf(stderr, "%s read file sz != file.size!\n", __func__); + ret = -WD_EINVAL; + goto free_dst; + } + + ret = test_uadk_zlib_deflate(src, sz, dst, sz * 2); + if (ret < 0) { + fprintf(stderr, "%s do deflate fail ret %d\n", __func__, ret); + goto free_dst; + } + + ret = fwrite(dst, 1, ret, dest); + if (ret < 0) + fprintf(stderr, "%s file write fail ret %d\n", __func__, ret); + + ret = test_uadk_zlib_inflate(dst, ret, src2, sz * 2); + if (ret < 0) { + fprintf(stderr, "%s do inflate fail ret %d\n", __func__, ret); + goto free_dst; + } + + ret = memcmp(src, src2, sz); + if (!ret) + fprintf(stderr, "%s good!\n", __func__); + +free_dst: + free(dst); +free_src2: + free(src2); +free_src: + free(src); + return ret; +} + +static int test_func(int test_mode) +{ + int ret; + + switch (test_mode) { + case 0: + ret = test_fork(); + break; + case 1: + ret = test_uadk_init2(); + break; + case 2: + ret = test_uadk_zlib(); + break; + default: + ret = -WD_EINVAL; + break; + } + + return ret; +} + static struct uacce_dev_list* get_dev_list(char *alg_name) { struct uacce_dev_list *list, *p, *head = NULL, *prev = NULL; @@ -147,7 +469,7 @@ static struct wd_sched *uadk_comp_sched_init(void) sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 2, 2, lib_poll_func); if (!sched) { - printf("%s fail to alloc sched.\n", __func__); + fprintf(stderr, "%s fail to alloc sched.\n", __func__); return NULL; } sched->name = SCHED_RR_NAME; @@ -388,31 +710,31 @@ static int operation(FILE *source, FILE *dest) ret = uadk_comp_ctx_init(); if (ret) { - fprintf(stderr, "%s fail to init ctx!\n", __func__); + fprintf(stderr, "%s fail to init ctx! %d\n", __func__, ret); return ret; } ret = uadk_comp_sess_init(); if (ret) { - fprintf(stderr, "%s fail to init sess!\n", __func__); + fprintf(stderr, "%s fail to init sess! %d\n", __func__, ret); goto out_ctx_uninit; } ret = uadk_comp_request_init(source); if (ret) { - fprintf(stderr, "%s fail to init request!\n", __func__); + fprintf(stderr, "%s fail to init request! %d\n", __func__, ret); goto out_sess_uninit; } ret = uadk_do_comp(); if (ret) { - fprintf(stderr, "%s fail to do request!\n", __func__); + fprintf(stderr, "%s fail to do request! %d\n", __func__, ret); goto out_sess_uninit; } ret = uadk_comp_write_file(dest); if (ret) - fprintf(stderr, "%s fail to write result!\n", __func__); + fprintf(stderr, "%s fail to write result! %d\n", __func__, ret); uadk_comp_request_uninit(); @@ -445,9 +767,10 @@ static void print_help(void) int main(int argc, char *argv[]) { + int ret, c, test_mode; int option_index = 0; int help = 0; - int ret, c; + int test = 0; static struct option long_options[] = { {"help", no_argument, 0, 0}, @@ -455,6 +778,9 @@ int main(int argc, char *argv[]) {"complv", required_argument, 0, 2}, {"optype", required_argument, 0, 3}, {"winsize", required_argument, 0, 4}, + {"fork", no_argument, 0, 5}, + {"init2", no_argument, 0, 6}, + {"zlib", no_argument, 0, 7}, {0, 0, 0, 0} }; @@ -470,8 +796,8 @@ int main(int argc, char *argv[]) case 1: config.list = get_dev_list(optarg); if (!config.list) { - cowfail("Can't find your algorithm!\n"); help = 1; + cowfail("Can't find your algorithm!\n"); } else { strcpy(config.algname, optarg); } @@ -485,9 +811,21 @@ int main(int argc, char *argv[]) case 4: config.winsize = strtol(optarg, NULL, 0); break; + case 5: + test = 1; + test_mode = 0; + break; + case 6: + test = 1; + test_mode = 1; + break; + case 7: + test = 1; + test_mode = 2; + break; default: help = 1; - cowfail("bad input test parameter!\n"); + cowfail("Bad input test parameter!\n"); break; } } @@ -497,9 +835,13 @@ int main(int argc, char *argv[]) exit(-1); } - ret = operation(stdin, stdout); + if (test == 1) + ret = test_func(test_mode); + else + ret = operation(stdin, stdout); + if (ret) - cowfail("So sad for we do something wrong!\n"); + cowfail("So sad for someting wrong!\n"); return ret; } -- 2.33.0

1 0

AccLib双周会议
by openEuler conference 06 Mar '24

06 Mar '24

您好！ sig-AccLib 邀请您参加 2024-03-06 11:00 召开的Zoom会议会议主题：AccLib双周会议会议内容：【2024/3/6 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://us06web.zoom.us/j/83782124307?pwd=3NJ1LBGQq7IQASarVAucLnJUQfoUTw.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-03-06 11:00, The subject of the conference is AccLib双周会议, Summary: 【2024/3/6 AccLIb SIG 双周例会 11:00 - 12:00】 You can join the meeting at https://us06web.zoom.us/j/83782124307?pwd=3NJ1LBGQq7IQASarVAucLnJUQfoUTw.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

AccLin SIG双周例会
by openEuler conference 20 Feb '24

20 Feb '24

您好！ sig-AccLib 邀请您参加 2024-02-21 11:00 召开的Zoom会议会议主题：AccLin SIG双周例会会议内容：固定会议链接：linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/89851198982?pwd=zdJxoRl9qjtkYLlRRMBpTYT2TzAXxI.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-02-21 11:00, The subject of the conference is AccLin SIG双周例会, Summary: 固定会议链接：linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/89851198982?pwd=zdJxoRl9qjtkYLlRRMBpTYT2TzAXxI.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

AccLIb SIG 双周例会
by openEuler conference 07 Feb '24

07 Feb '24

您好！ sig-AccLib SIG 邀请您参加 2024-02-07 11:00 召开的Zoom会议会议主题：AccLIb SIG 双周例会会议内容：【2024/2/7 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要：https:/ 会议链接：https://us06web.zoom.us/j/84432318993?pwd=jPbGib1iazRQ6wYmi6Teka0gbgfKe8.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2024-02-07 11:00, The subject of the conference is AccLIb SIG 双周例会 , Summary: 【2024/2/7 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要：https:/ You can join the meeting at https://us06web.zoom.us/j/84432318993?pwd=jPbGib1iazRQ6wYmi6Teka0gbgfKe8.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH 0/3] uadk: prepare for supporting software algorithm
by Weili Qian 05 Feb '24

05 Feb '24

This patchset is the preparation for the software algorithm. UADK will support the software algorithm later. Weili Qian (3): uadk/sec: move function to wd_digest_drv.h uadk/digest: add partial_block to store partial data uadk/digest: add wd_ctx_spin_lock function drv/hisi_sec.c | 52 +++++++++-------------------------- include/drv/wd_digest_drv.h | 31 ++++++++++++++++++++- include/wd_util.h | 23 ++++++++++++++++ wd_digest.c | 54 +++++++++++++++++++++++-------------- 4 files changed, 100 insertions(+), 60 deletions(-) -- 2.33.0

1 0

[PATCH 2/8] uadk/isa-ce: support sm3 ce instruction
by Zhiqi Song 30 Jan '24

30 Jan '24

Support sync sm3 ce instruction, users can use ce instruction to accelerate sm3 sync task through init2 related functions. This patch also includes: 1. Add compile parameter and related file to support isa-ce library. 2. Check whether the platform supports the CE instruction in alg driver register process. 3. Make HW driver and INSTR driver of the same alg can be requested at the same time. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- Makefile.am | 18 +- configure.ac | 3 + drv/isa_ce_sm3.c | 249 +++++++++++++ drv/isa_ce_sm3_armv8.S | 765 ++++++++++++++++++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++++++ include/drv/isa_ce_sm3.h | 66 ++++ include/wd_alg.h | 43 +++ wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 87 ++++- 11 files changed, 1446 insertions(+), 20 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h create mode 100644 include/drv/isa_ce_sm3.h diff --git a/Makefile.am b/Makefile.am index 25853eb..b267e9e 100644 --- a/Makefile.am +++ b/Makefile.am @@ -43,7 +43,8 @@ nobase_pkginclude_HEADERS = v1/wd.h v1/wd_cipher.h v1/wd_aead.h v1/uacce.h v1/wd lib_LTLIBRARIES=libwd.la libwd_comp.la libwd_crypto.la uadk_driversdir=$(libdir)/uadk -uadk_drivers_LTLIBRARIES=libhisi_sec.la libhisi_hpre.la libhisi_zip.la +uadk_drivers_LTLIBRARIES=libhisi_sec.la libhisi_hpre.la libhisi_zip.la \ + libisa_ce.la libwd_la_SOURCES=wd.c wd_mempool.c wd.h wd_alg.c wd_alg.h \ v1/wd.c v1/wd.h v1/wd_adapter.c v1/wd_adapter.h \ @@ -79,7 +80,8 @@ libwd_crypto_la_SOURCES=wd_cipher.c wd_cipher.h wd_cipher_drv.h \ wd_digest.c wd_digest.h wd_digest_drv.h \ wd_util.c wd_util.h \ wd_sched.c wd_sched.h \ - wd.c wd.h + wd.c wd.h \ + arm_arch_ce.h isa_ce_sm3.h libhisi_sec_la_SOURCES=drv/hisi_sec.c drv/hisi_qm_udrv.c \ lib/crypto/aes.c lib/crypto/galois.c \ @@ -87,6 +89,10 @@ libhisi_sec_la_SOURCES=drv/hisi_sec.c drv/hisi_qm_udrv.c \ libhisi_hpre_la_SOURCES=drv/hisi_hpre.c drv/hisi_qm_udrv.c \ hisi_qm_udrv.h + +libisa_ce_la_SOURCES=drv/isa_ce_sm3.c drv/isa_ce_sm3_armv8.S arm_arch_ce.h \ + drv/isa_ce_sm3.h + if WD_STATIC_DRV AM_CFLAGS += -DWD_STATIC_DRV -fPIC AM_CFLAGS += -DWD_NO_LOG @@ -106,6 +112,10 @@ libhisi_sec_la_DEPENDENCIES = libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) libhisi_hpre_la_DEPENDENCIES = libwd.la libwd_crypto.la + +libisa_ce_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) +libisa_ce_la_DEPENDENCIES = libwd.la libwd_crypto.la + else UADK_WD_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd.map UADK_CRYPTO_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_crypto.map @@ -134,6 +144,10 @@ libhisi_sec_la_DEPENDENCIES= libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD= -lwd -lwd_crypto libhisi_hpre_la_LDFLAGS=$(UADK_VERSION) libhisi_hpre_la_DEPENDENCIES= libwd.la libwd_crypto.la + +libisa_ce_la_LIBADD= -lwd -lwd_crypto +libisa_ce_la_LDFLAGS=$(UADK_VERSION) +libisa_ce_la_DEPENDENCIES= libwd.la libwd_crypto.la endif # WD_STATIC_DRV pkgconfigdir = $(libdir)/pkgconfig diff --git a/configure.ac b/configure.ac index b198417..4ed111e 100644 --- a/configure.ac +++ b/configure.ac @@ -21,6 +21,9 @@ LT_INIT AC_SUBST([hardcode_into_libs], [no]) AM_PROG_CC_C_O +# Support assembler +AM_PROG_AS + AC_ARG_ENABLE([debug-log], AS_HELP_STRING([--enable-debug-log], [enable debug logging globally]), [ AS_IF([test "x$enable_debug_log" = "xyes"], diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c new file mode 100644 index 0000000..d562730 --- /dev/null +++ b/drv/isa_ce_sm3.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: Apache-2.0 +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ +/* + * Copyright 2023 Huawei Technologies Co.,Ltd. All rights reserved. + */ + +#include <stdlib.h> +#include <sys/auxv.h> +#include <pthread.h> +#include "drv/wd_digest_drv.h" +#include "drv/isa_ce_sm3.h" +#include "wd_digest.h" +#include "wd_util.h" + +typedef void (sm3_ce_block_fn)(__u32 word_reg[SM3_STATE_WORDS], + const unsigned char *src, size_t blocks); + +static int sm3_ce_drv_init(void *conf, void *priv); +static void sm3_ce_drv_exit(void *priv); +static int sm3_ce_drv_send(handle_t ctx, void *digest_msg); +static int sm3_ce_drv_recv(handle_t ctx, void *digest_msg); +static int sm3_ce_get_usage(void *param); + +static struct wd_alg_driver sm3_ce_alg_driver = { + .drv_name = "isa_ce_sm3", + .alg_name = "sm3", + .calc_type = UADK_ALG_CE_INSTR, + .priority = 200, + .priv_size = sizeof(struct sm3_ce_drv_ctx), + .queue_num = 1, + .op_type_num = 1, + .fallback = 0, + .init = sm3_ce_drv_init, + .exit = sm3_ce_drv_exit, + .send = sm3_ce_drv_send, + .recv = sm3_ce_drv_recv, + .get_usage = sm3_ce_get_usage, +}; + +static void __attribute__((constructor)) sm3_ce_probe(void) +{ + int ret; + + WD_INFO("Info: register SM3 CE alg driver!\n"); + ret = wd_alg_driver_register(&sm3_ce_alg_driver); + if (ret && ret != WD_ENODEV) + WD_ERR("Error: register SM3 CE failed!\n"); +} + +static void __attribute__((destructor)) sm3_ce_remove(void) +{ + wd_alg_driver_unregister(&sm3_ce_alg_driver); +} + +static int sm3_ce_get_usage(void *param) +{ + return 0; +} + +static inline void sm3_ce_init(struct sm3_ce_ctx *sctx) +{ + memset(sctx, 0, sizeof(*sctx)); + + sctx->word_reg[0] = SM3_IVA; + sctx->word_reg[1] = SM3_IVB; + sctx->word_reg[2] = SM3_IVC; + sctx->word_reg[3] = SM3_IVD; + sctx->word_reg[4] = SM3_IVE; + sctx->word_reg[5] = SM3_IVF; + sctx->word_reg[6] = SM3_IVG; + sctx->word_reg[7] = SM3_IVH; +} + +static void sm3_ce_update(struct sm3_ce_ctx *sctx, const void *data, + size_t data_len, sm3_ce_block_fn *block_fn) +{ + size_t remain_data_len, blk_num; + + /* Get the data num that need compute currently */ + if (sctx->num) { + remain_data_len = SM3_BLOCK_SIZE - sctx->num; + /* If data_len does not enough a block size, then leave it to final */ + if (data_len < remain_data_len) { + memcpy(sctx->block + sctx->num, data, data_len); + sctx->num += data_len; + return; + } + + memcpy(sctx->block + sctx->num, data, remain_data_len); + block_fn(sctx->word_reg, sctx->block, 1); + sctx->nblocks++; + data += remain_data_len; + data_len -= remain_data_len; + } + + /* Group the filled msg by 512-bits (64-bytes) */ + blk_num = data_len / SM3_BLOCK_SIZE; + if (blk_num) { + block_fn(sctx->word_reg, data, blk_num); + sctx->nblocks += blk_num; + data += SM3_BLOCK_SIZE * blk_num; + data_len -= SM3_BLOCK_SIZE * blk_num; + } + + sctx->num = data_len; + if (data_len) + memcpy(sctx->block, data, data_len); +} + +static void sm3_ce_final(struct sm3_ce_ctx *sctx, __u8 *md, + sm3_ce_block_fn *block_fn) +{ + int i; + + /* Add padding */ + sctx->block[sctx->num] = 0x80; + + if (sctx->num <= SM3_BLOCK_SIZE - 9) { + memset(sctx->block + sctx->num + 1, 0, SM3_BLOCK_SIZE - sctx->num - 9); + } else { + memset(sctx->block + sctx->num + 1, 0, SM3_BLOCK_SIZE - sctx->num - 1); + block_fn(sctx->word_reg, sctx->block, 1); + memset(sctx->block, 0, SM3_BLOCK_SIZE - 8); + } + + /* + * Put the length of the message in bits into the last two words, to get + * the length in bits we need to multiply by 8 (or left shift 3). This left shifted + * value is put in the last word. Any bits shifted off the left edge need to be put in the + * penultimate word, we can work out which bits by shifting right the length by 29 bits. + */ + PUTU32(sctx->block + 56, sctx->nblocks >> 23); + PUTU32(sctx->block + 60, (sctx->nblocks << 9) + (sctx->num << 3)); + + block_fn(sctx->word_reg, sctx->block, 1); + for (i = 0; i < 8; i++) + PUTU32(md + i * 4, sctx->word_reg[i]); +} + +static int do_sm3_ce(const __u8 *data, size_t len, __u8 *out_digest) +{ + struct sm3_ce_ctx sctx = {0}; + int ret = 0; + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, data, len, sm3_ce_block_compress); + sm3_ce_final(&sctx, out_digest, sm3_ce_block_compress); + + if (!out_digest) { + WD_ERR("failed to get digest!\n"); + ret = -WD_EINVAL; + } + + memset(&sctx, 0, sizeof(struct sm3_ce_ctx)); + return ret; +} + +static int do_hmac_sm3_ce(const __u8 *key, size_t key_len, + const __u8 *data, size_t data_len, + __u8 *out_hmac) +{ + unsigned char key_buf[HMAC_BLOCK_SIZE] = {0}; + unsigned char ipad[HMAC_BLOCK_SIZE] = {0}; + unsigned char opad[HMAC_BLOCK_SIZE] = {0}; + unsigned char hash[SM3_DIGEST_SIZE] = {0}; + struct sm3_ce_ctx sctx = {0}; + unsigned int i; + + if (!key_len) { + WD_ERR("invalid hmac key_len!\n"); + return -WD_EINVAL; + } + + if (key_len > HMAC_BLOCK_SIZE) { + do_sm3_ce(key, key_len, key_buf); + key_len = SM3_DIGEST_SIZE; + key = key_buf; + } + + memset(ipad, 0x36, HMAC_BLOCK_SIZE); + memset(opad, 0x5c, HMAC_BLOCK_SIZE); + for (i = 0; i < key_len; i++) { + ipad[i] ^= key[i]; + opad[i] ^= key[i]; + } + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, ipad, HMAC_BLOCK_SIZE, sm3_ce_block_compress); + sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress); + sm3_ce_final(&sctx, hash, sm3_ce_block_compress); + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, opad, HMAC_BLOCK_SIZE, sm3_ce_block_compress); + sm3_ce_update(&sctx, hash, SM3_DIGEST_SIZE, sm3_ce_block_compress); + sm3_ce_final(&sctx, out_hmac, sm3_ce_block_compress); + + return WD_SUCCESS; +} + +static int sm3_ce_drv_send(handle_t ctx, void *digest_msg) +{ + struct wd_digest_msg *msg = (struct wd_digest_msg *)digest_msg; + __u8 *out_digest, *data, *key; + size_t data_size, key_len; + int ret; + + if (!msg) { + WD_ERR("invalid: digest_msg is NULL!\n"); + return -WD_EINVAL; + } + + data_size = msg->in_bytes; + out_digest = msg->out; + data = msg->in; + key = msg->key; + key_len = msg->key_bytes; + + if (msg->mode == WD_DIGEST_NORMAL) { + ret = do_sm3_ce(data, data_size, out_digest); + } else if (msg->mode == WD_DIGEST_HMAC) { + ret = do_hmac_sm3_ce(key, key_len, data, data_size, out_digest); + } else { + WD_ERR("invalid digest mode!\n"); + ret = -WD_EINVAL; + } + + return ret; +} + +static int sm3_ce_drv_recv(handle_t ctx, void *digest_msg) +{ + return WD_SUCCESS; +} + +static int sm3_ce_drv_init(void *conf, void *priv) +{ + return WD_SUCCESS; +} + +static void sm3_ce_drv_exit(void *priv) +{ +} diff --git a/drv/isa_ce_sm3_armv8.S b/drv/isa_ce_sm3_armv8.S new file mode 100644 index 0000000..3d08e2d --- /dev/null +++ b/drv/isa_ce_sm3_armv8.S @@ -0,0 +1,765 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ + +#include "../include/drv/arm_arch_ce.h" + +.arch armv8.2-a +.text +.globl sm3_ce_block_compress +.type sm3_ce_block_compress,%function +.align 5 +sm3_ce_block_compress: + AARCH64_VALID_CALL_TARGET +/* Loads state */ + /* + * Loads multiple single-element structures from memory(X0 register) and + * writes result to two SIMD&FP registers(v5.4s and v6.4s). + */ + ld1 {v5.4s,v6.4s}, [x0] /* 4s -- 4 * 32bit */ + /* + * Reverses the order of 32-bit(type:s) elements in each doubleword of the + * vector in the src SIMD&FP register(v5), places the result into a vector + * and writes the vector to the dst SIDM&FP register(v5). + */ + rev64 v5.4s, v5.4s + rev64 v6.4s, v6.4s + /* + * Extracts the lowest vector elements from the second src SIMD&FP register, + * and highest vector elements from the first source SIMD&FP register, + * concatenates the result into a vector, and writes the vector to the + * dst SIMD&FP register vector. #8 means the numbered byte element to be extracted. + * Format: ext <dst register>, <first src register>, <second src register>, <index> + * #imm: immediate data. + */ + ext v5.16b, v5.16b, v5.16b, #8 /* 16b -- 16 * 8bit */ + ext v6.16b, v6.16b, v6.16b, #8 + /* From PC-relative address adds an immediate value to form a PC-relative + * address, and writes the result to the dst register. + */ + adr x8, .Tj /* 'Tj' is the constant defined in SM3 protocol */ + /* Loads pair of register calculates an address from a base register value + * and an immediate offset, loads two 32-bit words from memory, and writes + * them to two registers. */ + ldp s16, s17, [x8] /* 'sn' is the scalar register, 'vn' is the vector register */ + +.Loop: +/* Loads input */ + /* + * Loads multipule single-element structrue to four registers. + * #64 is the immediate offset variant, it is the post-index immediate offset. + * Loads the input src data, msg to be hashed. + */ + ld1 {v0.16b,v1.16b,v2.16b,v3.16b}, [x1], #64 + /* + * Substracts an optionally-shifted immediate value from a register value, + * and writes the result to the dst register. + */ + sub w2, w2, #1 + + /* Copies the value in a src register to the dst register. */ + mov v18.16b, v5.16b + mov v19.16b, v6.16b + +#ifndef __ARMEB__ + rev32 v0.16b, v0.16b + rev32 v1.16b, v1.16b + rev32 v2.16b, v2.16b + rev32 v3.16b, v3.16b +#endif + + ext v20.16b, v16.16b, v16.16b, #4 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v2.16b, v4.16b, v0.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v3.16b, v4.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v0.16b, v1.16b, #8 + /* sm3partw1 v2.4s, v3.4s, v1.4s */ +.inst 0xce61c062 + /* sm3partw2 v2.4s, v23.4s, v22.4s */ +.inst 0xce76c6e2 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bae6 + ext v20.16b, v17.16b, v17.16b, #4 + /* s4 = w7 | w8 | w9 | w10 */ + ext v3.16b, v0.16b, v1.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v4.16b, v0.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v1.16b, v2.16b, #8 + /* sm3partw1 v3.4s, v4.4s, v2.4s */ +.inst 0xce62c083 + /* sm3partw2 v3.4s, v23.4s, v22.4s */ +.inst 0xce76c6e3 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v2.16b, v4.16b, v0.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v3.16b, v4.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v0.16b, v1.16b, #8 + /* sm3partw1 v2.4s, v3.4s, v1.4s */ +.inst 0xce61c062 + /* sm3partw2 v2.4s, v23.4s, v22.4s */ +.inst 0xce76c6e2 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v3.16b, v0.16b, v1.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v4.16b, v0.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v1.16b, v2.16b, #8 + /* sm3partw1 v3.4s, v4.4s, v2.4s */ +.inst 0xce62c083 + /* sm3partw2 v3.4s, v23.4s, v22.4s */ +.inst 0xce76c6e3 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bee6 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bee6 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + eor v5.16b, v5.16b, v18.16b + eor v6.16b, v6.16b, v19.16b + /* + * cbnz: compare and branch on Nonzero, compares the value in a register + * with zero, and conditionally branches to a label at a PC-relative offset + * if the comparison is not equal. + * 'w2' is the 32-bit name of the general-purpose register to be tested. + * '.Loop' is the program label to be conditionally branched to. + */ + cbnz w2, .Loop + + /* save state, it is the result of one cycle */ + rev64 v5.4s, v5.4s + rev64 v6.4s, v6.4s + ext v5.16b, v5.16b, v5.16b, #8 + ext v6.16b, v6.16b, v6.16b, #8 + st1 {v5.4s,v6.4s}, [x0] + ret +.size sm3_ce_block_compress,.-sm3_ce_block_compress + +.align 3 +.Tj: +/* + * Inserts a list of 32-bit values as data into the assembly. + * In SM3 protocol: + * when 0 <= j <= 15, Tj = 0x79cc4519, + * when 16 <= j <= 63, Tj = 0x9d8a7a87. + */ +.word 0x79cc4519, 0x9d8a7a87 diff --git a/include/drv/arm_arch_ce.h b/include/drv/arm_arch_ce.h new file mode 100644 index 0000000..cad6e33 --- /dev/null +++ b/include/drv/arm_arch_ce.h @@ -0,0 +1,199 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ + +#ifndef __ARM_ARCH_CE_H +#define __ARM_ARCH_CE_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if !defined(__ARM_ARCH__) +# if defined(__CC_ARM) +# define __ARM_ARCH__ __TARGET_ARCH_ARM +# if defined(__BIG_ENDIAN) +# define __ARMEB__ +# else +# define __ARMEL__ +# endif +# elif defined(__GNUC__) +# if defined(__aarch64__) +# define __ARM_ARCH__ 8 + /* + * GCC does not define __ARM_ARCH__, instead it defines + * bunch of below macros. See all_architectures[] table in + * gcc/config/arm/arm.c. + */ +# elif defined(__ARM_ARCH) +# define __ARM_ARCH__ __ARM_ARCH +# elif defined(__ARM_ARCH_8A__) +# define __ARM_ARCH__ 8 +# elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \ + defined(__ARM_ARCH_7EM__) +# define __ARM_ARCH__ 7 +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ + defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6M__) || \ + defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) || \ + defined(__ARM_ARCH_6T2__) +# define __ARM_ARCH__ 6 +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || \ + defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_5TEJ__) +# define __ARM_ARCH__ 5 +# elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) +# define __ARM_ARCH__ 4 +# else +# error "unsupported ARM architecture" +# endif +# endif +#endif + +#if !defined(__ARM_MAX_ARCH__) +# define __ARM_MAX_ARCH__ __ARM_ARCH__ +#endif + +#if __ARM_MAX_ARCH__ < __ARM_ARCH__ +# error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__" +#elif __ARM_MAX_ARCH__ != __ARM_ARCH__ +# if __ARM_ARCH__ < 7 && __ARM_MAX_ARCH__ >= 7 && defined(__ARMEB__) +# error "can't build universal big-endian binary" +# endif +#endif + +#ifndef __ASSEMBLER__ +extern unsigned int ARMCAP_P; +extern unsigned int ARM_MIDR; +#endif + +#define ARMV7_NEON (1<<0) +#define ARMV7_TICK (1<<1) +#define ARMV8_AES (1<<2) +#define ARMV8_SHA1 (1<<3) +#define ARMV8_SHA256 (1<<4) +#define ARMV8_PMULL (1<<5) +#define ARMV8_SHA512 (1<<6) +#define ARMV8_CPUID (1<<7) +#define ARMV8_RNG (1<<8) +#define ARMV8_SM3 (1<<9) +#define ARMV8_SM4 (1<<10) +#define ARMV8_SHA3 (1<<11) +#define ARMV8_UNROLL8_EOR3 (1<<12) +#define ARMV8_SVE (1<<13) +#define ARMV8_SVE2 (1<<14) + +/* + * MIDR_EL1 system register + * + * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0 + * | | | | | | | + * |RES0 | Implementer | Variant | Arch | PartNum |Revision| + * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________| + * + */ + +#define ARM_CPU_IMP_ARM 0x41 +#define HISI_CPU_IMP 0x48 + +#define ARM_CPU_PART_CORTEX_A72 0xD08 +#define ARM_CPU_PART_N1 0xD0C +#define ARM_CPU_PART_V1 0xD40 +#define ARM_CPU_PART_N2 0xD49 +#define HISI_CPU_PART_KP920 0xD01 + +#define MIDR_PARTNUM_SHIFT 4 +#define MIDR_PARTNUM_MASK (0xfffU << MIDR_PARTNUM_SHIFT) +#define MIDR_PARTNUM(midr) \ + (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) + +#define MIDR_IMPLEMENTER_SHIFT 24 +#define MIDR_IMPLEMENTER_MASK (0xffU << MIDR_IMPLEMENTER_SHIFT) +#define MIDR_IMPLEMENTER(midr) \ + (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT) + +#define MIDR_ARCHITECTURE_SHIFT 16 +#define MIDR_ARCHITECTURE_MASK (0xfU << MIDR_ARCHITECTURE_SHIFT) +#define MIDR_ARCHITECTURE(midr) \ + (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT) + +#define MIDR_CPU_MODEL_MASK \ + (MIDR_IMPLEMENTER_MASK | \ + MIDR_PARTNUM_MASK | \ + MIDR_ARCHITECTURE_MASK) + +#define MIDR_CPU_MODEL(imp, partnum) \ + (((imp) << MIDR_IMPLEMENTER_SHIFT) | \ + (0xfU << MIDR_ARCHITECTURE_SHIFT) | \ + ((partnum) << MIDR_PARTNUM_SHIFT)) + +#define MIDR_IS_CPU_MODEL(midr, imp, partnum) \ + (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum)) + +#if defined(__ASSEMBLER__) + /* + * Support macros for + * - Armv8.3-A Pointer Authentication and + * - Armv8.5-A Branch Target Identification + * features which require emitting a .note.gnu.property section with the + * appropriate architecture-dependent feature bits set. + * Read more: "ELF for the Arm® 64-bit Architecture" + */ +# if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1 +# define GNU_PROPERTY_AARCH64_BTI (1 << 0) /* Has Branch Target Identification */ +# define AARCH64_VALID_CALL_TARGET hint #34 /* BTI 'c' */ +# else +# define GNU_PROPERTY_AARCH64_BTI 0 /* No Branch Target Identification */ +# define AARCH64_VALID_CALL_TARGET +# endif + +# if defined(__ARM_FEATURE_PAC_DEFAULT) && \ + (__ARM_FEATURE_PAC_DEFAULT & 1) == 1 /* Signed with A-key */ +# define GNU_PROPERTY_AARCH64_POINTER_AUTH (1 << 1) /* Has Pointer Authentication */ +# define AARCH64_SIGN_LINK_REGISTER hint #25 /* PACIASP */ +# define AARCH64_VALIDATE_LINK_REGISTER hint #29 /* AUTIASP */ +# elif defined(__ARM_FEATURE_PAC_DEFAULT) && \ + (__ARM_FEATURE_PAC_DEFAULT & 2) == 2 /* Signed with B-key */ +# define GNU_PROPERTY_AARCH64_POINTER_AUTH (1 << 1) /* Has Pointer Authentication */ +# define AARCH64_SIGN_LINK_REGISTER hint #27 /* PACIBSP */ +# define AARCH64_VALIDATE_LINK_REGISTER hint #31 /* AUTIBSP */ +# else +# define GNU_PROPERTY_AARCH64_POINTER_AUTH 0 /* No Pointer Authentication */ +# if GNU_PROPERTY_AARCH64_BTI != 0 +# define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET +# else +# define AARCH64_SIGN_LINK_REGISTER +# endif +# define AARCH64_VALIDATE_LINK_REGISTER +# endif + +# if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0 + .pushsection .note.gnu.property, "a"; + .balign 8; + .long 4; + .long 0x10; + .long 0x5; + .asciz "GNU"; + .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */ + .long 4; + .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI); + .long 0; + .popsection; +# endif + +#endif /* defined __ASSEMBLER__ */ + +#define IS_CPU_SUPPORT_UNROLL8_EOR3() \ + (ARMCAP_P & ARMV8_UNROLL8_EOR3) + +#ifdef __cplusplus +} +#endif + +#endif /* __ARM_ARCH_CE_H */ diff --git a/include/drv/isa_ce_sm3.h b/include/drv/isa_ce_sm3.h new file mode 100644 index 0000000..d08c72f --- /dev/null +++ b/include/drv/isa_ce_sm3.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* Copyright 2020-2021 Huawei Technologies Co.,Ltd. All rights reserved. */ +#ifndef __ISA_CE_SM3_H +#define __ISA_CE_SM3_H + +#include "../wd_alg_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define SM3_DIGEST_SIZE 32 +#define SM3_BLOCK_SIZE 64 +#define SM3_STATE_WORDS 8 +#define HMAC_BLOCK_SIZE 64 + +#define SM3_IVA 0x7380166f +#define SM3_IVB 0x4914b2b9 +#define SM3_IVC 0x172442d7 +#define SM3_IVD 0xda8a0600 +#define SM3_IVE 0xa96f30bc +#define SM3_IVF 0x163138aa +#define SM3_IVG 0xe38dee4d +#define SM3_IVH 0xb0fb0e4e + +#define PUTU32(p, V) \ + ((p)[0] = (uint8_t)((V) >> 24), \ + (p)[1] = (uint8_t)((V) >> 16), \ + (p)[2] = (uint8_t)((V) >> 8), \ + (p)[3] = (uint8_t)(V)) + +struct sm3_ce_ctx { + /* + * Use an array to represent the eight 32-bits word registers, + * SM3_IVA, SM3_IVB, ..., SM3_IVH, save IV and the final digest. + */ + __u32 word_reg[SM3_STATE_WORDS]; + /* + * The length (in bits) of all the msg fragments, the length of the + * whole msg should less than 2^64 bit, a msg block is 512-bits, + * make a 64-bits number in two parts, low 32-bits - 'Nl' and + * high 32-bits - 'Nh'. + */ + __u64 nblocks; + /* + * Message block, a msg block is 512-bits, use sixteen __u32 type + * element to store it, used in B(i) = W0||W1||W2||...||W15. + * Use a __u8 array to replace the 32-bit array. + */ + __u8 block[SM3_BLOCK_SIZE]; + /* The number of msg that need to compute in current cycle or turn. */ + size_t num; +}; + +struct sm3_ce_drv_ctx { + struct wd_ctx_config_internal config; +}; + +void sm3_ce_block_compress(__u32 word_reg[SM3_STATE_WORDS], + const unsigned char *src, size_t blocks); + +#ifdef __cplusplus +} +#endif + +#endif /* __ISA_CE_SM3_H */ diff --git a/include/wd_alg.h b/include/wd_alg.h index f8b136e..861b7d9 100644 --- a/include/wd_alg.h +++ b/include/wd_alg.h @@ -19,6 +19,49 @@ extern "C" { #define ALG_NAME_SIZE 128 #define DEV_NAME_LEN 128 +/* + * Macros related to arm platform: + * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas + * AArch64 used AT_HWCAP. + */ +#ifndef AT_HWCAP +# define AT_HWCAP 16 +#endif + +#ifndef AT_HWCAP2 +# define AT_HWCAP2 26 +#endif + +#if defined(__arm__) || defined(__arm) +# define HWCAP AT_HWCAP +# define HWCAP_NEON (1 << 12) + +# define HWCAP_CE AT_HWCAP2 +# define HWCAP_CE_AES (1 << 0) +# define HWCAP_CE_PMULL (1 << 1) +# define HWCAP_CE_SHA1 (1 << 2) +# define HWCAP_CE_SHA256 (1 << 3) +#elif defined(__aarch64__) +# define HWCAP AT_HWCAP +# define HWCAP_NEON (1 << 1) + +# define HWCAP_CE HWCAP +# define HWCAP_CE_AES (1 << 3) +# define HWCAP_CE_PMULL (1 << 4) +# define HWCAP_CE_SHA1 (1 << 5) +# define HWCAP_CE_SHA256 (1 << 6) +# define HWCAP_CPUID (1 << 11) +# define HWCAP_SHA3 (1 << 17) +# define HWCAP_CE_SM3 (1 << 18) +# define HWCAP_CE_SM4 (1 << 19) +# define HWCAP_CE_SHA512 (1 << 21) +# define HWCAP_SVE (1 << 22) +/* AT_HWCAP2 */ +# define HWCAP2 26 +# define HWCAP2_SVE2 (1 << 1) +# define HWCAP2_RNG (1 << 16) +#endif + enum alg_dev_type { UADK_ALG_SOFT = 0x0, UADK_ALG_CE_INSTR = 0x1, diff --git a/wd_alg.c b/wd_alg.c index 3b111c8..f34a407 100644 --- a/wd_alg.c +++ b/wd_alg.c @@ -9,6 +9,7 @@ #include <stdbool.h> #include <stdlib.h> #include <pthread.h> +#include <sys/auxv.h> #include "wd.h" #include "wd_alg.h" @@ -90,6 +91,24 @@ static bool wd_check_accel_dev(const char *dev_name) return false; } +static bool wd_check_ce_support(const char *dev_name) +{ + unsigned long hwcaps = 0; + + #if defined(__arm__) || defined(__arm) + hwcaps = getauxval(AT_HWCAP2); + #elif defined(__aarch64__) + hwcaps = getauxval(AT_HWCAP); + #endif + if (!strcmp("isa_ce_sm3", dev_name) && (hwcaps & HWCAP_CE_SM3)) + return true; + + if (!strcmp("isa_ce_sm4", dev_name) && (hwcaps & HWCAP_CE_SM4)) + return true; + + return false; +} + static bool wd_alg_check_available(int calc_type, const char *dev_name) { bool ret = false; @@ -99,6 +118,7 @@ static bool wd_alg_check_available(int calc_type, const char *dev_name) break; /* Should find the CPU if not support CE */ case UADK_ALG_CE_INSTR: + ret = wd_check_ce_support(dev_name); break; /* Should find the CPU if not support SVE */ case UADK_ALG_SVE_INSTR: @@ -280,8 +300,13 @@ struct wd_alg_driver *wd_request_drv(const char *alg_name, bool hw_mask) struct wd_alg_driver *drv = NULL; int tmp_priority = -1; - if (!pnext || !alg_name) { - WD_ERR("invalid: request alg param is error!\n"); + if (!pnext) { + WD_ERR("invalid: requset drv pnext is NULL!\n"); + return NULL; + } + + if (!alg_name) { + WD_ERR("invalid: alg_name is NULL!\n"); return NULL; } @@ -289,7 +314,8 @@ struct wd_alg_driver *wd_request_drv(const char *alg_name, bool hw_mask) pthread_mutex_lock(&mutex); while (pnext) { /* hw_mask true mean not to used hardware dev */ - if (hw_mask && pnext->drv->calc_type == UADK_ALG_HW) { + if ((hw_mask && pnext->drv->calc_type == UADK_ALG_HW) || + (!hw_mask && pnext->drv->calc_type != UADK_ALG_HW)) { pnext = pnext->next; continue; } diff --git a/wd_digest.c b/wd_digest.c index acf341a..8c9a9b7 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -215,7 +215,7 @@ static void wd_digest_clear_status(void) } static int wd_digest_init_nolock(struct wd_ctx_config *config, - struct wd_sched *sched) + struct wd_sched *sched) { int ret; diff --git a/wd_sched.c b/wd_sched.c index 419280e..b43834d 100644 --- a/wd_sched.c +++ b/wd_sched.c @@ -453,7 +453,7 @@ static struct wd_sched sched_table[SCHED_POLICY_BUTT] = { .poll_policy = session_sched_poll_policy, }, { .name = "None scheduler", - .sched_policy = SCHED_POLICY_SINGLE, + .sched_policy = SCHED_POLICY_NONE, .sched_init = sched_none_init, .pick_next_ctx = sched_none_pick_next_ctx, .poll_policy = sched_none_poll_policy, diff --git a/wd_util.c b/wd_util.c index 6134239..39909ca 100644 --- a/wd_util.c +++ b/wd_util.c @@ -91,6 +91,11 @@ struct acc_alg_item { char *algtype; }; +struct wd_ce_ctx { + char *drv_name; + void *priv; +}; + static struct acc_alg_item alg_options[] = { {"zlib", "zlib"}, {"gzip", "gzip"}, @@ -229,7 +234,6 @@ int wd_init_ctx_config(struct wd_ctx_config_internal *in, ret = -WD_EINVAL; goto err_out; } - clone_ctx_to_internal(cfg->ctxs + i, ctxs + i); ret = pthread_spin_init(&ctxs[i].lock, PTHREAD_PROCESS_SHARED); if (ret) { @@ -2612,14 +2616,44 @@ out_freelist: return ret; } +static int wd_alg_ce_ctx_init(struct wd_init_attrs *attrs) +{ + struct wd_ctx_config *ctx_config = attrs->ctx_config; + + ctx_config->ctx_num = 1; + ctx_config->ctxs = calloc(ctx_config->ctx_num, sizeof(struct wd_ctx)); + if (!ctx_config->ctxs) { + return -WD_ENOMEM; + WD_ERR("failed to alloc ctxs!\n"); + } + ctx_config->ctxs[0].ctx = (handle_t)calloc(1, sizeof(struct wd_ce_ctx)); + + return WD_SUCCESS; +} + +static void wd_alg_ce_ctx_uninit(struct wd_ctx_config *ctx_config) +{ + __u32 i; + + for (i = 0; i < ctx_config->ctx_num; i++) { + if (ctx_config->ctxs[i].ctx) { + free((struct wd_ce_ctx *)ctx_config->ctxs[i].ctx); + ctx_config->ctxs[i].ctx = 0; + } + } + + free(ctx_config->ctxs); +} + static void wd_alg_ctx_uninit(struct wd_ctx_config *ctx_config) { __u32 i; - for (i = 0; i < ctx_config->ctx_num; i++) + for (i = 0; i < ctx_config->ctx_num; i++) { if (ctx_config->ctxs[i].ctx) { wd_release_ctx(ctx_config->ctxs[i].ctx); ctx_config->ctxs[i].ctx = 0; + } } free(ctx_config->ctxs); @@ -2633,9 +2667,9 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) struct wd_ctx_config *ctx_config = NULL; struct wd_sched *alg_sched = NULL; char alg_type[CRYPTO_MAX_ALG_NAME]; - char *alg = attrs->alg; int driver_type = UADK_ALG_HW; - int ret; + char *alg = attrs->alg; + int ret = 0; if (!attrs->ctx_params) return -WD_EINVAL; @@ -2646,22 +2680,37 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) switch (driver_type) { case UADK_ALG_SOFT: case UADK_ALG_CE_INSTR: - /* No need to alloc resource */ - if (sched_type != SCHED_POLICY_NONE) + /* No need to alloc resource */ + if (sched_type != SCHED_POLICY_NONE) { + WD_ERR("invalid sched_type\n"); return -WD_EINVAL; + } + + ctx_config = calloc(1, sizeof(*ctx_config)); + if (!ctx_config) { + WD_ERR("fail to alloc ctx config\n"); + return -WD_ENOMEM; + } + attrs->ctx_config = ctx_config; alg_sched = wd_sched_rr_alloc(SCHED_POLICY_NONE, 1, 1, alg_poll_func); if (!alg_sched) { WD_ERR("fail to alloc scheduler\n"); - return -WD_EINVAL; + goto out_ctx_config; } + attrs->sched = alg_sched; - ret = wd_sched_rr_instance(alg_sched, NULL); + ret = wd_alg_ce_ctx_init(attrs); if (ret) { - WD_ERR("fail to instance scheduler\n"); + WD_ERR("fail to init ce ctx\n"); goto out_freesched; } + + ret = alg_init_func(ctx_config, alg_sched); + if (ret) + goto out_pre_init; + break; case UADK_ALG_SVE_INSTR: /* Todo lock cpu core */ @@ -2720,7 +2769,10 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) return 0; out_pre_init: - wd_alg_ctx_uninit(ctx_config); + if (driver_type == UADK_ALG_CE_INSTR || driver_type == UADK_ALG_SOFT) + wd_alg_ce_ctx_uninit(ctx_config); + else + wd_alg_ctx_uninit(ctx_config); out_freesched: wd_sched_rr_release(alg_sched); out_ctx_config: @@ -2733,10 +2785,19 @@ void wd_alg_attrs_uninit(struct wd_init_attrs *attrs) { struct wd_ctx_config *ctx_config = attrs->ctx_config; struct wd_sched *alg_sched = attrs->sched; + int driver_type = attrs->driver->calc_type; - if (ctx_config) { - wd_alg_ctx_uninit(ctx_config); - free(ctx_config); + if (driver_type == UADK_ALG_CE_INSTR || driver_type == UADK_ALG_SOFT) { + if (ctx_config) { + wd_alg_ce_ctx_uninit(ctx_config); + free(ctx_config); + } + } else { + if (ctx_config) { + wd_alg_ctx_uninit(ctx_config); + free(ctx_config); + } } + wd_sched_rr_release(alg_sched); } -- 2.33.0

1 0

[PATCH 2/8] uadk/isa-ce: support sm3 ce instruction
by Zhiqi Song 30 Jan '24

30 Jan '24

Support sync sm3 ce instruction, users can use ce instruction to accelerate sm3 sync task through init2 related functions. This patch also includes: 1. Add compile parameter and related file to support isa-ce library. 2. Check whether the platform supports the CE instruction in alg driver register process. 3. Make HW driver and INSTR driver of the same alg can be requested at the same time. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- Makefile.am | 18 +- configure.ac | 3 + drv/isa_ce_sm3.c | 249 +++++++++++++ drv/isa_ce_sm3_armv8.S | 765 ++++++++++++++++++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++++++ include/drv/isa_ce_sm3.h | 66 ++++ include/wd_alg.h | 43 +++ wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 87 ++++- 11 files changed, 1446 insertions(+), 20 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h create mode 100644 include/drv/isa_ce_sm3.h diff --git a/Makefile.am b/Makefile.am index 25853eb..b267e9e 100644 --- a/Makefile.am +++ b/Makefile.am @@ -43,7 +43,8 @@ nobase_pkginclude_HEADERS = v1/wd.h v1/wd_cipher.h v1/wd_aead.h v1/uacce.h v1/wd lib_LTLIBRARIES=libwd.la libwd_comp.la libwd_crypto.la uadk_driversdir=$(libdir)/uadk -uadk_drivers_LTLIBRARIES=libhisi_sec.la libhisi_hpre.la libhisi_zip.la +uadk_drivers_LTLIBRARIES=libhisi_sec.la libhisi_hpre.la libhisi_zip.la \ + libisa_ce.la libwd_la_SOURCES=wd.c wd_mempool.c wd.h wd_alg.c wd_alg.h \ v1/wd.c v1/wd.h v1/wd_adapter.c v1/wd_adapter.h \ @@ -79,7 +80,8 @@ libwd_crypto_la_SOURCES=wd_cipher.c wd_cipher.h wd_cipher_drv.h \ wd_digest.c wd_digest.h wd_digest_drv.h \ wd_util.c wd_util.h \ wd_sched.c wd_sched.h \ - wd.c wd.h + wd.c wd.h \ + arm_arch_ce.h isa_ce_sm3.h libhisi_sec_la_SOURCES=drv/hisi_sec.c drv/hisi_qm_udrv.c \ lib/crypto/aes.c lib/crypto/galois.c \ @@ -87,6 +89,10 @@ libhisi_sec_la_SOURCES=drv/hisi_sec.c drv/hisi_qm_udrv.c \ libhisi_hpre_la_SOURCES=drv/hisi_hpre.c drv/hisi_qm_udrv.c \ hisi_qm_udrv.h + +libisa_ce_la_SOURCES=drv/isa_ce_sm3.c drv/isa_ce_sm3_armv8.S arm_arch_ce.h \ + drv/isa_ce_sm3.h + if WD_STATIC_DRV AM_CFLAGS += -DWD_STATIC_DRV -fPIC AM_CFLAGS += -DWD_NO_LOG @@ -106,6 +112,10 @@ libhisi_sec_la_DEPENDENCIES = libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) libhisi_hpre_la_DEPENDENCIES = libwd.la libwd_crypto.la + +libisa_ce_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) +libisa_ce_la_DEPENDENCIES = libwd.la libwd_crypto.la + else UADK_WD_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd.map UADK_CRYPTO_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_crypto.map @@ -134,6 +144,10 @@ libhisi_sec_la_DEPENDENCIES= libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD= -lwd -lwd_crypto libhisi_hpre_la_LDFLAGS=$(UADK_VERSION) libhisi_hpre_la_DEPENDENCIES= libwd.la libwd_crypto.la + +libisa_ce_la_LIBADD= -lwd -lwd_crypto +libisa_ce_la_LDFLAGS=$(UADK_VERSION) +libisa_ce_la_DEPENDENCIES= libwd.la libwd_crypto.la endif # WD_STATIC_DRV pkgconfigdir = $(libdir)/pkgconfig diff --git a/configure.ac b/configure.ac index b198417..4ed111e 100644 --- a/configure.ac +++ b/configure.ac @@ -21,6 +21,9 @@ LT_INIT AC_SUBST([hardcode_into_libs], [no]) AM_PROG_CC_C_O +# Support assembler +AM_PROG_AS + AC_ARG_ENABLE([debug-log], AS_HELP_STRING([--enable-debug-log], [enable debug logging globally]), [ AS_IF([test "x$enable_debug_log" = "xyes"], diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c new file mode 100644 index 0000000..d562730 --- /dev/null +++ b/drv/isa_ce_sm3.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: Apache-2.0 +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ +/* + * Copyright 2023 Huawei Technologies Co.,Ltd. All rights reserved. + */ + +#include <stdlib.h> +#include <sys/auxv.h> +#include <pthread.h> +#include "drv/wd_digest_drv.h" +#include "drv/isa_ce_sm3.h" +#include "wd_digest.h" +#include "wd_util.h" + +typedef void (sm3_ce_block_fn)(__u32 word_reg[SM3_STATE_WORDS], + const unsigned char *src, size_t blocks); + +static int sm3_ce_drv_init(void *conf, void *priv); +static void sm3_ce_drv_exit(void *priv); +static int sm3_ce_drv_send(handle_t ctx, void *digest_msg); +static int sm3_ce_drv_recv(handle_t ctx, void *digest_msg); +static int sm3_ce_get_usage(void *param); + +static struct wd_alg_driver sm3_ce_alg_driver = { + .drv_name = "isa_ce_sm3", + .alg_name = "sm3", + .calc_type = UADK_ALG_CE_INSTR, + .priority = 200, + .priv_size = sizeof(struct sm3_ce_drv_ctx), + .queue_num = 1, + .op_type_num = 1, + .fallback = 0, + .init = sm3_ce_drv_init, + .exit = sm3_ce_drv_exit, + .send = sm3_ce_drv_send, + .recv = sm3_ce_drv_recv, + .get_usage = sm3_ce_get_usage, +}; + +static void __attribute__((constructor)) sm3_ce_probe(void) +{ + int ret; + + WD_INFO("Info: register SM3 CE alg driver!\n"); + ret = wd_alg_driver_register(&sm3_ce_alg_driver); + if (ret && ret != WD_ENODEV) + WD_ERR("Error: register SM3 CE failed!\n"); +} + +static void __attribute__((destructor)) sm3_ce_remove(void) +{ + wd_alg_driver_unregister(&sm3_ce_alg_driver); +} + +static int sm3_ce_get_usage(void *param) +{ + return 0; +} + +static inline void sm3_ce_init(struct sm3_ce_ctx *sctx) +{ + memset(sctx, 0, sizeof(*sctx)); + + sctx->word_reg[0] = SM3_IVA; + sctx->word_reg[1] = SM3_IVB; + sctx->word_reg[2] = SM3_IVC; + sctx->word_reg[3] = SM3_IVD; + sctx->word_reg[4] = SM3_IVE; + sctx->word_reg[5] = SM3_IVF; + sctx->word_reg[6] = SM3_IVG; + sctx->word_reg[7] = SM3_IVH; +} + +static void sm3_ce_update(struct sm3_ce_ctx *sctx, const void *data, + size_t data_len, sm3_ce_block_fn *block_fn) +{ + size_t remain_data_len, blk_num; + + /* Get the data num that need compute currently */ + if (sctx->num) { + remain_data_len = SM3_BLOCK_SIZE - sctx->num; + /* If data_len does not enough a block size, then leave it to final */ + if (data_len < remain_data_len) { + memcpy(sctx->block + sctx->num, data, data_len); + sctx->num += data_len; + return; + } + + memcpy(sctx->block + sctx->num, data, remain_data_len); + block_fn(sctx->word_reg, sctx->block, 1); + sctx->nblocks++; + data += remain_data_len; + data_len -= remain_data_len; + } + + /* Group the filled msg by 512-bits (64-bytes) */ + blk_num = data_len / SM3_BLOCK_SIZE; + if (blk_num) { + block_fn(sctx->word_reg, data, blk_num); + sctx->nblocks += blk_num; + data += SM3_BLOCK_SIZE * blk_num; + data_len -= SM3_BLOCK_SIZE * blk_num; + } + + sctx->num = data_len; + if (data_len) + memcpy(sctx->block, data, data_len); +} + +static void sm3_ce_final(struct sm3_ce_ctx *sctx, __u8 *md, + sm3_ce_block_fn *block_fn) +{ + int i; + + /* Add padding */ + sctx->block[sctx->num] = 0x80; + + if (sctx->num <= SM3_BLOCK_SIZE - 9) { + memset(sctx->block + sctx->num + 1, 0, SM3_BLOCK_SIZE - sctx->num - 9); + } else { + memset(sctx->block + sctx->num + 1, 0, SM3_BLOCK_SIZE - sctx->num - 1); + block_fn(sctx->word_reg, sctx->block, 1); + memset(sctx->block, 0, SM3_BLOCK_SIZE - 8); + } + + /* + * Put the length of the message in bits into the last two words, to get + * the length in bits we need to multiply by 8 (or left shift 3). This left shifted + * value is put in the last word. Any bits shifted off the left edge need to be put in the + * penultimate word, we can work out which bits by shifting right the length by 29 bits. + */ + PUTU32(sctx->block + 56, sctx->nblocks >> 23); + PUTU32(sctx->block + 60, (sctx->nblocks << 9) + (sctx->num << 3)); + + block_fn(sctx->word_reg, sctx->block, 1); + for (i = 0; i < 8; i++) + PUTU32(md + i * 4, sctx->word_reg[i]); +} + +static int do_sm3_ce(const __u8 *data, size_t len, __u8 *out_digest) +{ + struct sm3_ce_ctx sctx = {0}; + int ret = 0; + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, data, len, sm3_ce_block_compress); + sm3_ce_final(&sctx, out_digest, sm3_ce_block_compress); + + if (!out_digest) { + WD_ERR("failed to get digest!\n"); + ret = -WD_EINVAL; + } + + memset(&sctx, 0, sizeof(struct sm3_ce_ctx)); + return ret; +} + +static int do_hmac_sm3_ce(const __u8 *key, size_t key_len, + const __u8 *data, size_t data_len, + __u8 *out_hmac) +{ + unsigned char key_buf[HMAC_BLOCK_SIZE] = {0}; + unsigned char ipad[HMAC_BLOCK_SIZE] = {0}; + unsigned char opad[HMAC_BLOCK_SIZE] = {0}; + unsigned char hash[SM3_DIGEST_SIZE] = {0}; + struct sm3_ce_ctx sctx = {0}; + unsigned int i; + + if (!key_len) { + WD_ERR("invalid hmac key_len!\n"); + return -WD_EINVAL; + } + + if (key_len > HMAC_BLOCK_SIZE) { + do_sm3_ce(key, key_len, key_buf); + key_len = SM3_DIGEST_SIZE; + key = key_buf; + } + + memset(ipad, 0x36, HMAC_BLOCK_SIZE); + memset(opad, 0x5c, HMAC_BLOCK_SIZE); + for (i = 0; i < key_len; i++) { + ipad[i] ^= key[i]; + opad[i] ^= key[i]; + } + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, ipad, HMAC_BLOCK_SIZE, sm3_ce_block_compress); + sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress); + sm3_ce_final(&sctx, hash, sm3_ce_block_compress); + + sm3_ce_init(&sctx); + sm3_ce_update(&sctx, opad, HMAC_BLOCK_SIZE, sm3_ce_block_compress); + sm3_ce_update(&sctx, hash, SM3_DIGEST_SIZE, sm3_ce_block_compress); + sm3_ce_final(&sctx, out_hmac, sm3_ce_block_compress); + + return WD_SUCCESS; +} + +static int sm3_ce_drv_send(handle_t ctx, void *digest_msg) +{ + struct wd_digest_msg *msg = (struct wd_digest_msg *)digest_msg; + __u8 *out_digest, *data, *key; + size_t data_size, key_len; + int ret; + + if (!msg) { + WD_ERR("invalid: digest_msg is NULL!\n"); + return -WD_EINVAL; + } + + data_size = msg->in_bytes; + out_digest = msg->out; + data = msg->in; + key = msg->key; + key_len = msg->key_bytes; + + if (msg->mode == WD_DIGEST_NORMAL) { + ret = do_sm3_ce(data, data_size, out_digest); + } else if (msg->mode == WD_DIGEST_HMAC) { + ret = do_hmac_sm3_ce(key, key_len, data, data_size, out_digest); + } else { + WD_ERR("invalid digest mode!\n"); + ret = -WD_EINVAL; + } + + return ret; +} + +static int sm3_ce_drv_recv(handle_t ctx, void *digest_msg) +{ + return WD_SUCCESS; +} + +static int sm3_ce_drv_init(void *conf, void *priv) +{ + return WD_SUCCESS; +} + +static void sm3_ce_drv_exit(void *priv) +{ +} diff --git a/drv/isa_ce_sm3_armv8.S b/drv/isa_ce_sm3_armv8.S new file mode 100644 index 0000000..3d08e2d --- /dev/null +++ b/drv/isa_ce_sm3_armv8.S @@ -0,0 +1,765 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ + +#include "../include/drv/arm_arch_ce.h" + +.arch armv8.2-a +.text +.globl sm3_ce_block_compress +.type sm3_ce_block_compress,%function +.align 5 +sm3_ce_block_compress: + AARCH64_VALID_CALL_TARGET +/* Loads state */ + /* + * Loads multiple single-element structures from memory(X0 register) and + * writes result to two SIMD&FP registers(v5.4s and v6.4s). + */ + ld1 {v5.4s,v6.4s}, [x0] /* 4s -- 4 * 32bit */ + /* + * Reverses the order of 32-bit(type:s) elements in each doubleword of the + * vector in the src SIMD&FP register(v5), places the result into a vector + * and writes the vector to the dst SIDM&FP register(v5). + */ + rev64 v5.4s, v5.4s + rev64 v6.4s, v6.4s + /* + * Extracts the lowest vector elements from the second src SIMD&FP register, + * and highest vector elements from the first source SIMD&FP register, + * concatenates the result into a vector, and writes the vector to the + * dst SIMD&FP register vector. #8 means the numbered byte element to be extracted. + * Format: ext <dst register>, <first src register>, <second src register>, <index> + * #imm: immediate data. + */ + ext v5.16b, v5.16b, v5.16b, #8 /* 16b -- 16 * 8bit */ + ext v6.16b, v6.16b, v6.16b, #8 + /* From PC-relative address adds an immediate value to form a PC-relative + * address, and writes the result to the dst register. + */ + adr x8, .Tj /* 'Tj' is the constant defined in SM3 protocol */ + /* Loads pair of register calculates an address from a base register value + * and an immediate offset, loads two 32-bit words from memory, and writes + * them to two registers. */ + ldp s16, s17, [x8] /* 'sn' is the scalar register, 'vn' is the vector register */ + +.Loop: +/* Loads input */ + /* + * Loads multipule single-element structrue to four registers. + * #64 is the immediate offset variant, it is the post-index immediate offset. + * Loads the input src data, msg to be hashed. + */ + ld1 {v0.16b,v1.16b,v2.16b,v3.16b}, [x1], #64 + /* + * Substracts an optionally-shifted immediate value from a register value, + * and writes the result to the dst register. + */ + sub w2, w2, #1 + + /* Copies the value in a src register to the dst register. */ + mov v18.16b, v5.16b + mov v19.16b, v6.16b + +#ifndef __ARMEB__ + rev32 v0.16b, v0.16b + rev32 v1.16b, v1.16b + rev32 v2.16b, v2.16b + rev32 v3.16b, v3.16b +#endif + + ext v20.16b, v16.16b, v16.16b, #4 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bae6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v2.16b, v4.16b, v0.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v3.16b, v4.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v0.16b, v1.16b, #8 + /* sm3partw1 v2.4s, v3.4s, v1.4s */ +.inst 0xce61c062 + /* sm3partw2 v2.4s, v23.4s, v22.4s */ +.inst 0xce76c6e2 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5682e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5692e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ae6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a2e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aae6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1a v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b2e5 + /* sm3tt2a v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bae6 + ext v20.16b, v17.16b, v17.16b, #4 + /* s4 = w7 | w8 | w9 | w10 */ + ext v3.16b, v0.16b, v1.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v4.16b, v0.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v1.16b, v2.16b, #8 + /* sm3partw1 v3.4s, v4.4s, v2.4s */ +.inst 0xce62c083 + /* sm3partw2 v3.4s, v23.4s, v22.4s */ +.inst 0xce76c6e3 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v2.16b, v4.16b, v0.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v3.16b, v4.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v0.16b, v1.16b, #8 + /* sm3partw1 v2.4s, v3.4s, v1.4s */ +.inst 0xce61c062 + /* sm3partw2 v2.4s, v23.4s, v22.4s */ +.inst 0xce76c6e2 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v3.16b, v0.16b, v1.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v4.16b, v0.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v1.16b, v2.16b, #8 + /* sm3partw1 v3.4s, v4.4s, v2.4s */ +.inst 0xce62c083 + /* sm3partw2 v3.4s, v23.4s, v22.4s */ +.inst 0xce76c6e3 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v4.16b, v1.16b, v2.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v0.16b, v1.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v2.16b, v3.16b, #8 + /* sm3partw1 v4.4s, v0.4s, v3.4s */ +.inst 0xce63c004 + /* sm3partw2 v4.4s, v23.4s, v22.4s */ +.inst 0xce76c6e4 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v0.16b, v2.16b, v3.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v1.16b, v2.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v3.16b, v4.16b, #8 + /* sm3partw1 v0.4s, v1.4s, v4.4s */ +.inst 0xce64c020 + /* sm3partw2 v0.4s, v23.4s, v22.4s */ +.inst 0xce76c6e0 + eor v22.16b, v1.16b, v2.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[0] */ +.inst 0xce418ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[1] */ +.inst 0xce419ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[2] */ +.inst 0xce41aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v1.4s[3] */ +.inst 0xce41bee6 + /* s4 = w7 | w8 | w9 | w10 */ + ext v1.16b, v3.16b, v4.16b, #12 + /* vtmp1 = w3 | w4 | w5 | w6 */ + ext v22.16b, v2.16b, v3.16b, #12 + /* vtmp2 = w10 | w11 | w12 | w13 */ + ext v23.16b, v4.16b, v0.16b, #8 + /* sm3partw1 v1.4s, v2.4s, v0.4s */ +.inst 0xce60c041 + /* sm3partw2 v1.4s, v23.4s, v22.4s */ +.inst 0xce76c6e1 + eor v22.16b, v2.16b, v3.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[0] */ +.inst 0xce428ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[1] */ +.inst 0xce429ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[2] */ +.inst 0xce42aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v2.4s[3] */ +.inst 0xce42bee6 + eor v22.16b, v3.16b, v4.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[0] */ +.inst 0xce438ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[1] */ +.inst 0xce439ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[2] */ +.inst 0xce43aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v3.4s[3] */ +.inst 0xce43bee6 + eor v22.16b, v4.16b, v0.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[0] */ +.inst 0xce448ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[1] */ +.inst 0xce449ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[2] */ +.inst 0xce44aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v4.4s[3] */ +.inst 0xce44bee6 + eor v22.16b, v0.16b, v1.16b + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[0] */ +.inst 0xce5686e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[0] */ +.inst 0xce408ee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[1] */ +.inst 0xce5696e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[1] */ +.inst 0xce409ee6 + /* sm3ss1 v23.4s, v5.4s, v20.4s, v6.4s */ +.inst 0xce5418b7 + shl v21.4s, v20.4s, #1 + sri v21.4s, v20.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[2] */ +.inst 0xce56a6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[2] */ +.inst 0xce40aee6 + /* sm3ss1 v23.4s, v5.4s, v21.4s, v6.4s */ +.inst 0xce5518b7 + shl v20.4s, v21.4s, #1 + sri v20.4s, v21.4s, #31 + /* sm3tt1b v5.4s, v23.4s, v22.4s[3] */ +.inst 0xce56b6e5 + /* sm3tt2b v6.4s, v23.4s, v0.4s[3] */ +.inst 0xce40bee6 + eor v5.16b, v5.16b, v18.16b + eor v6.16b, v6.16b, v19.16b + /* + * cbnz: compare and branch on Nonzero, compares the value in a register + * with zero, and conditionally branches to a label at a PC-relative offset + * if the comparison is not equal. + * 'w2' is the 32-bit name of the general-purpose register to be tested. + * '.Loop' is the program label to be conditionally branched to. + */ + cbnz w2, .Loop + + /* save state, it is the result of one cycle */ + rev64 v5.4s, v5.4s + rev64 v6.4s, v6.4s + ext v5.16b, v5.16b, v5.16b, #8 + ext v6.16b, v6.16b, v6.16b, #8 + st1 {v5.4s,v6.4s}, [x0] + ret +.size sm3_ce_block_compress,.-sm3_ce_block_compress + +.align 3 +.Tj: +/* + * Inserts a list of 32-bit values as data into the assembly. + * In SM3 protocol: + * when 0 <= j <= 15, Tj = 0x79cc4519, + * when 16 <= j <= 63, Tj = 0x9d8a7a87. + */ +.word 0x79cc4519, 0x9d8a7a87 diff --git a/include/drv/arm_arch_ce.h b/include/drv/arm_arch_ce.h new file mode 100644 index 0000000..cad6e33 --- /dev/null +++ b/include/drv/arm_arch_ce.h @@ -0,0 +1,199 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* + * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved. + * + * Licensed under the Apache License 2.0 (the "License"). You may not use + * this file except in compliance with the License. You can obtain a copy + * in the file LICENSE in the source distribution or at + * https://www.openssl.org/source/license.html + */ + +#ifndef __ARM_ARCH_CE_H +#define __ARM_ARCH_CE_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if !defined(__ARM_ARCH__) +# if defined(__CC_ARM) +# define __ARM_ARCH__ __TARGET_ARCH_ARM +# if defined(__BIG_ENDIAN) +# define __ARMEB__ +# else +# define __ARMEL__ +# endif +# elif defined(__GNUC__) +# if defined(__aarch64__) +# define __ARM_ARCH__ 8 + /* + * GCC does not define __ARM_ARCH__, instead it defines + * bunch of below macros. See all_architectures[] table in + * gcc/config/arm/arm.c. + */ +# elif defined(__ARM_ARCH) +# define __ARM_ARCH__ __ARM_ARCH +# elif defined(__ARM_ARCH_8A__) +# define __ARM_ARCH__ 8 +# elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \ + defined(__ARM_ARCH_7EM__) +# define __ARM_ARCH__ 7 +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ + defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6M__) || \ + defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) || \ + defined(__ARM_ARCH_6T2__) +# define __ARM_ARCH__ 6 +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || \ + defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_5TEJ__) +# define __ARM_ARCH__ 5 +# elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) +# define __ARM_ARCH__ 4 +# else +# error "unsupported ARM architecture" +# endif +# endif +#endif + +#if !defined(__ARM_MAX_ARCH__) +# define __ARM_MAX_ARCH__ __ARM_ARCH__ +#endif + +#if __ARM_MAX_ARCH__ < __ARM_ARCH__ +# error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__" +#elif __ARM_MAX_ARCH__ != __ARM_ARCH__ +# if __ARM_ARCH__ < 7 && __ARM_MAX_ARCH__ >= 7 && defined(__ARMEB__) +# error "can't build universal big-endian binary" +# endif +#endif + +#ifndef __ASSEMBLER__ +extern unsigned int ARMCAP_P; +extern unsigned int ARM_MIDR; +#endif + +#define ARMV7_NEON (1<<0) +#define ARMV7_TICK (1<<1) +#define ARMV8_AES (1<<2) +#define ARMV8_SHA1 (1<<3) +#define ARMV8_SHA256 (1<<4) +#define ARMV8_PMULL (1<<5) +#define ARMV8_SHA512 (1<<6) +#define ARMV8_CPUID (1<<7) +#define ARMV8_RNG (1<<8) +#define ARMV8_SM3 (1<<9) +#define ARMV8_SM4 (1<<10) +#define ARMV8_SHA3 (1<<11) +#define ARMV8_UNROLL8_EOR3 (1<<12) +#define ARMV8_SVE (1<<13) +#define ARMV8_SVE2 (1<<14) + +/* + * MIDR_EL1 system register + * + * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0 + * | | | | | | | + * |RES0 | Implementer | Variant | Arch | PartNum |Revision| + * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________| + * + */ + +#define ARM_CPU_IMP_ARM 0x41 +#define HISI_CPU_IMP 0x48 + +#define ARM_CPU_PART_CORTEX_A72 0xD08 +#define ARM_CPU_PART_N1 0xD0C +#define ARM_CPU_PART_V1 0xD40 +#define ARM_CPU_PART_N2 0xD49 +#define HISI_CPU_PART_KP920 0xD01 + +#define MIDR_PARTNUM_SHIFT 4 +#define MIDR_PARTNUM_MASK (0xfffU << MIDR_PARTNUM_SHIFT) +#define MIDR_PARTNUM(midr) \ + (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) + +#define MIDR_IMPLEMENTER_SHIFT 24 +#define MIDR_IMPLEMENTER_MASK (0xffU << MIDR_IMPLEMENTER_SHIFT) +#define MIDR_IMPLEMENTER(midr) \ + (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT) + +#define MIDR_ARCHITECTURE_SHIFT 16 +#define MIDR_ARCHITECTURE_MASK (0xfU << MIDR_ARCHITECTURE_SHIFT) +#define MIDR_ARCHITECTURE(midr) \ + (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT) + +#define MIDR_CPU_MODEL_MASK \ + (MIDR_IMPLEMENTER_MASK | \ + MIDR_PARTNUM_MASK | \ + MIDR_ARCHITECTURE_MASK) + +#define MIDR_CPU_MODEL(imp, partnum) \ + (((imp) << MIDR_IMPLEMENTER_SHIFT) | \ + (0xfU << MIDR_ARCHITECTURE_SHIFT) | \ + ((partnum) << MIDR_PARTNUM_SHIFT)) + +#define MIDR_IS_CPU_MODEL(midr, imp, partnum) \ + (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum)) + +#if defined(__ASSEMBLER__) + /* + * Support macros for + * - Armv8.3-A Pointer Authentication and + * - Armv8.5-A Branch Target Identification + * features which require emitting a .note.gnu.property section with the + * appropriate architecture-dependent feature bits set. + * Read more: "ELF for the Arm�� 64-bit Architecture" + */ +# if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1 +# define GNU_PROPERTY_AARCH64_BTI (1 << 0) /* Has Branch Target Identification */ +# define AARCH64_VALID_CALL_TARGET hint #34 /* BTI 'c' */ +# else +# define GNU_PROPERTY_AARCH64_BTI 0 /* No Branch Target Identification */ +# define AARCH64_VALID_CALL_TARGET +# endif + +# if defined(__ARM_FEATURE_PAC_DEFAULT) && \ + (__ARM_FEATURE_PAC_DEFAULT & 1) == 1 /* Signed with A-key */ +# define GNU_PROPERTY_AARCH64_POINTER_AUTH (1 << 1) /* Has Pointer Authentication */ +# define AARCH64_SIGN_LINK_REGISTER hint #25 /* PACIASP */ +# define AARCH64_VALIDATE_LINK_REGISTER hint #29 /* AUTIASP */ +# elif defined(__ARM_FEATURE_PAC_DEFAULT) && \ + (__ARM_FEATURE_PAC_DEFAULT & 2) == 2 /* Signed with B-key */ +# define GNU_PROPERTY_AARCH64_POINTER_AUTH (1 << 1) /* Has Pointer Authentication */ +# define AARCH64_SIGN_LINK_REGISTER hint #27 /* PACIBSP */ +# define AARCH64_VALIDATE_LINK_REGISTER hint #31 /* AUTIBSP */ +# else +# define GNU_PROPERTY_AARCH64_POINTER_AUTH 0 /* No Pointer Authentication */ +# if GNU_PROPERTY_AARCH64_BTI != 0 +# define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET +# else +# define AARCH64_SIGN_LINK_REGISTER +# endif +# define AARCH64_VALIDATE_LINK_REGISTER +# endif + +# if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0 + .pushsection .note.gnu.property, "a"; + .balign 8; + .long 4; + .long 0x10; + .long 0x5; + .asciz "GNU"; + .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */ + .long 4; + .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI); + .long 0; + .popsection; +# endif + +#endif /* defined __ASSEMBLER__ */ + +#define IS_CPU_SUPPORT_UNROLL8_EOR3() \ + (ARMCAP_P & ARMV8_UNROLL8_EOR3) + +#ifdef __cplusplus +} +#endif + +#endif /* __ARM_ARCH_CE_H */ diff --git a/include/drv/isa_ce_sm3.h b/include/drv/isa_ce_sm3.h new file mode 100644 index 0000000..d08c72f --- /dev/null +++ b/include/drv/isa_ce_sm3.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: Apache-2.0 */ +/* Copyright 2020-2021 Huawei Technologies Co.,Ltd. All rights reserved. */ +#ifndef __ISA_CE_SM3_H +#define __ISA_CE_SM3_H + +#include "../wd_alg_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define SM3_DIGEST_SIZE 32 +#define SM3_BLOCK_SIZE 64 +#define SM3_STATE_WORDS 8 +#define HMAC_BLOCK_SIZE 64 + +#define SM3_IVA 0x7380166f +#define SM3_IVB 0x4914b2b9 +#define SM3_IVC 0x172442d7 +#define SM3_IVD 0xda8a0600 +#define SM3_IVE 0xa96f30bc +#define SM3_IVF 0x163138aa +#define SM3_IVG 0xe38dee4d +#define SM3_IVH 0xb0fb0e4e + +#define PUTU32(p, V) \ + ((p)[0] = (uint8_t)((V) >> 24), \ + (p)[1] = (uint8_t)((V) >> 16), \ + (p)[2] = (uint8_t)((V) >> 8), \ + (p)[3] = (uint8_t)(V)) + +struct sm3_ce_ctx { + /* + * Use an array to represent the eight 32-bits word registers, + * SM3_IVA, SM3_IVB, ..., SM3_IVH, save IV and the final digest. + */ + __u32 word_reg[SM3_STATE_WORDS]; + /* + * The length (in bits) of all the msg fragments, the length of the + * whole msg should less than 2^64 bit, a msg block is 512-bits, + * make a 64-bits number in two parts, low 32-bits - 'Nl' and + * high 32-bits - 'Nh'. + */ + __u64 nblocks; + /* + * Message block, a msg block is 512-bits, use sixteen __u32 type + * element to store it, used in B(i) = W0||W1||W2||...||W15. + * Use a __u8 array to replace the 32-bit array. + */ + __u8 block[SM3_BLOCK_SIZE]; + /* The number of msg that need to compute in current cycle or turn. */ + size_t num; +}; + +struct sm3_ce_drv_ctx { + struct wd_ctx_config_internal config; +}; + +void sm3_ce_block_compress(__u32 word_reg[SM3_STATE_WORDS], + const unsigned char *src, size_t blocks); + +#ifdef __cplusplus +} +#endif + +#endif /* __ISA_CE_SM3_H */ diff --git a/include/wd_alg.h b/include/wd_alg.h index f8b136e..861b7d9 100644 --- a/include/wd_alg.h +++ b/include/wd_alg.h @@ -19,6 +19,49 @@ extern "C" { #define ALG_NAME_SIZE 128 #define DEV_NAME_LEN 128 +/* + * Macros related to arm platform: + * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas + * AArch64 used AT_HWCAP. + */ +#ifndef AT_HWCAP +# define AT_HWCAP 16 +#endif + +#ifndef AT_HWCAP2 +# define AT_HWCAP2 26 +#endif + +#if defined(__arm__) || defined(__arm) +# define HWCAP AT_HWCAP +# define HWCAP_NEON (1 << 12) + +# define HWCAP_CE AT_HWCAP2 +# define HWCAP_CE_AES (1 << 0) +# define HWCAP_CE_PMULL (1 << 1) +# define HWCAP_CE_SHA1 (1 << 2) +# define HWCAP_CE_SHA256 (1 << 3) +#elif defined(__aarch64__) +# define HWCAP AT_HWCAP +# define HWCAP_NEON (1 << 1) + +# define HWCAP_CE HWCAP +# define HWCAP_CE_AES (1 << 3) +# define HWCAP_CE_PMULL (1 << 4) +# define HWCAP_CE_SHA1 (1 << 5) +# define HWCAP_CE_SHA256 (1 << 6) +# define HWCAP_CPUID (1 << 11) +# define HWCAP_SHA3 (1 << 17) +# define HWCAP_CE_SM3 (1 << 18) +# define HWCAP_CE_SM4 (1 << 19) +# define HWCAP_CE_SHA512 (1 << 21) +# define HWCAP_SVE (1 << 22) +/* AT_HWCAP2 */ +# define HWCAP2 26 +# define HWCAP2_SVE2 (1 << 1) +# define HWCAP2_RNG (1 << 16) +#endif + enum alg_dev_type { UADK_ALG_SOFT = 0x0, UADK_ALG_CE_INSTR = 0x1, diff --git a/wd_alg.c b/wd_alg.c index 3b111c8..f34a407 100644 --- a/wd_alg.c +++ b/wd_alg.c @@ -9,6 +9,7 @@ #include <stdbool.h> #include <stdlib.h> #include <pthread.h> +#include <sys/auxv.h> #include "wd.h" #include "wd_alg.h" @@ -90,6 +91,24 @@ static bool wd_check_accel_dev(const char *dev_name) return false; } +static bool wd_check_ce_support(const char *dev_name) +{ + unsigned long hwcaps = 0; + + #if defined(__arm__) || defined(__arm) + hwcaps = getauxval(AT_HWCAP2); + #elif defined(__aarch64__) + hwcaps = getauxval(AT_HWCAP); + #endif + if (!strcmp("isa_ce_sm3", dev_name) && (hwcaps & HWCAP_CE_SM3)) + return true; + + if (!strcmp("isa_ce_sm4", dev_name) && (hwcaps & HWCAP_CE_SM4)) + return true; + + return false; +} + static bool wd_alg_check_available(int calc_type, const char *dev_name) { bool ret = false; @@ -99,6 +118,7 @@ static bool wd_alg_check_available(int calc_type, const char *dev_name) break; /* Should find the CPU if not support CE */ case UADK_ALG_CE_INSTR: + ret = wd_check_ce_support(dev_name); break; /* Should find the CPU if not support SVE */ case UADK_ALG_SVE_INSTR: @@ -280,8 +300,13 @@ struct wd_alg_driver *wd_request_drv(const char *alg_name, bool hw_mask) struct wd_alg_driver *drv = NULL; int tmp_priority = -1; - if (!pnext || !alg_name) { - WD_ERR("invalid: request alg param is error!\n"); + if (!pnext) { + WD_ERR("invalid: requset drv pnext is NULL!\n"); + return NULL; + } + + if (!alg_name) { + WD_ERR("invalid: alg_name is NULL!\n"); return NULL; } @@ -289,7 +314,8 @@ struct wd_alg_driver *wd_request_drv(const char *alg_name, bool hw_mask) pthread_mutex_lock(&mutex); while (pnext) { /* hw_mask true mean not to used hardware dev */ - if (hw_mask && pnext->drv->calc_type == UADK_ALG_HW) { + if ((hw_mask && pnext->drv->calc_type == UADK_ALG_HW) || + (!hw_mask && pnext->drv->calc_type != UADK_ALG_HW)) { pnext = pnext->next; continue; } diff --git a/wd_digest.c b/wd_digest.c index acf341a..8c9a9b7 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -215,7 +215,7 @@ static void wd_digest_clear_status(void) } static int wd_digest_init_nolock(struct wd_ctx_config *config, - struct wd_sched *sched) + struct wd_sched *sched) { int ret; diff --git a/wd_sched.c b/wd_sched.c index 419280e..b43834d 100644 --- a/wd_sched.c +++ b/wd_sched.c @@ -453,7 +453,7 @@ static struct wd_sched sched_table[SCHED_POLICY_BUTT] = { .poll_policy = session_sched_poll_policy, }, { .name = "None scheduler", - .sched_policy = SCHED_POLICY_SINGLE, + .sched_policy = SCHED_POLICY_NONE, .sched_init = sched_none_init, .pick_next_ctx = sched_none_pick_next_ctx, .poll_policy = sched_none_poll_policy, diff --git a/wd_util.c b/wd_util.c index 6134239..39909ca 100644 --- a/wd_util.c +++ b/wd_util.c @@ -91,6 +91,11 @@ struct acc_alg_item { char *algtype; }; +struct wd_ce_ctx { + char *drv_name; + void *priv; +}; + static struct acc_alg_item alg_options[] = { {"zlib", "zlib"}, {"gzip", "gzip"}, @@ -229,7 +234,6 @@ int wd_init_ctx_config(struct wd_ctx_config_internal *in, ret = -WD_EINVAL; goto err_out; } - clone_ctx_to_internal(cfg->ctxs + i, ctxs + i); ret = pthread_spin_init(&ctxs[i].lock, PTHREAD_PROCESS_SHARED); if (ret) { @@ -2612,14 +2616,44 @@ out_freelist: return ret; } +static int wd_alg_ce_ctx_init(struct wd_init_attrs *attrs) +{ + struct wd_ctx_config *ctx_config = attrs->ctx_config; + + ctx_config->ctx_num = 1; + ctx_config->ctxs = calloc(ctx_config->ctx_num, sizeof(struct wd_ctx)); + if (!ctx_config->ctxs) { + return -WD_ENOMEM; + WD_ERR("failed to alloc ctxs!\n"); + } + ctx_config->ctxs[0].ctx = (handle_t)calloc(1, sizeof(struct wd_ce_ctx)); + + return WD_SUCCESS; +} + +static void wd_alg_ce_ctx_uninit(struct wd_ctx_config *ctx_config) +{ + __u32 i; + + for (i = 0; i < ctx_config->ctx_num; i++) { + if (ctx_config->ctxs[i].ctx) { + free((struct wd_ce_ctx *)ctx_config->ctxs[i].ctx); + ctx_config->ctxs[i].ctx = 0; + } + } + + free(ctx_config->ctxs); +} + static void wd_alg_ctx_uninit(struct wd_ctx_config *ctx_config) { __u32 i; - for (i = 0; i < ctx_config->ctx_num; i++) + for (i = 0; i < ctx_config->ctx_num; i++) { if (ctx_config->ctxs[i].ctx) { wd_release_ctx(ctx_config->ctxs[i].ctx); ctx_config->ctxs[i].ctx = 0; + } } free(ctx_config->ctxs); @@ -2633,9 +2667,9 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) struct wd_ctx_config *ctx_config = NULL; struct wd_sched *alg_sched = NULL; char alg_type[CRYPTO_MAX_ALG_NAME]; - char *alg = attrs->alg; int driver_type = UADK_ALG_HW; - int ret; + char *alg = attrs->alg; + int ret = 0; if (!attrs->ctx_params) return -WD_EINVAL; @@ -2646,22 +2680,37 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) switch (driver_type) { case UADK_ALG_SOFT: case UADK_ALG_CE_INSTR: - /* No need to alloc resource */ - if (sched_type != SCHED_POLICY_NONE) + /* No need to alloc resource */ + if (sched_type != SCHED_POLICY_NONE) { + WD_ERR("invalid sched_type\n"); return -WD_EINVAL; + } + + ctx_config = calloc(1, sizeof(*ctx_config)); + if (!ctx_config) { + WD_ERR("fail to alloc ctx config\n"); + return -WD_ENOMEM; + } + attrs->ctx_config = ctx_config; alg_sched = wd_sched_rr_alloc(SCHED_POLICY_NONE, 1, 1, alg_poll_func); if (!alg_sched) { WD_ERR("fail to alloc scheduler\n"); - return -WD_EINVAL; + goto out_ctx_config; } + attrs->sched = alg_sched; - ret = wd_sched_rr_instance(alg_sched, NULL); + ret = wd_alg_ce_ctx_init(attrs); if (ret) { - WD_ERR("fail to instance scheduler\n"); + WD_ERR("fail to init ce ctx\n"); goto out_freesched; } + + ret = alg_init_func(ctx_config, alg_sched); + if (ret) + goto out_pre_init; + break; case UADK_ALG_SVE_INSTR: /* Todo lock cpu core */ @@ -2720,7 +2769,10 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs) return 0; out_pre_init: - wd_alg_ctx_uninit(ctx_config); + if (driver_type == UADK_ALG_CE_INSTR || driver_type == UADK_ALG_SOFT) + wd_alg_ce_ctx_uninit(ctx_config); + else + wd_alg_ctx_uninit(ctx_config); out_freesched: wd_sched_rr_release(alg_sched); out_ctx_config: @@ -2733,10 +2785,19 @@ void wd_alg_attrs_uninit(struct wd_init_attrs *attrs) { struct wd_ctx_config *ctx_config = attrs->ctx_config; struct wd_sched *alg_sched = attrs->sched; + int driver_type = attrs->driver->calc_type; - if (ctx_config) { - wd_alg_ctx_uninit(ctx_config); - free(ctx_config); + if (driver_type == UADK_ALG_CE_INSTR || driver_type == UADK_ALG_SOFT) { + if (ctx_config) { + wd_alg_ce_ctx_uninit(ctx_config); + free(ctx_config); + } + } else { + if (ctx_config) { + wd_alg_ctx_uninit(ctx_config); + free(ctx_config); + } } + wd_sched_rr_release(alg_sched); } -- 2.33.0

1 0

[PATCH 0/8] Support SM3 CE instruction
by Zhiqi Song 30 Jan '24

30 Jan '24

This set of patches is mainly used to support the SM3 CE instruction and public part of CE instruction. Zhiqi Song (8): uadk: remove redundant header file in makefile uadk/isa-ce: support sm3 ce instruction uadk_tool: support sm3 ce benchmark and function test uadk/isa-ce: support sm3 ce stream mode uadk/isa-ce: fix return value of sm3 ce uadk/isa_ce: cleanup of parameter type and return value uadk: fix control range of environmemt variable uadk/util: use default sched_type for instruction task Makefile.am | 20 +- configure.ac | 3 + drv/isa_ce_sm3.c | 387 ++++++++++++ drv/isa_ce_sm3.h | 86 +++ drv/isa_ce_sm3_armv8.S | 765 +++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++ include/wd_alg.h | 43 ++ include/wd_sched.h | 2 +- uadk_tool/Makefile.am | 1 + uadk_tool/benchmark/sec_uadk_benchmark.c | 22 +- uadk_tool/benchmark/uadk_benchmark.c | 29 +- uadk_tool/benchmark/uadk_benchmark.h | 1 + uadk_tool/test/test_sec.c | 35 +- wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 92 ++- 17 files changed, 1674 insertions(+), 47 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3.h create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h -- 2.33.0

1 8

[PATCH 0/8] Support SM3 CE instruction
by Zhiqi Song 29 Jan '24

29 Jan '24

This set of patches is mainly used to support the SM3 CE instruction and public part of CE instruction. Zhiqi Song (8): uadk: remove redundant header file in makefile uadk/isa-ce: support sm3 ce instruction uadk_tool: support sm3 ce benchmark and function test uadk/isa-ce: support sm3 ce stream mode uadk/isa-ce: fix return value of sm3 ce uadk/isa_ce: cleanup of parameter type and return value uadk: fix control range of environmemt variable uadk/util: use default sched_type for instruction task Makefile.am | 20 +- configure.ac | 3 + drv/isa_ce_sm3.c | 387 ++++++++++++ drv/isa_ce_sm3.h | 86 +++ drv/isa_ce_sm3_armv8.S | 765 +++++++++++++++++++++++ include/drv/arm_arch_ce.h | 199 ++++++ include/wd_alg.h | 43 ++ include/wd_sched.h | 2 +- uadk_tool/Makefile.am | 1 + uadk_tool/benchmark/sec_uadk_benchmark.c | 22 +- uadk_tool/benchmark/uadk_benchmark.c | 29 +- uadk_tool/benchmark/uadk_benchmark.h | 1 + uadk_tool/test/test_sec.c | 35 +- wd_alg.c | 32 +- wd_digest.c | 2 +- wd_sched.c | 2 +- wd_util.c | 92 ++- 17 files changed, 1674 insertions(+), 47 deletions(-) create mode 100644 drv/isa_ce_sm3.c create mode 100644 drv/isa_ce_sm3.h create mode 100644 drv/isa_ce_sm3_armv8.S create mode 100644 include/drv/arm_arch_ce.h -- 2.33.0

1 8

AccLib SIG 例会
by openEuler conference 23 Jan '24

23 Jan '24

您好！ sig-AccLib 邀请您参加 2024-01-24 11:00 召开的Zoom会议会议主题：AccLib SIG 例会会议内容：固定会议链接 linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/84501895774?pwd=YFcjVsDkjrgrBOxAsOTL4kxWVrijik.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! sig-AccLib invites you to attend the Zoom conference will be held at 2024-01-24 11:00, The subject of the conference is AccLib SIG 例会, Summary: 固定会议链接 linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/84501895774?pwd=YFcjVsDkjrgrBOxAsOTL4kxWVrijik.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. More information: https://www.openeuler.org/en/

1 0

[PATCH] crypto: hisilicon - Fix smp_processor_id() warnings
by Wenkai Lin 19 Jan '24

19 Jan '24

Switch to raw_smp_processor_id() to prevent a number of warnings from kernel debugging. We do not care about preemption here, as the CPU number is only used as a poor mans load balancing or device selection. If preemption happens during an encrypt/decrypt operation a small performance hit will occur but everything will continue to work, so just ignore it. This commit is similar to e7a9b05ca4 ("crypto: cavium - Fix smp_processor_id() warnings"). [ 7538.874350] BUG: using smp_processor_id() in preemptible [00000000] code: af_alg06/8438 [ 7538.874368] caller is debug_smp_processor_id+0x1c/0x28 [ 7538.874373] CPU: 50 PID: 8438 Comm: af_alg06 Kdump: loaded Not tainted 5.10.0.pc+ #18 [ 7538.874377] Call trace: [ 7538.874387] dump_backtrace+0x0/0x210 [ 7538.874389] show_stack+0x2c/0x38 [ 7538.874392] dump_stack+0x110/0x164 [ 7538.874394] check_preemption_disabled+0xf4/0x108 [ 7538.874396] debug_smp_processor_id+0x1c/0x28 [ 7538.874406] sec_create_qps+0x24/0xe8 [hisi_sec2] [ 7538.874408] sec_ctx_base_init+0x20/0x4d8 [hisi_sec2] [ 7538.874411] sec_aead_ctx_init+0x68/0x180 [hisi_sec2] [ 7538.874413] sec_aead_sha256_ctx_init+0x28/0x38 [hisi_sec2] [ 7538.874421] crypto_aead_init_tfm+0x54/0x68 [ 7538.874423] crypto_create_tfm_node+0x6c/0x110 [ 7538.874424] crypto_alloc_tfm_node+0x74/0x288 [ 7538.874426] crypto_alloc_aead+0x40/0x50 [ 7538.874431] aead_bind+0x50/0xd0 [ 7538.874433] alg_bind+0x94/0x148 [ 7538.874439] __sys_bind+0x98/0x118 [ 7538.874441] __arm64_sys_bind+0x28/0x38 [ 7538.874445] do_el0_svc+0x88/0x258 [ 7538.874447] el0_svc+0x1c/0x28 [ 7538.874449] el0_sync_handler+0x8c/0xb8 [ 7538.874452] el0_sync+0x148/0x180 Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +- drivers/crypto/hisilicon/sec2/sec_main.c | 2 +- drivers/crypto/hisilicon/zip/zip_main.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 56777099e..340592c6b 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -472,7 +472,7 @@ static inline int hpre_cluster_core_mask(struct hisi_qm *qm) struct hisi_qp *hpre_create_qp(u8 type) { - int node = cpu_to_node(smp_processor_id()); + int node = cpu_to_node(raw_smp_processor_id()); struct hisi_qp *qp = NULL; int ret; diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c index 0e56a47eb..eaf3fc6d8 100644 --- a/drivers/crypto/hisilicon/sec2/sec_main.c +++ b/drivers/crypto/hisilicon/sec2/sec_main.c @@ -373,7 +373,7 @@ void sec_destroy_qps(struct hisi_qp **qps, int qp_num) struct hisi_qp **sec_create_qps(void) { - int node = cpu_to_node(smp_processor_id()); + int node = cpu_to_node(raw_smp_processor_id()); u32 ctx_num = ctx_q_num; struct hisi_qp **qps; int ret; diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index db4c964cd..9e35d6432 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -401,7 +401,7 @@ MODULE_DEVICE_TABLE(pci, hisi_zip_dev_ids); int zip_create_qps(struct hisi_qp **qps, int qp_num, int node) { if (node == NUMA_NO_NODE) - node = cpu_to_node(smp_processor_id()); + node = cpu_to_node(raw_smp_processor_id()); return hisi_qm_alloc_qps_node(&zip_devices, qp_num, 0, node, qps); } -- 2.30.0

1 0

[PATCH v3 0/2] uadk/uadk_engine: add secure compilation option
by Qi Tao 18 Jan '24

18 Jan '24

*** BLURB HERE *** Qi Tao (1): uadk: add secure compilation option Makefile.am | 2 ++ configure.ac | 1 + 2 files changed, 3 insertions(+) Qi Tao (2): uadk_engine: add secure compilation option configure.ac | 1 + src/Makefile.am | 2 ++ 2 files changed, 3 insertions(+) -- 2.33.0

1 2

[PATCH 0/3] add secure compilation option
by Qi Tao 16 Jan '24

16 Jan '24

*** BLURB HERE *** Qi Tao (3): uadk_engine: add secure compilation option README: add secure compilation option uadk: add secure compilation option uadk_engine/README.md | 4 ++++ uadk_engine/src/Makefile.am | 2 ++ uadk/Makefile.am | 2 ++ uadk/conf.sh | 2 ++ 4 files changed, 10 insertions(+) -- 2.33.0

1 3

[PATCH 0/3] add secure compilation option
by Qi Tao 11 Jan '24

11 Jan '24

*** BLURB HERE *** Qi Tao (3): uadk_engine: add secure compilation option README: add secure compilation option uadk: add secure compilation option uadk_engine/README.md | 4 ++++ uadk_engine/src/Makefile.am | 2 ++ uadk/Makefile.am | 2 ++ uadk/conf.sh | 2 ++ 4 files changed, 10 insertions(+) -- 2.33.0

1 3

[PATCH] uadk: add aead test
by Wenkai Lin 10 Jan '24

10 Jan '24

Add aead test build: ./autogen.sh; ./conf.sh; make -j; test: while true;do strace -o /root/log ./uadk_tool test --m sec --aead 0 --sync --optype 0 --pktlen 16 --keylen 16 --times 1 --multi 1; cat /root/log|grep "222222" && exit ;done Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- .gitignore | 1 + Makefile.am | 2 +- uadk_tool/test/test_sec.c | 197 ++++++++++++++++++-------------------- 3 files changed, 96 insertions(+), 104 deletions(-) diff --git a/.gitignore b/.gitignore index 6a1eb49..4d90d26 100644 --- a/.gitignore +++ b/.gitignore @@ -176,6 +176,7 @@ v1/test/hisi_zip_test/wd_zip_test v1/test/hisi_zip_test_sgl/sgl_test v1/test/hisi_zip_test_sgl/wd_zip_test_sgl v1/test/test_mm/test_wd_mem +v1/test *.gcda *.ut *.eml diff --git a/Makefile.am b/Makefile.am index d81e8cc..e574c43 100644 --- a/Makefile.am +++ b/Makefile.am @@ -1,6 +1,6 @@ ACLOCAL_AMFLAGS = -I m4 -I./include AUTOMAKE_OPTIONS = foreign subdir-objects -AM_CFLAGS=-Wall -Werror -fno-strict-aliasing -I$(top_srcdir)/include +AM_CFLAGS=-fPIC -Wall -Werror -fno-strict-aliasing -I$(top_srcdir)/include CLEANFILES = if WITH_LOG_FILE diff --git a/uadk_tool/test/test_sec.c b/uadk_tool/test/test_sec.c index b00a933..53051de 100644 --- a/uadk_tool/test/test_sec.c +++ b/uadk_tool/test/test_sec.c @@ -11,6 +11,7 @@ #include <sys/time.h> #include <getopt.h> #include <numa.h> +#include <stdarg.h> #include "sec_template_tv.h" #include "test_sec.h" @@ -2880,6 +2881,39 @@ int get_aead_resource(struct aead_testvec **alg_tv, return 0; } + +/* Allocates memory and generates random data. */ +int v2_key_from_random(int cnt, ...) +{ + srand((unsigned)time(NULL) * rand()); + int k = 0; + unsigned int i; + va_list p_args; + va_start(p_args, cnt); + unsigned char **dst; + unsigned char *src; + unsigned int size; + + while (k < cnt / 2) { + dst = va_arg(p_args, + unsigned char **); + size = va_arg(p_args, + unsigned int); + src = malloc(size); + *dst = src; + memset(src, 0, size); + for (i = 0; i < size; i++) { + src[i] = rand(); + } + if (*dst == NULL) { + return -1; + } + k++; + } + va_end(p_args); + return 0; +} + static int sec_aead_sync_once(void) { struct wd_aead_sess_setup setup = {0}; @@ -2892,11 +2926,11 @@ static int sec_aead_sync_once(void) float speed, time_used; unsigned long cnt = g_times; __u16 mac_bytes; - __u16 auth_size; - __u16 in_size; + __u32 in_size; __u16 iv_len; int ret; - size_t unit_sz; + struct sched_params param = {0}; + void *tmp_src = NULL, *tmp_dst = NULL; /* config setup */ ret = init_aead_ctx_config(CTX_TYPE_ENCRYPT, CTX_MODE_SYNC); @@ -2914,60 +2948,35 @@ static int sec_aead_sync_once(void) return ret; } + setup.sched_param = &param; h_sess = wd_aead_alloc_sess(&setup); if (!h_sess) { ret = -EINVAL; goto out; } - /* should set key */ - dump_mem("req src key--->:", WD_FLAT_BUF, (void *)tv->key, tv->klen); + unsigned char *input = NULL, *iv = NULL, *key = NULL, *assoc = NULL; + unsigned int key_size = 16; + unsigned int iv_size = 16; + unsigned int input_size = 1048576; + unsigned int assoc_size = 65279; + ret = v2_key_from_random(8, &input, input_size, &iv, iv_size, &key, key_size, &assoc, assoc_size); + if (setup.cmode == WD_CIPHER_CCM || setup.cmode == WD_CIPHER_GCM) { - ret = wd_aead_set_ckey(h_sess, (const __u8*)tv->key, tv->klen); + ret = wd_aead_set_ckey(h_sess, (const __u8*)key, 16); if (ret) { SEC_TST_PRT("aead sess set key failed!\n"); goto out_key; } - } else { - // AEAD template's cipher key is the tail data - ret = wd_aead_set_ckey(h_sess, (__u8*)tv->key + 0x28, 0x10); - if (ret) { - SEC_TST_PRT("set cipher key fail!\n"); - goto out_key; - } - // AEAD template's auth key is the mid data - ret = wd_aead_set_akey(h_sess, (__u8*)tv->key + 0x08, 0x20); - if (ret) { - SEC_TST_PRT("set auth key fail!\n"); - goto out_key; - } } - auth_size = (__u16)(tv->clen - tv->plen); - mac_bytes = auth_size; - ret = wd_aead_set_authsize(h_sess, auth_size); + mac_bytes = 16; + ret = wd_aead_set_authsize(h_sess, mac_bytes); if (ret) { - SEC_TST_PRT("set auth size fail, authsize: %u\n", auth_size); + SEC_TST_PRT("set auth size fail, authsize: %u\n", mac_bytes); goto out_key; } - // test the auth size - ret = wd_aead_get_authsize(h_sess); - if (ret != auth_size) { - SEC_TST_PRT("get auth size fail!\n"); - goto out_key; - } - - ret = wd_aead_get_maxauthsize(h_sess); - if (ret < auth_size) { - SEC_TST_PRT("get max auth size fail!\n"); - goto out_key; - } - SEC_TST_PRT("aead get max auth size: %u\n", ret); - - if (setup.cmode == WD_CIPHER_CCM || setup.cmode == WD_CIPHER_GCM) - mac_bytes = 16; - req.mac = malloc(mac_bytes); if (!req.mac) { SEC_TST_PRT("req iv mem malloc failed!\n"); @@ -2977,68 +2986,23 @@ static int sec_aead_sync_once(void) memset(req.mac, 0, mac_bytes); req.mac_bytes = mac_bytes; - if (g_direction == 0) - req.op_type = WD_CIPHER_ENCRYPTION_DIGEST; - else - req.op_type = WD_CIPHER_DECRYPTION_DIGEST; - - req.assoc_bytes = tv->alen; - if (g_direction == 0) { - in_size = req.assoc_bytes + tv->plen; - } else { - in_size = req.assoc_bytes + tv->clen; - } - if (in_size > BUFF_SIZE) { - SEC_TST_PRT("alloc in buffer block size too small!\n"); - goto out_mac; - } - unit_sz = cal_unit_sz(in_size, g_sgl_num); - void *src = create_buf(WD_FLAT_BUF, in_size, unit_sz); - if (!src) { - ret = -ENOMEM; - goto out_src; - } - - memset(src, 0, in_size); - // copy the assoc data in the front of in data - SEC_TST_PRT("aead set assoc_bytes: %u\n", req.assoc_bytes); - if (g_direction == 0) { - memcpy(src, tv->assoc, tv->alen); - memcpy((src + req.assoc_bytes), tv->ptext, tv->plen); - req.in_bytes = tv->plen; - } else { - memcpy(src, tv->assoc, tv->alen); - memcpy(src + req.assoc_bytes, tv->ctext, tv->clen - auth_size); - req.in_bytes = tv->clen - auth_size; - memcpy(req.mac, tv->ctext + tv->clen - auth_size, auth_size); - } - - dump_mem("mac addr src is:", 0, req.mac, auth_size); - - req.src = create_buf(g_data_fmt, in_size, unit_sz); + in_size = 1113855; + req.src = malloc(in_size); if (!req.src) { ret = -ENOMEM; goto out_src; } - copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, src, - (size_t)(req.in_bytes + tv->alen)); - free(src); - SEC_TST_PRT("aead req src len: %u\n", tv->alen + req.in_bytes); - dump_mem("aead req src in--->", g_data_fmt, req.src, tv->alen + req.in_bytes); - if (g_direction == 0) { - req.out_bytes = req.assoc_bytes + tv->clen - auth_size; - } else { - req.out_bytes = req.assoc_bytes + tv->plen; - } + memcpy(req.src, assoc, assoc_size); + memcpy(req.src + assoc_size, input, input_size); - // alloc out buffer memory - unit_sz = cal_unit_sz(req.out_bytes, g_sgl_num); - req.dst = create_buf(g_data_fmt, req.out_bytes, unit_sz); + req.out_bytes = 1113855; + req.dst = malloc(req.out_bytes); if (!req.dst) { ret = -ENOMEM; goto out_dst; } + memset(req.dst, 0, req.out_bytes); req.iv = malloc(AES_BLOCK_SIZE); if (!req.iv) { @@ -3046,18 +3010,42 @@ static int sec_aead_sync_once(void) ret = -ENOMEM; goto out_iv; } - if (setup.cmode == WD_CIPHER_GCM) - iv_len = GCM_IV_SIZE; - else - iv_len = AES_BLOCK_SIZE; + + iv_len = 16; req.iv_bytes = iv_len; - memcpy(req.iv, tv->iv, iv_len); + memcpy(req.iv, iv, 16); req.data_fmt = g_data_fmt; gettimeofday(&start_tval, NULL); while (cnt) { + /* do encrypt first, device use req.src and req.dst to read and write data */ + req.op_type = WD_CIPHER_ENCRYPTION_DIGEST; + req.assoc_bytes = 65279; + req.out_bytes = 1113855; + req.in_bytes = 1048576; ret = wd_do_aead_sync(h_sess, &req); + if (ret || req.state) { + SEC_TST_PRT("wd_do_aead_sync 111111111 failed!!!!!!!!!!!!\n"); + goto out_job; + } + + /* do decrypt, need to do much times memcpy here */ + tmp_src = malloc(req.out_bytes); + tmp_dst = malloc(req.out_bytes); + memcpy(tmp_src, req.src, req.out_bytes); + memcpy(tmp_dst, req.dst, req.out_bytes); + memcpy(req.iv, iv, 16); + memcpy(req.src, tmp_dst, req.out_bytes); + req.op_type = WD_CIPHER_DECRYPTION_DIGEST; + + ret = wd_do_aead_sync(h_sess, &req); + memcpy(tmp_dst, req.dst + req.assoc_bytes, req.in_bytes); + if (ret || req.state || memcmp(tmp_dst, tmp_src + req.assoc_bytes, req.in_bytes)) { + WD_CONSOLE("wd_do_aead_sync 222222222 failed!!!!!!!!!!!!\n"); + goto out_job; + } + cnt--; } gettimeofday(&cur_tval, NULL); @@ -3070,16 +3058,19 @@ static int sec_aead_sync_once(void) SEC_TST_PRT("Pro-%d, thread_id-%d, speed:%0.3f ops, Perf: %ld KB/s\n", getpid(), (int)syscall(__NR_gettid), speed, Perf); - dump_mem("aead dump out addr is:", g_data_fmt, req.dst, req.out_bytes); - dump_mem("aead dump mac addr is:", 0, req.mac, auth_size); - +out_job: + free(input); + free(assoc); + free(iv); + free(key); + free(tmp_dst); + free(tmp_src); free(req.iv); out_iv: - free_buf(g_data_fmt, req.dst); + free(req.dst); out_dst: - free_buf(g_data_fmt, req.src); + free(req.src); out_src: -out_mac: free(req.mac); out_key: wd_aead_free_sess(h_sess); -- 2.30.0

1 0

ACCLib SIG例会
by openEuler conference 09 Jan '24

09 Jan '24

您好！ sig-AccLib SIG 邀请您参加 2024-01-10 11:00 召开的Zoom会议会议主题：ACCLib SIG例会会议链接：https://us06web.zoom.us/j/86816906987?pwd=EV5z2MzxMkxlpumcH98Bb47lo8kVe4.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2024-01-10 11:00, The subject of the conference is ACCLib SIG例会, You can join the meeting at https://us06web.zoom.us/j/86816906987?pwd=EV5z2MzxMkxlpumcH98Bb47lo8kVe4.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

AccLib SIG双周例会
by openEuler conference 26 Dec '23

26 Dec '23

您好！ sig-AccLib SIG 邀请您参加 2023-12-27 11:00 召开的Zoom会议会议主题：AccLib SIG双周例会会议内容：固定会议链接 https://linaro-org.zoom.us/j/91879279131 会议链接：https://us06web.zoom.us/j/88336836858?pwd=5qk9kCe9bPfwWR0HakZykkPWJKHUUd.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2023-12-27 11:00, The subject of the conference is AccLib SIG双周例会, Summary: 固定会议链接 https://linaro-org.zoom.us/j/91879279131 You can join the meeting at https://us06web.zoom.us/j/88336836858?pwd=5qk9kCe9bPfwWR0HakZykkPWJKHUUd.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

AccLib sig 例会
by openEuler conference 12 Dec '23

12 Dec '23

您好！ sig-AccLib SIG 邀请您参加 2023-12-13 11:00 召开的Zoom会议会议主题：AccLib sig 例会会议内容：【2023/12/13 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要：会议链接：https://us06web.zoom.us/j/88567434959?pwd=Cg2BUTho7Bnwet10dhUBPMkxscRzjR.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2023-12-13 11:00, The subject of the conference is AccLib sig 例会, Summary: 【2023/12/13 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要： You can join the meeting at https://us06web.zoom.us/j/88567434959?pwd=Cg2BUTho7Bnwet10dhUBPMkxscRzjR.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH] uadk/v1: fix static compilation error
by Qi Tao 11 Dec '23

11 Dec '23

Modify the function name to avoid multiple definition of "wd_check_src_dst()" in uadk/v1. Signed-off-by: Qi Tao <taoqi10(a)huawei.com> --- v1/wd_aead.c | 2 +- v1/wd_cipher.c | 2 +- v1/wd_digest.c | 2 +- v1/wd_rsa.c | 2 +- v1/wd_util.c | 2 +- v1/wd_util.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/v1/wd_aead.c b/v1/wd_aead.c index 380daf0..311b01c 100644 --- a/v1/wd_aead.c +++ b/v1/wd_aead.c @@ -540,7 +540,7 @@ static int param_check(struct wcrypto_aead_ctx *a_ctx, return -WD_EINVAL; } - ret = wd_check_src_dst(a_opdata[i]->in, a_opdata[i]->in_bytes, a_opdata[i]->out, a_opdata[i]->out_bytes); + ret = wd_check_src_dst_v1(a_opdata[i]->in, a_opdata[i]->in_bytes, a_opdata[i]->out, a_opdata[i]->out_bytes); if (unlikely(ret)) { WD_ERR("invalid: src/dst addr is NULL when src/dst size is non-zero!\n"); return -WD_EINVAL; diff --git a/v1/wd_cipher.c b/v1/wd_cipher.c index 0877993..1d8cb94 100644 --- a/v1/wd_cipher.c +++ b/v1/wd_cipher.c @@ -432,7 +432,7 @@ static int param_check(struct wcrypto_cipher_ctx *c_ctx, return -WD_EINVAL; } - ret = wd_check_src_dst(c_opdata[i]->in, c_opdata[i]->in_bytes, c_opdata[i]->out, c_opdata[i]->out_bytes); + ret = wd_check_src_dst_v1(c_opdata[i]->in, c_opdata[i]->in_bytes, c_opdata[i]->out, c_opdata[i]->out_bytes); if (unlikely(ret)) { WD_ERR("invalid: src/dst addr is NULL when src/dst size is non-zero!\n"); return -WD_EINVAL; diff --git a/v1/wd_digest.c b/v1/wd_digest.c index cb9b6e0..e9d2dc1 100644 --- a/v1/wd_digest.c +++ b/v1/wd_digest.c @@ -437,7 +437,7 @@ static int param_check(struct wcrypto_digest_ctx *d_ctx, return -WD_EINVAL; } - ret = wd_check_src_dst(d_opdata[i]->in, d_opdata[i]->in_bytes, + ret = wd_check_src_dst_v1(d_opdata[i]->in, d_opdata[i]->in_bytes, d_opdata[i]->out, d_opdata[i]->out_bytes); if (unlikely(ret)) { WD_ERR("invalid: src/dst addr is NULL when src/dst size is non-zero!\n"); diff --git a/v1/wd_rsa.c b/v1/wd_rsa.c index 9e467d0..5d429b4 100644 --- a/v1/wd_rsa.c +++ b/v1/wd_rsa.c @@ -961,7 +961,7 @@ static int do_rsa_prepare(struct wcrypto_rsa_ctx *ctxt, return -WD_EINVAL; } - ret = wd_check_src_dst(opdata->in, opdata->in_bytes, opdata->out, opdata->out_bytes); + ret = wd_check_src_dst_v1(opdata->in, opdata->in_bytes, opdata->out, opdata->out_bytes); if (unlikely(ret)) { WD_ERR("invalid: src/dst addr is NULL when src/dst size is non-zero!\n"); return -WD_EINVAL; diff --git a/v1/wd_util.c b/v1/wd_util.c index f31d138..d577d6e 100644 --- a/v1/wd_util.c +++ b/v1/wd_util.c @@ -183,7 +183,7 @@ int wd_burst_recv(struct wd_queue *q, void **resp, __u32 num) return drv_recv(q, resp, num); } -int wd_check_src_dst(void *src, __u32 in_bytes, void *dst, __u32 out_bytes) +int wd_check_src_dst_v1(void *src, __u32 in_bytes, void *dst, __u32 out_bytes) { if (unlikely((in_bytes && !src) || (out_bytes && !dst))) return -WD_EINVAL; diff --git a/v1/wd_util.h b/v1/wd_util.h index 9e5fa90..6242f94 100644 --- a/v1/wd_util.h +++ b/v1/wd_util.h @@ -421,6 +421,6 @@ void drv_set_sgl_pri(struct wd_sgl *sgl, void *priv); void *drv_get_sgl_pri(struct wd_sgl *sgl); struct wd_mm_br *drv_get_br(void *pool); void wd_sgl_memset(struct wd_sgl *sgl, int ch); -int wd_check_src_dst(void *src, __u32 in_bytes, void *dst, __u32 out_bytes); +int wd_check_src_dst_v1(void *src, __u32 in_bytes, void *dst, __u32 out_bytes); #endif -- 2.33.0

1 0

[PATCH] uadk: fix sec send and recv check failed
by Yang Shen 09 Dec '23

09 Dec '23

From: Wenkai Lin <linwenkai6(a)hisilicon.com> The send and recv pointers should be assigned at the beginning, not during wd initialization. Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> --- drv/hisi_sec.c | 260 ++++++++++++++++++++++++++++--------------------- 1 file changed, 149 insertions(+), 111 deletions(-) diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index d7369fe..2948fe1 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -539,12 +539,93 @@ static __u32 g_sec_hmac_full_len[WD_DIGEST_TYPE_MAX] = { static int hisi_sec_init(void *conf, void *priv); static void hisi_sec_exit(void *priv); +static int hisi_sec_cipher_send(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_cipher_recv_v3(handle_t ctx, void *wd_msg); + +static int hisi_sec_digest_send(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_digest_recv_v3(handle_t ctx, void *wd_msg); + +static int hisi_sec_aead_send(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_recv(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_send_v3(handle_t ctx, void *wd_msg); +static int hisi_sec_aead_recv_v3(handle_t ctx, void *wd_msg); + +static int cipher_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_cipher_send(ctx, msg); + return hisi_sec_cipher_send_v3(ctx, msg); +} + +static int cipher_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_cipher_recv(ctx, msg); + return hisi_sec_cipher_recv_v3(ctx, msg); +} + +static int digest_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_digest_send(ctx, msg); + return hisi_sec_digest_send_v3(ctx, msg); +} + +static int digest_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_digest_recv(ctx, msg); + return hisi_sec_digest_recv_v3(ctx, msg); +} + +static int aead_send(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_aead_send(ctx, msg); + return hisi_sec_aead_send_v3(ctx, msg); +} + +static int aead_recv(handle_t ctx, void *msg) +{ + handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); + struct hisi_qp *qp = (struct hisi_qp *)h_qp; + struct hisi_qm_queue_info q_info = qp->q_info; + + if (q_info.hw_type == HISI_QM_API_VER2_BASE) + return hisi_sec_aead_recv(ctx, msg); + return hisi_sec_aead_recv_v3(ctx, msg); +} + static int hisi_sec_get_usage(void *param) { return 0; } -#define GEN_SEC_ALG_DRIVER(sec_alg_name) \ +#define GEN_SEC_ALG_DRIVER(sec_alg_name, alg_type) \ {\ .drv_name = "hisi_sec2",\ .alg_name = (sec_alg_name),\ @@ -556,57 +637,59 @@ static int hisi_sec_get_usage(void *param) .fallback = 0,\ .init = hisi_sec_init,\ .exit = hisi_sec_exit,\ + .send = alg_type##_send,\ + .recv = alg_type##_recv,\ .get_usage = hisi_sec_get_usage,\ } static struct wd_alg_driver cipher_alg_driver[] = { - GEN_SEC_ALG_DRIVER("ecb(aes)"), - GEN_SEC_ALG_DRIVER("cbc(aes)"), - GEN_SEC_ALG_DRIVER("xts(aes)"), - GEN_SEC_ALG_DRIVER("ecb(sm4)"), - GEN_SEC_ALG_DRIVER("cbc(sm4)"), - GEN_SEC_ALG_DRIVER("ctr(sm4)"), - GEN_SEC_ALG_DRIVER("xts(sm4)"), - GEN_SEC_ALG_DRIVER("ecb(des)"), - GEN_SEC_ALG_DRIVER("cbc(des)"), - GEN_SEC_ALG_DRIVER("ecb(des3_ede)"), - GEN_SEC_ALG_DRIVER("cbc(des3_ede)"), - - GEN_SEC_ALG_DRIVER("ctr(aes)"), - GEN_SEC_ALG_DRIVER("ofb(aes)"), - GEN_SEC_ALG_DRIVER("cfb(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs1(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs2(aes)"), - GEN_SEC_ALG_DRIVER("cbc-cs3(aes)"), - GEN_SEC_ALG_DRIVER("ofb(sm4)"), - GEN_SEC_ALG_DRIVER("cfb(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs1(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs2(sm4)"), - GEN_SEC_ALG_DRIVER("cbc-cs3(sm4)"), + GEN_SEC_ALG_DRIVER("ecb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc(aes)", cipher), + GEN_SEC_ALG_DRIVER("xts(aes)", cipher), + GEN_SEC_ALG_DRIVER("ecb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc(sm4)", cipher), + GEN_SEC_ALG_DRIVER("ctr(sm4)", cipher), + GEN_SEC_ALG_DRIVER("xts(sm4)", cipher), + GEN_SEC_ALG_DRIVER("ecb(des)", cipher), + GEN_SEC_ALG_DRIVER("cbc(des)", cipher), + GEN_SEC_ALG_DRIVER("ecb(des3_ede)", cipher), + GEN_SEC_ALG_DRIVER("cbc(des3_ede)", cipher), + + GEN_SEC_ALG_DRIVER("ctr(aes)", cipher), + GEN_SEC_ALG_DRIVER("ofb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cfb(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs1(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs2(aes)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs3(aes)", cipher), + GEN_SEC_ALG_DRIVER("ofb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cfb(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs1(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs2(sm4)", cipher), + GEN_SEC_ALG_DRIVER("cbc-cs3(sm4)", cipher), }; static struct wd_alg_driver digest_alg_driver[] = { - GEN_SEC_ALG_DRIVER("sm3"), - GEN_SEC_ALG_DRIVER("md5"), - GEN_SEC_ALG_DRIVER("sha1"), - GEN_SEC_ALG_DRIVER("sha224"), - GEN_SEC_ALG_DRIVER("sha256"), - GEN_SEC_ALG_DRIVER("sha384"), - GEN_SEC_ALG_DRIVER("sha512"), - GEN_SEC_ALG_DRIVER("sha512-224"), - GEN_SEC_ALG_DRIVER("sha512-256"), - GEN_SEC_ALG_DRIVER("xcbc-mac-96(aes)"), - GEN_SEC_ALG_DRIVER("xcbc-prf-128(aes)"), - GEN_SEC_ALG_DRIVER("cmac(aes)"), - GEN_SEC_ALG_DRIVER("gmac(aes)"), + GEN_SEC_ALG_DRIVER("sm3", digest), + GEN_SEC_ALG_DRIVER("md5", digest), + GEN_SEC_ALG_DRIVER("sha1", digest), + GEN_SEC_ALG_DRIVER("sha224", digest), + GEN_SEC_ALG_DRIVER("sha256", digest), + GEN_SEC_ALG_DRIVER("sha384", digest), + GEN_SEC_ALG_DRIVER("sha512", digest), + GEN_SEC_ALG_DRIVER("sha512-224", digest), + GEN_SEC_ALG_DRIVER("sha512-256", digest), + GEN_SEC_ALG_DRIVER("xcbc-mac-96(aes)", digest), + GEN_SEC_ALG_DRIVER("xcbc-prf-128(aes)", digest), + GEN_SEC_ALG_DRIVER("cmac(aes)", digest), + GEN_SEC_ALG_DRIVER("gmac(aes)", digest), }; static struct wd_alg_driver aead_alg_driver[] = { - GEN_SEC_ALG_DRIVER("ccm(aes)"), - GEN_SEC_ALG_DRIVER("gcm(aes)"), - GEN_SEC_ALG_DRIVER("authenc(hmac(sha256),cbc(aes))"), - GEN_SEC_ALG_DRIVER("ccm(sm4)"), - GEN_SEC_ALG_DRIVER("gcm(sm4)"), + GEN_SEC_ALG_DRIVER("ccm(aes)", aead), + GEN_SEC_ALG_DRIVER("gcm(aes)", aead), + GEN_SEC_ALG_DRIVER("authenc(hmac(sha256),cbc(aes))", aead), + GEN_SEC_ALG_DRIVER("ccm(sm4)", aead), + GEN_SEC_ALG_DRIVER("gcm(sm4)", aead), }; static void dump_sec_msg(void *msg, const char *alg) @@ -1093,10 +1176,10 @@ static int fill_cipher_bd2(struct wd_cipher_msg *msg, struct hisi_sec_sqe *sqe) return 0; } -int hisi_sec_cipher_send(handle_t ctx, void *cipher_msg) +static int hisi_sec_cipher_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *msg = cipher_msg; + struct wd_cipher_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1139,10 +1222,10 @@ int hisi_sec_cipher_send(handle_t ctx, void *cipher_msg) return 0; } -int hisi_sec_cipher_recv(handle_t ctx, void *cipher_msg) +int hisi_sec_cipher_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *recv_msg = cipher_msg; + struct wd_cipher_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1298,10 +1381,10 @@ static int fill_cipher_bd3(struct wd_cipher_msg *msg, struct hisi_sec_sqe3 *sqe) return 0; } -int hisi_sec_cipher_send_v3(handle_t ctx, void *cipher_msg) +static int hisi_sec_cipher_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *msg = cipher_msg; + struct wd_cipher_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -1389,10 +1472,10 @@ static void parse_cipher_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "cipher"); } -int hisi_sec_cipher_recv_v3(handle_t ctx, void *cipher_msg) +int hisi_sec_cipher_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_cipher_msg *recv_msg = cipher_msg; + struct wd_cipher_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -1662,10 +1745,10 @@ static int digest_len_check(struct wd_digest_msg *msg, enum sec_bd_type type) return 0; } -int hisi_sec_digest_send(handle_t ctx, void *digest_msg) +static int hisi_sec_digest_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *msg = digest_msg; + struct wd_digest_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; __u8 scene; @@ -1729,10 +1812,10 @@ put_sgl: return ret; } -int hisi_sec_digest_recv(handle_t ctx, void *digest_msg) +int hisi_sec_digest_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *recv_msg = digest_msg; + struct wd_digest_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -1906,10 +1989,10 @@ static void fill_digest_v3_scene(struct hisi_sec_sqe3 *sqe, sqe->bd_param |= (__u16)(de | scene); } -int hisi_sec_digest_send_v3(handle_t ctx, void *digest_msg) +static int hisi_sec_digest_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *msg = digest_msg; + struct wd_digest_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2006,10 +2089,10 @@ static void parse_digest_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "digest"); } -int hisi_sec_digest_recv_v3(handle_t ctx, void *digest_msg) +int hisi_sec_digest_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_digest_msg *recv_msg = digest_msg; + struct wd_digest_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2478,10 +2561,10 @@ int aead_msg_state_check(struct wd_aead_msg *msg) return 0; } -int hisi_sec_aead_send(handle_t ctx, void *aead_msg) +static int hisi_sec_aead_send(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *msg = aead_msg; + struct wd_aead_msg *msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -2600,10 +2683,10 @@ static bool soft_compute_check(struct hisi_qp *qp, struct wd_aead_msg *msg) qp->q_info.qp_mode == CTX_MODE_SYNC; } -int hisi_sec_aead_recv(handle_t ctx, void *aead_msg) +int hisi_sec_aead_recv(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *recv_msg = aead_msg; + struct wd_aead_msg *recv_msg = wd_msg; struct hisi_sec_sqe sqe; __u16 count = 0; int ret; @@ -2864,10 +2947,10 @@ static int fill_aead_bd3(struct wd_aead_msg *msg, struct hisi_sec_sqe3 *sqe) return 0; } -int hisi_sec_aead_send_v3(handle_t ctx, void *aead_msg) +static int hisi_sec_aead_send_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *msg = aead_msg; + struct wd_aead_msg *msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2965,10 +3048,10 @@ static void parse_aead_bd3(struct hisi_qp *qp, struct hisi_sec_sqe3 *sqe, dump_sec_msg(temp_msg, "aead"); } -int hisi_sec_aead_recv_v3(handle_t ctx, void *aead_msg) +int hisi_sec_aead_recv_v3(handle_t ctx, void *wd_msg) { handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx); - struct wd_aead_msg *recv_msg = aead_msg; + struct wd_aead_msg *recv_msg = wd_msg; struct hisi_sec_sqe3 sqe; __u16 count = 0; int ret; @@ -2993,50 +3076,6 @@ int hisi_sec_aead_recv_v3(handle_t ctx, void *aead_msg) return 0; } -static void hisi_sec_driver_adapter(struct hisi_qp *qp) -{ - struct hisi_qm_queue_info q_info = qp->q_info; - int alg_num, i; - - if (q_info.hw_type == HISI_QM_API_VER2_BASE) { - WD_INFO("hisi sec init HIP08!\n"); - alg_num = ARRAY_SIZE(cipher_alg_driver); - for (i = 0; i < alg_num; i++) { - cipher_alg_driver[i].send = hisi_sec_cipher_send; - cipher_alg_driver[i].recv = hisi_sec_cipher_recv; - } - - alg_num = ARRAY_SIZE(digest_alg_driver); - for (i = 0; i < alg_num; i++) { - digest_alg_driver[i].send = hisi_sec_digest_send; - digest_alg_driver[i].recv = hisi_sec_digest_recv; - } - alg_num = ARRAY_SIZE(aead_alg_driver); - for (i = 0; i < alg_num; i++) { - aead_alg_driver[i].send = hisi_sec_aead_send; - aead_alg_driver[i].recv = hisi_sec_aead_recv; - } - } else { - WD_INFO("hisi sec init HIP09!\n"); - alg_num = ARRAY_SIZE(cipher_alg_driver); - for (i = 0; i < alg_num; i++) { - cipher_alg_driver[i].send = hisi_sec_cipher_send_v3; - cipher_alg_driver[i].recv = hisi_sec_cipher_recv_v3; - } - - alg_num = ARRAY_SIZE(digest_alg_driver); - for (i = 0; i < alg_num; i++) { - digest_alg_driver[i].send = hisi_sec_digest_send_v3; - digest_alg_driver[i].recv = hisi_sec_digest_recv_v3; - } - alg_num = ARRAY_SIZE(aead_alg_driver); - for (i = 0; i < alg_num; i++) { - aead_alg_driver[i].send = hisi_sec_aead_send_v3; - aead_alg_driver[i].recv = hisi_sec_aead_recv_v3; - } - } -} - static int hisi_sec_init(void *conf, void *priv) { struct wd_ctx_config_internal *config = conf; @@ -3068,7 +3107,6 @@ static int hisi_sec_init(void *conf, void *priv) config->ctxs[i].sqn = qm_priv.sqn; } memcpy(&sec_ctx->config, config, sizeof(struct wd_ctx_config_internal)); - hisi_sec_driver_adapter((struct hisi_qp *)h_qp); return 0; -- 2.33.0

1 0

[PATCH 0/6] some cleanup and bugfix of hpre
by Zhiqi Song 07 Dec '23

07 Dec '23

Some bugfix and cleanup. Zhiqi Song (6): uadk/v1: fix security view issues of hpre uadk: cleanup issues of hpre uadk/v1/hpre: add parameter check of setup uadk/ecc: fix the use of random k in sm2 sign uadk/v1: cleanup common part code style uadk/sec: add return value judgement drv/hisi_hpre.c | 103 +++++++++++++++++++++++----------------- drv/hisi_sec.c | 4 ++ v1/drv/hisi_hpre_udrv.c | 31 ++++++------ v1/drv/hisi_qm_udrv.c | 16 +++---- v1/wd_adapter.c | 18 +++---- v1/wd_bmm.c | 13 +++-- v1/wd_dh.c | 3 +- v1/wd_ecc.c | 17 +++++-- v1/wd_rsa.c | 6 ++- v1/wd_sgl.c | 27 +++++++++-- wd_dh.c | 16 +++---- wd_ecc.c | 34 ++++++++----- wd_rsa.c | 14 +++--- 13 files changed, 181 insertions(+), 121 deletions(-) -- 2.33.0

1 6

[PATCH] uadk: add null pointer check
by Qi Tao 05 Dec '23

05 Dec '23

From: taoqi 30043660 <taoqi10(a)huawei.com> Whether the pointer is NULL is not checked after the memory is applied for. Signed-off-by: taoqi 30043660 <taoqi10(a)huawei.com> --- v1/wd_dh.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/v1/wd_dh.c b/v1/wd_dh.c index 3be6250..d574c1d 100644 --- a/v1/wd_dh.c +++ b/v1/wd_dh.c @@ -185,6 +185,10 @@ void *wcrypto_create_dh_ctx(struct wd_queue *q, struct wcrypto_dh_ctx_setup *set goto free_ctx; } ctx->g.data = ctx->setup.br.alloc(ctx->setup.br.usr, ctx->key_size); + if (!ctx->g.data) { + WD_ERR("failed to alloc ctx->g.data memory!\n"); + goto free_ctx; + } ctx->g.bsize = ctx->key_size; ret = wcrypto_init_dh_cookie(ctx); -- 2.33.0

1 0

[PATCH 00/11] bugfix and codecleanup for uadk v1 and v2
by Qi Tao 04 Dec '23

04 Dec '23

From: Chenghai Huang <huangchenghai2(a)huawei.com> Fixed some bugs of uadk v1 and v2, optimized code function processing, and added file association in compiled files. Chenghai Huang (11): uadk: Add file association uadk: fix the failure process bug uadk: fix the failure process bug uadk: fix the failure process bug uadk: bugfix uadk v1: adapter code cleanup uadk v1: fix wd_rng resource release bug uadk v1: code cleanup for error codes and header files uadk: concentrate the same definitions uadk v1: optimize the function length uadk v1: concentrate the same definitions Makefile.am | 4 +- drv/hisi_sec.c | 11 +----- include/wd_alg_common.h | 13 +++++++ include/wd_cipher.h | 1 - include/wd_digest.h | 2 - v1/drv/hisi_sec_udrv.c | 11 +----- v1/wd.c | 63 ++++++++++++++++--------------- v1/wd_adapter.c | 6 +-- v1/wd_aead.c | 15 -------- v1/wd_cipher.c | 9 +---- v1/wd_digest.c | 84 ++++++++++++++++++++++++++--------------- v1/wd_rng.c | 8 ++-- v1/wd_util.h | 17 +++++++++ wd.c | 2 +- wd_aead.c | 9 ----- wd_cipher.c | 7 ---- wd_digest.c | 9 ----- wd_mempool.c | 3 +- wd_sched.c | 2 +- wd_util.c | 1 + 20 files changed, 133 insertions(+), 144 deletions(-) -- 2.30.0

1 0

[PATCH] uadk_engine: fix env poll timeout in abnormal scenarios
by Zhiqi Song 30 Nov '23

30 Nov '23

In abnormal scenarios, if the alg cores of hardware device are closed, the hw async task may return busy and can not finish the task. There is be a max loop count to avoid infinite loop. But there is already a 'MAX_POLL_TIMES' (1000) in uadk default poll policy. If engine use 'ENGINE_RECV_MAX_CNT' to control the poll loop count, the actual count will be: MAX_POLL_TIMES * ENGINE_RECV_MAX_CNT which is too large. This will cause the process use a very long time to exit. So modify the env poll loop time count. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- README | 2 +- src/uadk.h | 1 + src/uadk_aead.c | 2 +- src/uadk_cipher.c | 2 +- src/uadk_dh.c | 2 +- src/uadk_digest.c | 2 +- src/uadk_pkey.c | 2 +- src/uadk_rsa.c | 2 +- 8 files changed, 8 insertions(+), 7 deletions(-) diff --git a/README b/README index cd27ccb..9586e60 100644 --- a/README +++ b/README @@ -180,7 +180,7 @@ Usage 1. Firstly, modify the openssl.cnf file, add the following settings at the beginning of this file: ``` -openssl_cnf=openssl_def +openssl_conf=openssl_def [openssl_def] engines=engine_section [engine_section] diff --git a/src/uadk.h b/src/uadk.h index ed7dbf1..d212033 100644 --- a/src/uadk.h +++ b/src/uadk.h @@ -22,6 +22,7 @@ #define ENV_STRING_LEN 256 #define ENGINE_SEND_MAX_CNT 90000000 #define ENGINE_RECV_MAX_CNT 60000000 +#define ENGINE_ENV_RECV_MAX_CNT 60000 #define UADK_UNINIT 0 #define UADK_INIT_SUCCESS 1 #define UADK_INIT_FAIL 2 diff --git a/src/uadk_aead.c b/src/uadk_aead.c index e127af8..619b50c 100644 --- a/src/uadk_aead.c +++ b/src/uadk_aead.c @@ -81,7 +81,7 @@ static int uadk_e_aead_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 736a8af..deed97d 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -364,7 +364,7 @@ static int uadk_e_cipher_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_dh.c b/src/uadk_dh.c index b451a5f..32874d1 100644 --- a/src/uadk_dh.c +++ b/src/uadk_dh.c @@ -297,7 +297,7 @@ static int uadk_e_dh_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_digest.c b/src/uadk_digest.c index fc979bc..c5065a4 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -390,7 +390,7 @@ static int uadk_e_digest_env_poll(void *ctx) if (ret < 0 || recv == expt) return ret; rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_pkey.c b/src/uadk_pkey.c index 2cec16e..7c115fe 100644 --- a/src/uadk_pkey.c +++ b/src/uadk_pkey.c @@ -182,7 +182,7 @@ static int uadk_e_ecc_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); diff --git a/src/uadk_rsa.c b/src/uadk_rsa.c index 09d34b4..1594b74 100644 --- a/src/uadk_rsa.c +++ b/src/uadk_rsa.c @@ -719,7 +719,7 @@ static int uadk_e_rsa_env_poll(void *ctx) return ret; } rx_cnt++; - } while (rx_cnt < ENGINE_RECV_MAX_CNT); + } while (rx_cnt < ENGINE_ENV_RECV_MAX_CNT); fprintf(stderr, "failed to poll msg: timeout!\n"); -- 2.30.0

1 0

[PATCH 0/8] some bugfix and cleanup for uadk
by Qi Tao 30 Nov '23

30 Nov '23

*** BLURB HERE *** Chenghai Huang (2): uadk: code cleanup uadk: code cleanup for error codes and variable type Longfang Liu (1): uadk: fixed some input parameter checking issues Qi Tao (2): uadk: fix header file is not self contained sec/uadk: resolve white-box security review comments Wenkai Lin (2): uadk/v1: remove print actions after wd_get_cookies uadk: fix sec send and recv check failed Zhiqi Song (1): uadk/sec: add return value judgement drv/hisi_sec.c | 276 +++++++++++++++++++++++----------------- include/wd.h | 1 + include/wd_alg_common.h | 1 + include/wd_cipher.h | 1 + include/wd_sched.h | 1 + include/wd_util.h | 14 ++ v1/wd_aead.c | 4 +- v1/wd_cipher.c | 4 +- v1/wd_digest.c | 4 +- wd.c | 6 +- wd_aead.c | 13 +- wd_cipher.c | 13 +- wd_comp.c | 4 +- wd_dh.c | 4 +- wd_digest.c | 12 +- wd_ecc.c | 4 +- wd_rsa.c | 4 +- wd_sched.c | 14 +- wd_util.c | 10 +- 19 files changed, 244 insertions(+), 146 deletions(-) -- 2.33.0

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[PATCH 1/7] v1/hpre: fix key transfer error issue
by Weili Qian 30 Nov '23

30 Nov '23

Currently, the RSA algorithm calls qm_crypto_bin_to_hpre_bin() to transfer the key when sending request. However, the key needs to be transferred only once, repeated transfer may cause data inconsistency with original user's data, resulting in incorrect calculation results. Therefore, after the key is transferred, the 'dsize' is changed to the 'bsize', When 'disze' and 'bsize' are equal, no transfer is performed. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- v1/drv/hisi_hpre_udrv.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/v1/drv/hisi_hpre_udrv.c b/v1/drv/hisi_hpre_udrv.c index 193ba56..0d0c3b4 100644 --- a/v1/drv/hisi_hpre_udrv.c +++ b/v1/drv/hisi_hpre_udrv.c @@ -136,27 +136,32 @@ static int qm_fill_rsa_crt_prikey2(struct wcrypto_rsa_prikey *prikey, wd_dq->bsize, wd_dq->dsize, "rsa crt dq"); if (unlikely(ret)) return ret; + wd_dq->dsize = wd_dq->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_dp->data, (const char *)wd_dp->data, wd_dp->bsize, wd_dp->dsize, "rsa crt dp"); if (unlikely(ret)) return ret; + wd_dp->dsize = wd_dp->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_q->data, (const char *)wd_q->data, wd_q->bsize, wd_q->dsize, "rsa crt q"); if (unlikely(ret)) return ret; + wd_q->dsize = wd_q->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_p->data, (const char *)wd_p->data, wd_p->bsize, wd_p->dsize, "rsa crt p"); if (unlikely(ret)) return ret; + wd_p->dsize = wd_p->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_qinv->data, (const char *)wd_qinv->data, wd_qinv->bsize, wd_qinv->dsize, "rsa crt qinv"); if (unlikely(ret)) return ret; + wd_qinv->dsize = wd_qinv->bsize; *data = wd_dq->data; return (int)(wd_dq->bsize + wd_qinv->bsize + wd_p->bsize + @@ -179,11 +184,13 @@ static int qm_fill_rsa_prikey1(struct wcrypto_rsa_prikey *prikey, void **data) wd_d->bsize, wd_d->dsize, "rsa prikey1 d"); if (unlikely(ret)) return ret; + wd_d->dsize = wd_d->bsize; ret = qm_crypto_bin_to_hpre_bin(wd_n->data, (const char *)wd_n->data, wd_n->bsize, wd_n->dsize, "rsa prikey1 n"); if (unlikely(ret)) return ret; + wd_n->dsize = wd_n->bsize; *data = wd_d->data; return (int)(wd_n->bsize + wd_d->bsize); @@ -200,11 +207,13 @@ static int qm_fill_rsa_pubkey(struct wcrypto_rsa_pubkey *pubkey, void **data) wd_e->bsize, wd_e->dsize, "rsa pubkey e"); if (unlikely(ret)) return ret; + wd_e->dsize = wd_e->dsize; ret = qm_crypto_bin_to_hpre_bin(wd_n->data, (const char *)wd_n->data, wd_n->bsize, wd_n->dsize, "rsa pubkey n"); if (unlikely(ret)) return ret; + wd_n->dsize = wd_n->dsize; *data = wd_e->data; return (int)(wd_n->bsize + wd_e->bsize); -- 2.33.0

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[PATCH] uadk_cipher: fixup sm4 cfb flags
by Zhiqi Song 29 Nov '23

29 Nov '23

The flags of sm4 cfb should be EVP_CIPH_CFB_MODE, so fix it. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- src/uadk_cipher.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 9392e04..736a8af 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -931,7 +931,7 @@ EVP_CIPHER *uadk_create_cipher_meth(int nid) cipher = uadk_sm4_ofb128; break; case NID_sm4_cfb128: - UADK_CIPHER_DESCR(sm4_cfb128, 1, 16, 16, EVP_CIPH_OFB_MODE); + UADK_CIPHER_DESCR(sm4_cfb128, 1, 16, 16, EVP_CIPH_CFB_MODE); cipher = uadk_sm4_cfb128; break; case NID_sm4_ctr: -- 2.30.0

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Acc SIG例会
by openEuler conference 28 Nov '23

28 Nov '23

您好！ sig-AccLib SIG 邀请您参加 2023-11-29 11:00 召开的Zoom会议会议主题：Acc SIG例会会议内容：【2023/11/29 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要：http 会议链接：https://us06web.zoom.us/j/84176755455?pwd=aTc3hw7op6TNGGvc0toqzOj0DeZcme.1 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2023-11-29 11:00, The subject of the conference is Acc SIG例会, Summary: 【2023/11/29 AccLIb SIG 双周例会 11:00 - 12:00】会议链接：https://linaro-org.zoom.us/j/91879279131 会议纪要：http You can join the meeting at https://us06web.zoom.us/j/84176755455?pwd=aTc3hw7op6TNGGvc0toqzOj0DeZcme.1. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

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