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[PATCH v2 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 29 Sep '22

29 Sep '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update with v1: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (5): test/crypto: add cryptodev_uadk_autotest crypto/uadk: introduce uadk crypto driver crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms doc: Update doc for UADK crypto PMD MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 54 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 77 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1161 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1347 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

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[PATCH v3 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 29 Sep '22

29 Sep '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patch. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 74 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1158 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1342 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

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UADK双周例会
by openEuler conference 27 Sep '22

27 Sep '22

您好！ sig-AccLib SIG 邀请您参加 2022-09-28 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。会议链接：https://us06web.zoom.us/j/87676024901?pwd=RzR2ajlKK3Y5M2lIb2hDVTQySmhyQT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-09-28 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/87676024901?pwd=RzR2ajlKK3Y5M2lIb2hDVTQySmhyQT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

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acc账户通知
by system 20 Sep '22

20 Sep '22

1 0

looking for agent/distributor/whole seller in every country. ๒๎๘จฅ
by 7e3odI 17 Sep '22

17 Sep '22

1 0

looking for agent/distributor/whole seller in every country. ﹫┲█%╖
by V1xZc32q 16 Sep '22

16 Sep '22

1 0

[PATCH 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 15 Sep '22

15 Sep '22

Introduce a new crypto PMD for UADK, which relies on UADK library [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. Currently supported platforms: HiSilicon kunpeng920 & kunpeng930. This patch adds a basic framework. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (5): test/crypto: add cryptodev_uadk_autotest crypto/uadk: introduce uadk crypto driver crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms doc: Update doc for UADK crypto PMD MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 54 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 80 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1161 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1350 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

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Financial Service Provider
by AZERI FINANCE 15 Sep '22

15 Sep '22

1 0

Fw:Re: [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device()
by Zhangfei Gao 14 Sep '22

14 Sep '22

  ------------------ Original ------------------ From: "Jason Gunthorpe" <jgg(a)nvidia.com>; Date: Fri, Sep 9, 2022 00:41 AM To: "Jean-Philippe Brucker"<jean-philippe(a)linaro.org>; Cc: "Baolu Lu"<baolu.lu(a)linux.intel.com>;"Joerg Roedel"<joro(a)8bytes.org>;"Christoph Hellwig"<hch(a)infradead.org>;"Bjorn Helgaas"<bhelgaas(a)google.com>;"Kevin Tian"<kevin.tian(a)intel.com>;"Ashok Raj"<ashok.raj(a)intel.com>;"Will Deacon"<will(a)kernel.org>;"Robin Murphy"<robin.murphy(a)arm.com>;"Jean-Philippe Brucker"<jean-philippe(a)linaro.com>;"Dave Jiang"<dave.jiang(a)intel.com>;"Fenghua Yu"<fenghua.yu(a)intel.com>;"Vinod Koul"<vkoul(a)kernel.org>;"Eric Auger"<eric.auger(a)redhat.com>;"Liu Yi L"<yi.l.liu(a)intel.com>;"Jacob jun Pan"<jacob.jun.pan(a)intel.com>;"Zhangfei Gao"<zhangfei.gao(a)linaro.org>;"Zhu Tony"<tony.zhu(a)intel.com>;"iommu"<iommu(a)lists.linux.dev>;"linux-pci"<linux-pci(a)vger.kernel.org>;"linux-kernel"<linux-kernel(a)vger.kernel.org>; Subject: Re: [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device() On Thu, Sep 08, 2022 at 05:25:32PM +0100, Jean-Philippe Brucker wrote: > On Wed, Sep 07, 2022 at 02:33:11PM -0300, Jason Gunthorpe wrote: > > On Wed, Sep 07, 2022 at 10:54:54AM +0100, Jean-Philippe Brucker wrote: > > > > > Is iommu_domain still going to represent both a device context (whole > > > PASID table) and individual address spaces, or are you planning to move > > > away from that?  What happens when a driver does: > > > > > >   d1 = iommu_domain_alloc() > > >   iommu_attach_device(d1) > > >   d2 = iommu_sva_bind_device() > > >   iommu_detach_device(d1) > > > > > > Does detach > > > (a) only disable the non-PASID address space? > > > (b) disable everything? > > > (c) fail because the driver didn't unbind first? > > > > I think it must be (a), considering how everything is defined and the > > needs for vIOMMU emulation. > > Yes (a) is probably better. The SMMU driver currently implements (c) to > ensure that you can't switch device driver without unbinding everything > first, and we should keep that check somewhere Yes, the owner stuff is a logical place to put that, when ownership is all released the PASID table of the group must be empty. Lu? > > Otherwise everything blows up if you attach an iommu_domain to two > > RIDs - the API demands that every RID gets its own PASID mapping, even > > if the RID shares iommu_domains. We do not have an API to share PASID > > tables. > > Well, we still do since SMMU implements it. Changing the API is fine, but > someone will need to rework the SMMU driver to align with the new meaning > of iommu_domain. I can take a stab if no one volunteers but probably not > before next year. I think given the current progression it is OK for this series to leave the SMMU driver with a bit of a different view of how the API should work. The main target here is the in-kernel drivers and they won't trigger these cases. As we extend things into userspace PASID support we may want to block SMMU PASID support through iommfd/vfio until it is updated. I've been thinking on and off about this - we likely need to have a conformance test suite as part of iommufd that is specifically for checking that the iommu driver meets the API. So it would do things like exercise scenario (a), attaching domains to all sorts of combinations, and so on. We know this from other driver subsystems that drivers can implement the uAPI incorrectly and it causes a lot of pain for userspace. Jason

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UADK双周例会
by openEuler conference 14 Sep '22

14 Sep '22

您好！ sig-AccLib SIG 邀请您参加 2022-09-14 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131。会议链接：https://us06web.zoom.us/j/81629915294?pwd=UkNmL21KVTkyZ2llNGpwWGpQQ0pUUT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-09-14 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131。 You can join the meeting at https://us06web.zoom.us/j/81629915294?pwd=UkNmL21KVTkyZ2llNGpwWGpQQ0pUUT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

openeuler
by Adrian Liu 12 Sep '22

12 Sep '22

(If you are NOT CEO, please kindly forward this to your CEO, because this is urgent. If you believe this has been sent to you in error, please ignore it. Thanks)Dear CEO,We are the domain name registration service company in China. On September 12, 2022, we received an application from Hongfeng Ltd requested "openeuler" as their internet keyword and China (CN) domain names (openeuler.cn, openeuler.com.cn, openeuler.net.cn, openeuler.org.cn). But after checking it, we find this name conflict with your company name or trademark. In order to deal with this matter better, it's necessary to send email to you and confirm whether this company is your business partner in China? Best Regards Adrian Liu Service & Operations Manager China Registry (Head Office) Tel: +86-2161918696 Fax: +86-2161918697 Mob: +86-13816428671 6012, Xingdi Building, No. 1698 Yishan Road, Shanghai 201103, China ***************************************** This email contains privileged and confidential information intended for the addressee only. If you are not the intended recipient, please destroy this email and inform the sender immediately. We appreciate you respecting the confidentiality of this information by not disclosing or using the information in this email.

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[PATCH 0/2] uadk/comp - support zlibwrapper for compression
by Yang Shen 05 Sep '22

05 Sep '22

Add a set of zlibwrapper interfaces for users to fit uadk interfaces quickly. Yang Shen (2): uadk/comp - support reset session zlibwrapper: add zlibwrapper to adapt for zlib interface Makefile.am | 2 +- include/wd_comp.h | 9 +- wd_comp.c | 15 +++ wd_zlibwrapper.c | 329 ++++++++++++++++++++++++++++++++++++++++++++++ wd_zlibwrapper.h | 112 ++++++++++++++++ 5 files changed, 465 insertions(+), 2 deletions(-) create mode 100644 wd_zlibwrapper.c create mode 100644 wd_zlibwrapper.h -- 2.24.0

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UADK周例会
by openEuler conference 30 Aug '22

30 Aug '22

您好！ sig-AccLib SIG 邀请您参加 2022-08-31 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/86127515975?pwd=eWVqdWpBN3diUTB4TGFZc3gwV0xjdz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-08-31 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/86127515975?pwd=eWVqdWpBN3diUTB4TGFZc3gwV0xjdz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

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Re: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 29 Aug '22

29 Aug '22

Hi, Akhil On 2022/8/28 下午9:02, Akhil Goyal wrote: >> UADK compression PMD provides poll mode compression & decompression >> driver >> UADK crypto PMD provides poll mode driver >> All cryptography operations are using UADK crypto API. >> All compression operations are using UADK compress API. >> >> Hardware accelerators using UADK are supposed to be supported. >> Currently supported hardware platforms: >> HiSilicon Kunpeng920 and Kunpeng930 >> >> Test: >> sudo dpdk-test --vdev=compress_uadk >> sudo dpdk-test --vdev=crypto_uadk >> >> v1: >> Target to DPDK 22.11 >> Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ >> >> Suggested from Akhil Goyal <gakhil(a)marvell.com> >>> Current release cycle is DPDK-22.07 for which this patchset is late. >>> As we had the V1 deadline last month. >>> This patchset can go for next release cycle which is 22.11. >> Zhangfei Gao (3): >> compress/uadk: add uadk compression PMD >> test/crypto: add cryptodev_uadk_autotest >> crypto/uadk: add uadk crypto PMD >> >> app/test/test_cryptodev.c | 7 + >> app/test/test_cryptodev.h | 1 + >> doc/guides/compressdevs/index.rst | 1 + >> doc/guides/compressdevs/uadk.rst | 60 ++ >> doc/guides/cryptodevs/index.rst | 1 + >> doc/guides/cryptodevs/uadk.rst | 70 ++ >> drivers/compress/meson.build | 1 + >> drivers/compress/uadk/meson.build | 28 + >> drivers/compress/uadk/uadk_compress_pmd.c | 489 +++++++++ >> drivers/compress/uadk/version.map | 3 + >> drivers/crypto/meson.build | 1 + >> drivers/crypto/uadk/meson.build | 28 + >> drivers/crypto/uadk/uadk_crypto_pmd.c | 1137 +++++++++++++++++++++ >> drivers/crypto/uadk/version.map | 3 + >> 14 files changed, 1830 insertions(+) >> create mode 100644 doc/guides/compressdevs/uadk.rst >> create mode 100644 doc/guides/cryptodevs/uadk.rst >> create mode 100644 drivers/compress/uadk/meson.build >> create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c >> create mode 100644 drivers/compress/uadk/version.map >> create mode 100644 drivers/crypto/uadk/meson.build >> create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c >> create mode 100644 drivers/crypto/uadk/version.map >> > Please split the series into two - crypto pmd and compression pmd. > And split each of the PMD into logical small (individually compiled) patches. > > Update MAINTAINERS file > Update documentation in doc/guides/cryptodevs/features/uadk.ini > and doc/guides/compressdevs/features/uadk.ini Thanks for the suggestion. > > Also UADK does not look to be a PMD name. It is some development kit > Outside of DPDK. Can you rename it to something else? > > Is there some dependency to build it using external libraries etc? > Can you explain what exactly is UADK? UADK is a framework for user application to access hardware accelerator . https://github.com/Linaro/uadk/blob/master/docs/wd_design.md UADK relies on SVA (Shared Virtual Address) that needs to be supported by IOMMU. As a result, user application can directly use virtual address for dma, since iommu and mmu share the same virtual address by coping the same page table, which enhance the performance as well as easy usability. UADK provide algorithm libraries and api for application to use. The library will find the real hardware in the platform. We also provide openssl engine for uadk, https://github.com/Linaro/uadk_engine For alignment, we planned to provide uadk dpdk pmd as well, with the name as UADK. What do you think. Thanks.

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Fw:RE: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 29 Aug '22

29 Aug '22

  ------------------ Original ------------------ From: "Akhil Goyal" <gakhil(a)marvell.com>; Date: Sun, Aug 28, 2022 09:02 PM To: "Zhangfei Gao"<zhangfei.gao(a)linaro.org>;"Declan Doherty"<declan.doherty(a)intel.com>;"Fan Zhang"<roy.fan.zhang(a)intel.com>;"Ashish Gupta"<ashishg(a)marvell.com>;"Ray Kinsella"<mdr(a)ashroe.eu>; Cc: "dev(a)dpdk.org"<dev(a)dpdk.org>; Subject: RE: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD > UADK compression PMD provides poll mode compression & decompression > driver > UADK crypto PMD provides poll mode driver > All cryptography operations are using UADK crypto API. > All compression operations are using UADK compress API. > > Hardware accelerators using UADK are supposed to be supported. > Currently supported hardware platforms: > HiSilicon Kunpeng920 and Kunpeng930 > > Test: > sudo dpdk-test --vdev=compress_uadk > sudo dpdk-test --vdev=crypto_uadk > > v1: > Target to DPDK 22.11 > Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ > > Suggested from Akhil Goyal <gakhil(a)marvell.com> > > Current release cycle is DPDK-22.07 for which this patchset is late. > > As we had the V1 deadline last month. > > This patchset can go for next release cycle which is 22.11. > > Zhangfei Gao (3): >   compress/uadk: add uadk compression PMD >   test/crypto: add cryptodev_uadk_autotest >   crypto/uadk: add uadk crypto PMD > >  app/test/test_cryptodev.c                 |    7 + >  app/test/test_cryptodev.h                 |    1 + >  doc/guides/compressdevs/index.rst         |    1 + >  doc/guides/compressdevs/uadk.rst          |   60 ++ >  doc/guides/cryptodevs/index.rst           |    1 + >  doc/guides/cryptodevs/uadk.rst            |   70 ++ >  drivers/compress/meson.build              |    1 + >  drivers/compress/uadk/meson.build         |   28 + >  drivers/compress/uadk/uadk_compress_pmd.c |  489 +++++++++ >  drivers/compress/uadk/version.map         |    3 + >  drivers/crypto/meson.build                |    1 + >  drivers/crypto/uadk/meson.build           |   28 + >  drivers/crypto/uadk/uadk_crypto_pmd.c     | 1137 +++++++++++++++++++++ >  drivers/crypto/uadk/version.map           |    3 + >  14 files changed, 1830 insertions(+) >  create mode 100644 doc/guides/compressdevs/uadk.rst >  create mode 100644 doc/guides/cryptodevs/uadk.rst >  create mode 100644 drivers/compress/uadk/meson.build >  create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c >  create mode 100644 drivers/compress/uadk/version.map >  create mode 100644 drivers/crypto/uadk/meson.build >  create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c >  create mode 100644 drivers/crypto/uadk/version.map > Please split the series into two - crypto pmd and compression pmd. And split each of the PMD into logical small (individually compiled) patches. Update MAINTAINERS file Update documentation in doc/guides/cryptodevs/features/uadk.ini and doc/guides/compressdevs/features/uadk.ini Also UADK does not look to be a PMD name. It is some development kit Outside of DPDK. Can you rename it to something else? Is there some dependency to build it using external libraries etc? Can you explain what exactly is UADK? Regards, Akhil

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[PATCH] uadk: Update the symbol list for uadk libraries
by Longfang Liu 27 Aug '22

27 Aug '22

From: liulongfang <liulongfang(a)huawei.com> Explicitly declare the function symbol list of its external interface for the so dynamic library file of uadk, only make the external interface functions visible to the outside APP, and all other functions are only used internally. Signed-off-by: liulongfang <liulongfang(a)huawei.com> --- Makefile.am | 18 +++-- libwd.map | 29 ++++++++ libwd_comp.map | 27 ++++++++ libwd_crypto.map | 173 +++++++++++++++++++++++++++++++++++++++++++++++ v1/libwd.map | 165 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 405 insertions(+), 7 deletions(-) create mode 100644 libwd.map create mode 100644 libwd_comp.map create mode 100644 libwd_crypto.map create mode 100644 v1/libwd.map diff --git a/Makefile.am b/Makefile.am index b3f07df..066b954 100644 --- a/Makefile.am +++ b/Makefile.am @@ -100,20 +100,25 @@ libhisi_sec_la_DEPENDENCIES = libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) libhisi_hpre_la_DEPENDENCIES = libwd.la libwd_crypto.la else -libwd_la_LDFLAGS=$(UADK_VERSION) +UADK_WD_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd.map +UADK_CRYPTO_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_crypto.map +UADK_COMP_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_comp.map +UADK_V1_SYMBOL= -Wl,--version-script,$(top_srcdir)/v1/libwd.map + +libwd_la_LDFLAGS=$(UADK_VERSION) $(UADK_WD_SYMBOL) $(UADK_V1_SYMBOL) libwd_la_LIBADD= -lnuma libwd_comp_la_LIBADD= -lwd -ldl -libwd_comp_la_LDFLAGS=$(UADK_VERSION) +libwd_comp_la_LDFLAGS=$(UADK_VERSION) $(UADK_COMP_SYMBOL) libwd_comp_la_DEPENDENCIES= libwd.la -libhisi_zip_la_LIBADD= -ldl -libhisi_zip_la_LDFLAGS=$(UADK_VERSION) - libwd_crypto_la_LIBADD= -lwd -ldl -lnuma -lm -libwd_crypto_la_LDFLAGS=$(UADK_VERSION) +libwd_crypto_la_LDFLAGS=$(UADK_VERSION) $(UADK_CRYPTO_SYMBOL) libwd_crypto_la_DEPENDENCIES= libwd.la +libhisi_zip_la_LIBADD= -ldl +libhisi_zip_la_LDFLAGS=$(UADK_VERSION) + libhisi_sec_la_LIBADD= -lwd -lwd_crypto libhisi_sec_la_LDFLAGS=$(UADK_VERSION) libhisi_sec_la_DEPENDENCIES= libwd.la libwd_crypto.la @@ -123,5 +128,4 @@ libhisi_hpre_la_LDFLAGS=$(UADK_VERSION) libhisi_hpre_la_DEPENDENCIES= libwd.la libwd_crypto.la endif # WD_STATIC_DRV - SUBDIRS=. test v1/test uadk_tool sample diff --git a/libwd.map b/libwd.map new file mode 100644 index 0000000..e667226 --- /dev/null +++ b/libwd.map @@ -0,0 +1,29 @@ +UADK_2.0 { +global: + wd_request_ctx; + wd_release_ctx; + wd_ctx_get_api; + wd_ctx_wait; + wd_is_sva; + wd_is_isolate; + wd_get_accel_name; + wd_get_numa_id; + wd_get_avail_ctx; + wd_get_accel_list; + wd_get_accel_dev; + wd_free_list_accels; + + wd_block_alloc; + wd_block_free; + wd_blockpool_create; + wd_blockpool_destroy; + wd_mempool_create; + wd_mempool_destroy; + wd_mempool_stats; + wd_blockpool_stats; + wd_get_version; + wd_need_debug; + wd_need_info; + +local: *; +}; diff --git a/libwd_comp.map b/libwd_comp.map new file mode 100644 index 0000000..0e481c4 --- /dev/null +++ b/libwd_comp.map @@ -0,0 +1,27 @@ +UADK_COMP_2.0 { +global: + wd_comp_init; + wd_comp_uninit; + wd_comp_alloc_sess; + wd_comp_free_sess; + wd_do_comp_sync; + wd_do_comp_strm; + wd_do_comp_async; + wd_comp_poll_ctx; + wd_comp_poll; + wd_do_comp_sync2; + wd_comp_env_init; + wd_comp_env_uninit; + wd_comp_ctx_num_init; + wd_comp_ctx_num_uninit; + wd_comp_get_env_param; + wd_comp_set_driver; + wd_comp_get_driver; + wd_comp_get_msg; + + wd_sched_rr_instance; + wd_sched_rr_alloc; + wd_sched_rr_release; + +local: *; +}; diff --git a/libwd_crypto.map b/libwd_crypto.map new file mode 100644 index 0000000..5fadc53 --- /dev/null +++ b/libwd_crypto.map @@ -0,0 +1,173 @@ +UADK_CRYPTO_2.0 { +global: + wd_cipher_init; + wd_cipher_uninit; + wd_cipher_alloc_sess; + wd_cipher_free_sess; + wd_cipher_set_key; + wd_do_cipher_sync; + wd_do_cipher_async; + wd_cipher_poll_ctx; + wd_cipher_poll; + wd_cipher_env_init; + wd_cipher_env_uninit; + wd_cipher_ctx_num_init; + wd_cipher_ctx_num_uninit; + wd_cipher_get_env_param; + wd_cipher_set_driver; + wd_cipher_get_driver; + wd_cipher_get_msg; + + wd_aead_init; + wd_aead_uninit; + wd_aead_alloc_sess; + wd_aead_free_sess; + wd_aead_set_ckey; + wd_aead_set_akey; + wd_do_aead_sync; + wd_do_aead_async; + wd_aead_set_authsize; + wd_aead_get_authsize; + wd_aead_get_maxauthsize; + wd_aead_poll_ctx; + wd_aead_poll; + wd_aead_env_init; + wd_aead_env_uninit; + wd_aead_ctx_num_init; + wd_aead_ctx_num_uninit; + wd_aead_get_env_param; + wd_aead_set_driver; + wd_aead_get_driver; + wd_aead_get_msg; + + wd_digest_init; + wd_digest_uninit; + wd_digest_alloc_sess; + wd_digest_free_sess; + wd_do_digest_sync; + wd_do_digest_async; + wd_digest_set_key; + wd_digest_poll_ctx; + wd_digest_poll; + wd_digest_env_init; + wd_digest_env_uninit; + wd_digest_ctx_num_init; + wd_digest_ctx_num_uninit; + wd_digest_get_env_param; + wd_digest_set_driver; + wd_digest_get_driver; + wd_digest_get_msg; + + wd_rsa_is_crt; + wd_rsa_get_key_bits; + wd_rsa_get_pubkey; + wd_rsa_get_prikey; + wd_rsa_set_pubkey_params; + wd_rsa_get_pubkey_params; + wd_rsa_set_prikey_params; + wd_rsa_get_prikey_params; + wd_rsa_set_crt_prikey_params; + wd_rsa_get_crt_prikey_params; + wd_rsa_new_kg_in; + wd_rsa_del_kg_in; + wd_rsa_get_kg_in_params; + wd_rsa_new_kg_out; + wd_rsa_del_kg_out; + wd_rsa_get_kg_out_params; + wd_rsa_get_kg_out_crt_params; + wd_rsa_kg_in_data; + wd_rsa_kg_out_data; + wd_rsa_set_kg_out_crt_psz; + wd_rsa_set_kg_out_psz; + wd_rsa_init; + wd_rsa_uninit; + wd_rsa_alloc_sess; + wd_rsa_free_sess; + wd_do_rsa_async; + wd_rsa_poll; + wd_do_rsa_sync; + wd_do_rsa_async; + wd_rsa_poll_ctx; + wd_rsa_env_init; + wd_rsa_env_uninit; + wd_rsa_ctx_num_init; + wd_rsa_ctx_num_uninit; + wd_rsa_get_env_param; + wd_rsa_set_driver; + wd_rsa_get_driver; + wd_rsa_get_msg; + + wd_dh_get_mode; + wd_dh_key_bits; + wd_dh_set_g; + wd_dh_get_g; + wd_dh_alloc_sess; + wd_dh_free_sess; + wd_do_dh_async; + wd_do_dh_sync; + wd_dh_poll_ctx; + wd_dh_poll; + wd_dh_init; + wd_dh_uninit; + wd_dh_env_init; + wd_dh_env_uninit; + wd_dh_ctx_num_init; + wd_dh_ctx_num_uninit; + wd_dh_get_env_param; + wd_dh_set_driver; + wd_dh_get_driver; + wd_dh_get_msg; + + wd_ecc_get_key_bits; + wd_ecc_get_key; + wd_ecc_set_prikey; + wd_ecc_get_prikey; + wd_ecc_set_pubkey; + wd_ecc_get_pubkey; + wd_ecc_del_in; + wd_ecc_del_out; + wd_ecc_get_prikey_params; + wd_ecc_get_pubkey_params; + wd_ecxdh_new_in; + wd_ecxdh_new_out; + wd_ecxdh_get_out_params; + wd_ecc_set_driver; + wd_ecc_get_driver; + wd_ecc_get_msg; + + wd_sm2_new_sign_in; + wd_sm2_new_verf_in; + wd_sm2_new_enc_in; + wd_sm2_new_dec_in; + wd_sm2_new_sign_out; + wd_sm2_new_enc_out; + wd_sm2_new_dec_out; + wd_sm2_new_kg_out; + wd_sm2_get_sign_out_params; + wd_sm2_get_kg_out_params; + wd_sm2_get_enc_out_params; + wd_sm2_get_dec_out_params; + + wd_ecdsa_new_sign_in; + wd_ecdsa_new_verf_in; + wd_ecdsa_new_sign_out; + wd_ecdsa_get_sign_out_params; + wd_ecc_init; + wd_ecc_uninit; + wd_ecc_alloc_sess; + wd_ecc_free_sess; + wd_ecc_poll; + wd_do_ecc_sync; + wd_do_ecc_async; + wd_ecc_poll_ctx; + wd_ecc_env_init; + wd_ecc_env_uninit; + wd_ecc_ctx_num_init; + wd_ecc_ctx_num_uninit; + wd_ecc_get_env_param; + + wd_sched_rr_instance; + wd_sched_rr_alloc; + wd_sched_rr_release; +local: *; +}; diff --git a/v1/libwd.map b/v1/libwd.map new file mode 100644 index 0000000..4e6b639 --- /dev/null +++ b/v1/libwd.map @@ -0,0 +1,165 @@ +UADK_1.0 { +global: + wd_request_queue; + wd_release_queue; + wd_send; + wd_recv; + wd_wait; + wd_recv_sync; + wd_reserve_memory; + wd_share_reserved_memory; + wd_get_available_dev_num; + wd_get_node_id; + wd_iova_map; + wd_iova_unmap; + wd_dma_to_va; + wd_register_log; + log_out; + + wd_blkpool_create; + wd_blkpool_destroy; + wd_alloc_blk; + wd_free_blk; + wd_get_free_blk_num; + wd_blk_alloc_failures; + wd_blk_iova_map; + wd_blk_iova_unmap; + wd_blksize; + + wcrypto_create_aead_ctx; + wcrypto_set_aead_ckey; + wcrypto_set_aead_akey; + wcrypto_aead_setauthsize; + wcrypto_aead_getauthsize; + wcrypto_aead_get_maxauthsize; + wcrypto_do_aead; + wcrypto_burst_aead; + wcrypto_aead_poll; + wcrypto_del_aead_ctx; + + wcrypto_create_cipher_ctx; + wcrypto_set_cipher_key; + wcrypto_do_cipher; + wcrypto_cipher_poll; + wcrypto_del_cipher_ctx; + wcrypto_burst_cipher; + + wcrypto_create_digest_ctx; + wcrypto_set_digest_key; + wcrypto_do_digest; + wcrypto_digest_poll; + wcrypto_del_digest_ctx; + wcrypto_burst_digest; + + wcrypto_create_comp_ctx; + wcrypto_do_comp; + wcrypto_comp_poll; + wcrypto_del_comp_ctx; + + wcrypto_create_dh_ctx; + wcrypto_dh_is_g2; + wcrypto_dh_key_bits; + wcrypto_do_dh; + wcrypto_dh_poll; + wcrypto_del_dh_ctx; + wcrypto_set_dh_g; + wcrypto_get_dh_g; + + wcrypto_get_ecc_key_bits; + wcrypto_create_ecc_ctx; + wcrypto_del_ecc_ctx; + wcrypto_get_ecc_key; + wcrypto_set_ecc_prikey; + wcrypto_get_ecc_prikey; + wcrypto_set_ecc_pubkey; + wcrypto_get_ecc_pubkey; + wcrypto_del_ecc_in; + wcrypto_del_ecc_out; + wcrypto_get_ecc_prikey_params; + wcrypto_get_ecc_pubkey_params; + wcrypto_get_ecxdh_in_params; + wcrypto_get_ecxdh_out_params; + wcrypto_new_ecxdh_in; + wcrypto_new_ecxdh_out; + wcrypto_do_ecxdh; + wcrypto_ecxdh_poll; + wcrypto_new_ecdsa_sign_in; + wcrypto_new_ecdsa_verf_in; + wcrypto_new_ecdsa_sign_out; + wcrypto_get_ecdsa_sign_in_params; + wcrypto_get_ecdsa_verf_in_params; + wcrypto_get_ecdsa_sign_out_params; + wcrypto_do_ecdsa; + wcrypto_ecdsa_poll; + + wcrypto_new_sm2_sign_in; + wcrypto_new_sm2_verf_in; + wcrypto_new_sm2_sign_out; + wcrypto_get_sm2_sign_out_params; + wcrypto_new_sm2_enc_in; + wcrypto_new_sm2_dec_in; + wcrypto_new_sm2_enc_out; + wcrypto_new_sm2_dec_out; + wcrypto_new_sm2_kg_out; + wcrypto_get_sm2_kg_out_params; + wcrypto_get_sm2_enc_out_params; + wcrypto_get_sm2_dec_out_params; + wcrypto_do_sm2; + wcrypto_sm2_poll; + + wcrypto_rsa_is_crt; + wcrypto_rsa_key_bits; + wcrypto_create_rsa_ctx; + wcrypto_get_rsa_pubkey; + wcrypto_get_rsa_prikey; + wcrypto_set_rsa_pubkey_params; + wcrypto_get_rsa_pubkey_params; + wcrypto_set_rsa_prikey_params; + wcrypto_get_rsa_prikey_params; + wcrypto_set_rsa_crt_prikey_params; + wcrypto_get_rsa_crt_prikey_params; + wcrypto_new_kg_in; + wcrypto_del_kg_in; + wcrypto_get_rsa_kg_in_params; + wcrypto_new_kg_out; + wcrypto_del_kg_out; + wcrypto_get_rsa_kg_out_params; + wcrypto_get_rsa_kg_out_crt_params; + wcrypto_rsa_kg_in_data; + wcrypto_rsa_kg_out_data; + wcrypto_set_rsa_kg_out_crt_psz; + wcrypto_set_rsa_kg_out_psz; + wcrypto_do_rsa; + wcrypto_rsa_poll; + wcrypto_del_rsa_ctx; + + wcrypto_create_rng_ctx; + wcrypto_del_rng_ctx; + wcrypto_do_rng; + wcrypto_rng_poll; + + wd_sglpool_create; + wd_sglpool_destroy; + wd_alloc_sgl; + wd_free_sgl; + wd_sgl_merge; + wd_sgl_cp_to_pbuf; + wd_sgl_cp_from_pbuf; + wd_sgl_iova_map; + wd_sgl_iova_unmap; + wd_get_last_sge_buf; + wd_get_first_sge_buf; + wd_get_sgl_sge_num; + wd_get_sgl_buf_num; + wd_get_sge_buf; + wd_get_sgl_buf_sum; + wd_get_sgl_mem_size; + wd_get_free_sgl_num; + wd_get_free_sgl_sge_num; + wd_get_free_buf_num; + wd_get_sgl_datalen; + wd_get_sge_datalen; + wd_get_sgl_bufsize; + +local: *; +}; -- 2.33.0

1 0

[PATCH v2 0/6] uadk - add wd_comp_init2
by Yang Shen 27 Aug '22

27 Aug '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 +++++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 ++++-- wd_cipher.c | 35 ++++-- wd_comp.c | 257 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 ++++-- wd_ecc.c | 33 ++++-- wd_rsa.c | 33 ++++-- wd_util.c | 75 +++++++++++- 16 files changed, 872 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

3 17

acc到期通知
by admin 25 Aug '22

25 Aug '22

1 0

UADK双周例会
by openEuler conference 16 Aug '22

16 Aug '22

您好！ sig-AccLib SIG 邀请您参加 2022-08-17 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/89377406109?pwd=SDVCTndMR3dZOFhtUHhqWUV5S0p2UT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-08-17 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/89377406109?pwd=SDVCTndMR3dZOFhtUHhqWUV5S0p2UT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH] uadk_digest: fix the full mac buffer length as doing long hash
by Kai Ye 16 Aug '22

16 Aug '22

Sha224 and Sha384 need full length mac buffer as doing long hash. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_digest.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/src/uadk_digest.c b/src/uadk_digest.c index 0fb2cfb..693283e 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -476,7 +476,7 @@ static void digest_priv_ctx_setup(struct digest_priv_ctx *priv, { priv->setup.alg = alg; priv->setup.mode = mode; - priv->req.out_buf_bytes = out_len; + priv->req.out_buf_bytes = MAX_DIGEST_LENGTH; priv->req.out_bytes = out_len; } @@ -535,15 +535,30 @@ soft_init: return digest_soft_init(priv->soft_ctx, priv->e_nid); } +static void digest_update_out_length(EVP_MD_CTX *ctx) +{ + struct digest_priv_ctx *priv = + (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); + + /* Sha224 and Sha384 need full length mac buffer as doing long hash */ + if (priv->e_nid == NID_sha224) + priv->req.out_bytes = WD_DIGEST_SHA224_FULL_LEN; + + if (priv->e_nid == NID_sha384) + priv->req.out_bytes = WD_DIGEST_SHA384_FULL_LEN; +} + static int digest_update_inner(EVP_MD_CTX *ctx, const void *data, size_t data_len) { struct digest_priv_ctx *priv = - (struct digest_priv_ctx *) EVP_MD_CTX_md_data(ctx); + (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); const unsigned char *tmpdata = (const unsigned char *)data; size_t left_len = data_len; int copy_to_bufflen; int ret; + digest_update_out_length(ctx); + priv->req.has_next = DIGEST_DOING; while (priv->last_update_bufflen + left_len > DIGEST_BLOCK_SIZE) { @@ -701,6 +716,12 @@ static int uadk_e_digest_final(EVP_MD_CTX *ctx, unsigned char *digest) priv->req.in_bytes = priv->last_update_bufflen; priv->e_nid = EVP_MD_nid(EVP_MD_CTX_md(ctx)); + if (priv->e_nid == NID_sha224) + priv->req.out_bytes = WD_DIGEST_SHA224_LEN; + + if (priv->e_nid == NID_sha384) + priv->req.out_bytes = WD_DIGEST_SHA384_LEN; + ret = async_setup_async_event_notification(&op); if (unlikely(!ret)) { fprintf(stderr, "failed to setup async event notification.\n"); -- 2.30.0

1 0

acc密码到期通知
by admin-openeuler.org 16 Aug '22

16 Aug '22

1 0

[PATCH 1/6] test: add new testing case
by Kai Ye 15 Aug '22

15 Aug '22

supports new auth algs and cipher algs. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- test/hisi_sec_test/test_hisi_sec.c | 185 +++++++++++++++++++++++++++-- test/hisi_sec_test/test_hisi_sec.h | 140 ++++++++++++++++++++++ 2 files changed, 317 insertions(+), 8 deletions(-) mode change 100644 => 100755 test/hisi_sec_test/test_hisi_sec.c diff --git a/test/hisi_sec_test/test_hisi_sec.c b/test/hisi_sec_test/test_hisi_sec.c old mode 100644 new mode 100755 index 6f27cd1..9aa4e56 --- a/test/hisi_sec_test/test_hisi_sec.c +++ b/test/hisi_sec_test/test_hisi_sec.c @@ -30,7 +30,7 @@ #define SCHED_SINGLE "sched_single" #define SCHED_NULL_CTX_SIZE 4 #define TEST_WORD_LEN 4096 -#define MAX_ALGO_PER_TYPE 13 +#define MAX_ALGO_PER_TYPE 16 #define MIN_SVA_BD_NUM 1 #define SGL_ALIGNED_BYTES 64 @@ -59,7 +59,26 @@ static struct hash_testvec g_long_hash_tv; char *skcipher_names[MAX_ALGO_PER_TYPE] = {"ecb(aes)", "cbc(aes)", "xts(aes)", "ofb(aes)", "cfb(aes)", "ecb(des3_ede)", - "cbc(des3_ede)", "cbc(sm4)", "xts(sm4)", "ofb(sm4)", "cfb(sm4)", "ecb(sm4)", NULL,}; + "cbc(des3_ede)", "cbc(sm4)", "xts(sm4)", "ofb(sm4)", "cfb(sm4)", "ecb(sm4)", + "cbc_cs1(aes)", "cbc_cs2(aes)", "cbc_cs3(aes)", NULL,}; + +enum digest_type { + LOCAL_SM3, + LOCAL_MD5, + LOCAL_SHA1, + LOCAL_SHA256, + LOCAL_SHA224, + LOCAL_SHA384, + LOCAL_SHA512, + LOCAL_SHA512_224, + LOCAL_SHA512_256, + LOCAL_AES_CMAC, + LOCAL_AES_GMAC_128, + LOCAL_AES_GMAC_192, + LOCAL_AES_GMAC_256, + LOCAL_AES_XCBC_MAC_96, +}; + struct sva_bd { char *src; char *dst; @@ -452,6 +471,66 @@ int get_cipher_resource(struct cipher_testvec **alg_tv, int* alg, int* mode) } tv = &sm4_ecb_tv_template_128[0]; break; + case 12: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; + case 13: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; + case 14: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; case 16: alg_type = WD_CIPHER_AES; mode_type = WD_CIPHER_CBC; @@ -622,8 +701,12 @@ static int test_sec_cipher_sync_once(void) } SEC_TST_PRT("req src--------->:\n"); - copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, - (void *)tv->ptext, (size_t)tv->len); + if (g_direction == 0) + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ptext, (size_t)tv->len); + else + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ctext, (size_t)tv->len); dump_mem(g_data_fmt, req.src, req.in_bytes); req.out_bytes = tv->len; @@ -755,8 +838,12 @@ static int test_sec_cipher_async_once(void) } SEC_TST_PRT("req src--------->:\n"); - copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, - (void *)tv->ptext, (size_t)tv->len); + if (g_direction == 0) + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ptext, (size_t)tv->len); + else + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ctext, (size_t)tv->len); dump_mem(g_data_fmt, req.src, req.in_bytes); req.out_bytes = tv->len; @@ -767,7 +854,6 @@ static int test_sec_cipher_async_once(void) goto out_dst; } - req.iv = malloc(IV_SIZE); if (!req.iv) { ret = -ENOMEM; @@ -1510,6 +1596,73 @@ int get_digest_resource(struct hash_testvec **alg_tv, int* alg, int* mode) tv->dsize = 32; alg_type = WD_DIGEST_SHA512_256; break; + case 9: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-cmac"); + tv = &aes_cmac_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_CMAC; + break; + case 10: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-128"); + tv = &aes_gmac_128_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 11: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-192"); + tv = &aes_gmac_192_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 12: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-256"); + tv = &aes_gmac_256_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 13: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-xcbc-mac-96"); + tv = &aes_xcbc_mac_96_tv_template[0]; + break; + } + tv->dsize = 12; + alg_type = WD_DIGEST_AES_XCBC_MAC_96; + break; + case 14: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-xcbc-prf-128"); + tv = &aes_xcbc_mac_96_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_XCBC_PRF_128; + break; + default: SEC_TST_PRT("keylenth error, default test alg: %s\n", "normal(sm3)"); return -EINVAL; @@ -1599,6 +1752,18 @@ static int sec_digest_sync_once(void) SEC_TST_PRT("sess set key failed!\n"); goto out_key; } + + if (g_testalg == LOCAL_AES_GMAC_128 || + g_testalg == LOCAL_AES_GMAC_192 || + g_testalg == LOCAL_AES_GMAC_256) { + req.iv = malloc(sizeof(char) * 16); + if (!req.iv) { + SEC_TST_PRT("failed to alloc iv memory!\n"); + goto out_key; + } + memcpy(req.iv, tv->iv, 16); + req.iv_bytes = 16; + } } gettimeofday(&start_tval, NULL); @@ -1625,6 +1790,7 @@ out_dst: free_buf(g_data_fmt, req.in); out_src: digest_uninit_config(); + free(req.iv); return ret; } @@ -3858,11 +4024,14 @@ static void print_help(void) SEC_TST_PRT(" 0 : AES-ECB; 1 : AES-CBC; 2 : AES-XTS; 3 : AES-OFB\n"); SEC_TST_PRT(" 4 : AES-CFB; 5 : 3DES-ECB; 6 : 3DES-CBC; 7 : SM4-CBC\n"); SEC_TST_PRT(" 8 : SM4-XTS; 9 : SM4-OFB; 10 : SM4-CFB; 11 : SM4-ECB\n"); + SEC_TST_PRT(" 12 : AES-CBC_CS1; 13 : AES-CBC_CS2; 14 : AES-CBC_CS3\n"); SEC_TST_PRT(" [--digest ]:\n"); SEC_TST_PRT(" specify symmetric hash algorithm\n"); SEC_TST_PRT(" 0 : SM3; 1 : MD5; 2 : SHA1; 3 : SHA256\n"); SEC_TST_PRT(" 4 : SHA224; 5 : SHA384; 6 : SHA512; 7 : SHA512_224\n"); - SEC_TST_PRT(" 8 : SHA512_256\n"); + SEC_TST_PRT(" 8 : SHA512_256; 9 : AES_CMAC; 10 : AES_GMAC_128\n"); + SEC_TST_PRT(" 11 : AES_GMAC_192; 12 : AES_GMAC_256; 13 : AES_XCBC_MAC_96\n"); + SEC_TST_PRT(" 14 : AES_XCBC_PRF_128\n"); SEC_TST_PRT(" [--aead ]:\n"); SEC_TST_PRT(" specify symmetric aead algorithm\n"); SEC_TST_PRT(" 0 : AES-CCM; 1 : AES-GCM; 2 : Hmac(sha256),cbc(aes)\n"); diff --git a/test/hisi_sec_test/test_hisi_sec.h b/test/hisi_sec_test/test_hisi_sec.h index defd3c4..8e21681 100644 --- a/test/hisi_sec_test/test_hisi_sec.h +++ b/test/hisi_sec_test/test_hisi_sec.h @@ -43,6 +43,7 @@ struct cipher_testvec { struct hash_testvec { char *key; char *plaintext; + char *iv; const char *digest; unsigned int psize; unsigned short ksize; @@ -298,6 +299,93 @@ struct hash_testvec hmac_sha512_256_tv_template[] = { }, }; +struct hash_testvec aes_cmac_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + +struct hash_testvec aes_gmac_128_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_gmac_192_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .ksize = 24, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_gmac_256_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .ksize = 32, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_xcbc_mac_96_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + +struct hash_testvec aes_xcbc_prf_128_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + struct hash_testvec long_hash_tv_template[] = { { /* @@ -878,6 +966,58 @@ struct cipher_testvec aes_cbc_tv_template_128[] = { } }; +struct cipher_testvec aes_cbc_cs1_tv_template_128[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .klen = 16, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .ctext = "\x4d\xe5\xc3\xd2\x9e\xe1\x29\x73" + "\x8b\x10\x7b\xde\x5e\x6c\xdb\x36" + "\x95\x35\x5e\x0c\x42\xc8\x33\x7a" + "\x17\x36\xa4\x34\xfd\xb1\x12\xbf", + .len = 32, + } +}; + +struct cipher_testvec aes_cbc_cs1_tv_template_192[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .klen = 24, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .len = 32, + } +}; + +struct cipher_testvec aes_cbc_cs1_tv_template_256[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .klen = 32, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .len = 32, + } +}; + struct cipher_testvec aes_cbc_perf_128[] = { { .key = "\x06\xa9\x21\x40\x36\xb8\xa1\x5b" -- 2.22.0

1 5

[PATCH v3 0/6] uadk - add wd_comp_init2
by Yang Shen 11 Aug '22

11 Aug '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v2->v3: - Add a time counter for wd_alg_try_init() to help for some unexpected error happening in driver's init. - Rename a function. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 +++++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 ++++-- wd_cipher.c | 35 ++++-- wd_comp.c | 257 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 ++++-- wd_ecc.c | 33 ++++-- wd_rsa.c | 33 ++++-- wd_util.c | 83 ++++++++++++- 16 files changed, 880 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

1 6

I will do china sourcing agent,negotiation,dropshipping,inspection etc. 13:07:03
by 仓忧卵积 06 Aug '22

06 Aug '22

hi,acc I will do china sourcing agent,negotiation,dropshipping,inspection etc. ✂Please kindly talk with me before ordering! We need have a free communication that know your requirement. Tired of a middle-men charging your higher prices? Lower effectively communication with factory or salesman? Delay the factory delivery time one time and one time? Manufacture can't accept your Mini order? Why I am a professional China sourcing agent? ➤ Over 10 years experience in international trade. ✔ Source ✔ Negotiation ✔ Dropshipping ✔ Print label ✔ Shipment ✔ Inspection ✔ Warehouse ✔ Help with Shopify/Amazon/Aliexpress etc. ✔ Searching by Google/Alibaba/Made-in-China/1688/Amazon FBA,local factory. ➤About visit factory, we usually go to Yiwu city ,Ningbo city ,Hangzhou city ect. If other city, kindly talk with me. We are dedicated to help small & medium overseas companies or individual sourcing from China. Instead of your company adjusting to the needs of a buying agent, I will comply with your demands so everything you want comes to fruition. ➤Just tell us what exactly you want, we can give you a satisfied result or plan ! *If you’re interest* Lee Skype：+86 15919103357 WhatsApp：+86 15919103357 Email: zhxcycq@ gmail .com WeChat：15919103357 2022-08-06 13:07:03

1 0

UADK周例会
by openEuler conference 27 Jul '22

27 Jul '22

您好！ sig-AccLib SIG 邀请您参加 2022-07-27 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。会议链接：https://us06web.zoom.us/j/82090595348?pwd=QlhNeFdOVjNXSTZ0WXAreWRCSEFCdz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-07-27 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/82090595348?pwd=QlhNeFdOVjNXSTZ0WXAreWRCSEFCdz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0