Hi, Jun TIAN and all
I am try to enable CXL for openEuler. While I found CXL is supported in 5.11 in the sheet from Intel arch SIG regular meeting. But I do not find the relative code in 5.11 and earlier kernel version. I could only find the CXL 2.0 support from 5.12 to 5.18 by git log --grep "Merge.*cxl". But CXL 2.0 is not supported by SPR.
At the same time, after read the [1], I realize that with proper BIOS support, user could make use of CXL memory devices through /dev/dax.
With above clue, I find CXL relative modifications in ndctl, minor changes in dmidecode and edk2 from Intel dcp overlay [2].
In summary, in order to support CXL, I should update ndctl, dmidecode and edk2. Do I understand correctly? Do I miss something?
Thanks
Bamvor
[1]: https://lore.kernel.org/all/CAPcyv4g-t_kY84TSq6WbWP96hjOupXx1KYtB9XznQ4y2Noo...