From: Kunkun Jiang jiangkunkun@huawei.com
virt inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8UZSP CVE: NA
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We will add IO_PGTABLE_QUIRK_ARM_HD to pgtbl_cfg->quirks when smmuv3 supports HTTU. However, this flag is not processed in the arm_64_lpae_alloc_pgtable_s1. As a result, device can't be attached. There are two similar flags: IO_PGTABLE_QUIRK_ARM_BBML1 and IO_PGTABLE_QUIRK_ARM_BBML2. This patch solves this problem.
Fixes: 341497bb2613 (iommu/io-pgtable-arm: Add quirk ARM_HD and ARM_BBMLx) Reported-by: Junxin Chen chenjunxin1@huawei.com Signed-off-by: Kunkun Jiang jiangkunkun@huawei.com Reviewed-by: Keqian Zhu zhukeqian1@huawei.com Signed-off-by: Zheng Zengkai zhengzengkai@huawei.com Signed-off-by: jiaqingtong jiaqingtong@huawei.com --- drivers/iommu/io-pgtable-arm.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 5c4033ada65a..825ac51a5559 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -810,7 +810,10 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_ARM_TTBR1 | - IO_PGTABLE_QUIRK_ARM_OUTER_WBWA)) + IO_PGTABLE_QUIRK_ARM_OUTER_WBWA | + IO_PGTABLE_QUIRK_ARM_HD | + IO_PGTABLE_QUIRK_ARM_BBML1 | + IO_PGTABLE_QUIRK_ARM_BBML2)) return NULL;
data = arm_lpae_alloc_pgtable(cfg); @@ -912,7 +915,9 @@ arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie) typeof(&cfg->arm_lpae_s2_cfg.vtcr) vtcr = &cfg->arm_lpae_s2_cfg.vtcr;
/* The NS quirk doesn't apply at stage 2 */ - if (cfg->quirks) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_HD | + IO_PGTABLE_QUIRK_ARM_BBML1 | + IO_PGTABLE_QUIRK_ARM_BBML2)) return NULL;
data = arm_lpae_alloc_pgtable(cfg);