From: Guangbin Huang huangguangbin2@huawei.com
mainline inclusion from mainline-v5.14-rc1 commit 28d3bada7d42 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...
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Currently, user gets priority map by implementing debugfs command "echo dump qos pri map > cmd", this command will dump info in dmesg. It's unnecessary and heavy.
To optimize it, create a single file "qos_pri_map" in tm directory and use cat command to get info. It will return info to userspace, rather than record in dmesg.
The display style is below: $ cat qos_pri_map vlan_to_pri: 0 PRI TC 0 0 1 1 2 2 3 3 4 0 5 1 6 2
Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 +++- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 45 ++++++++++++------- 3 files changed, 36 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 334ea2528d53..debe9ea1c97e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -187,6 +187,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_TM_PORT, HNAE3_DBG_CMD_TC_SCH_INFO, HNAE3_DBG_CMD_QOS_PAUSE_CFG, + HNAE3_DBG_CMD_QOS_PRI_MAP, HNAE3_DBG_CMD_TX_BD, HNAE3_DBG_CMD_RX_BD, HNAE3_DBG_CMD_MAC_UC, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 46dcfeefee96..51b21e295465 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -92,6 +92,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "qos_pri_map", + .cmd = HNAE3_DBG_CMD_QOS_PRI_MAP, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, { .name = "tx_bd_queue", .cmd = HNAE3_DBG_CMD_TX_BD, @@ -685,7 +692,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) if (!hns3_is_phys_func(h->pdev)) return;
- dev_info(&h->pdev->dev, "dump qos pri map\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n"); dev_info(&h->pdev->dev, "dump mac tbl\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 34cf78411715..121943eb5776 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1020,32 +1020,41 @@ static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf, return 0; }
-static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev) +static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf, + int len) { +#define HCLGE_DBG_TC_MASK 0x0F +#define HCLGE_DBG_TC_BIT_WIDTH 4 + struct hclge_qos_pri_map_cmd *pri_map; struct hclge_desc desc; + int pos = 0; + u8 *pri_tc; + u8 tc, i; int ret;
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PRI_TO_TC_MAPPING, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, - "dump qos pri map fail, ret = %d\n", ret); - return; + "failed to dump qos pri map, ret = %d\n", ret); + return ret; }
pri_map = (struct hclge_qos_pri_map_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "dump qos pri map\n"); - dev_info(&hdev->pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri); - dev_info(&hdev->pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc); - dev_info(&hdev->pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc); - dev_info(&hdev->pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc); - dev_info(&hdev->pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc); - dev_info(&hdev->pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc); - dev_info(&hdev->pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc); - dev_info(&hdev->pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc); - dev_info(&hdev->pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc); + + pos += scnprintf(buf + pos, len - pos, "vlan_to_pri: 0x%x\n", + pri_map->vlan_pri); + pos += scnprintf(buf + pos, len - pos, "PRI TC\n"); + + pri_tc = (u8 *)pri_map; + for (i = 0; i < HNAE3_MAX_TC; i++) { + tc = pri_tc[i >> 1] >> ((i & 1) * HCLGE_DBG_TC_BIT_WIDTH); + tc &= HCLGE_DBG_TC_MASK; + pos += scnprintf(buf + pos, len - pos, "%u %u\n", i, tc); + } + + return 0; }
static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) @@ -2010,9 +2019,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back;
- if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { - hclge_dbg_dump_qos_pri_map(hdev); - } else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { + if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { hclge_dbg_dump_qos_buf_cfg(hdev); } else if (strncmp(cmd_buf, "dump mac tbl", 12) == 0) { hclge_dbg_dump_mac_table(hdev); @@ -2067,6 +2074,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG, .dbg_dump = hclge_dbg_dump_qos_pause_cfg, }, + { + .cmd = HNAE3_DBG_CMD_QOS_PRI_MAP, + .dbg_dump = hclge_dbg_dump_qos_pri_map, + }, { .cmd = HNAE3_DBG_CMD_MAC_UC, .dbg_dump = hclge_dbg_dump_mac_uc,