From: Kan Liang kan.liang@linux.intel.com
mainline inclusion from mainline-v5.2-rc1 commit 6466ec14aaf44ff14a05369dcf0929d0f01171c6 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I47H3V CVE: NA
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commit 6466ec14aaf44ff14a05369dcf0929d0f01171c6 upstream.
XMM registers can be collected on Icelake and later platforms.
Add specific arch__intr_reg_mask(), which creating an event to check if the kernel and hardware can collect XMM registers.
Test on Skylake which doesn't support XMM registers collection. There is nothing changed.
#perf record -I? available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10 R11 R12 R13 R14 R15
Usage: perf record [<options>] [<command>] or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>] sample selected machine registers on interrupt, use '-I?' to list register names
#perf record -I [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.905 MB perf.data (2520 samples) ]
#perf evlist -v cycles: size: 112, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|REGS_INTR, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol: 1, bpf_event: 1, sample_regs_intr: 0xff0fff
Test on Icelake which support XMM registers collection.
#perf record -I? available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10 R11 R12 R13 R14 R15 XMM0 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 XMM9 XMM10 XMM11 XMM12 XMM13 XMM14 XMM15
Usage: perf record [<options>] [<command>] or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>] sample selected machine registers on interrupt, use '-I?' to list register names
#perf record -I [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.800 MB perf.data (318 samples) ]
#perf evlist -v cycles: size: 112, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|CPU|PERIOD|REGS_INTR, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol: 1, bpf_event: 1, sample_regs_intr: 0xffffffff00ff0fff
Committer notes:
Don't set attr.sample_period as a named struct init, as it is part of an unnamed union in 'struct perf_event_attr', and doing so breaks the build on older gcc versions, such as:
gcc version 4.1.2 20080704 (Red Hat 4.1.2-55) gcc version 4.4.7 20120313 (Red Hat 4.4.7-23) (GCC)
arch/x86/util/perf_regs.c: In function 'arch__intr_reg_mask': arch/x86/util/perf_regs.c:279: error: unknown field 'sample_period' specified in initializer cc1: warnings being treated as errors arch/x86/util/perf_regs.c:279: warning: missing braces around initializer arch/x86/util/perf_regs.c:279: warning: (near initialization for 'attr.<anonymous>')
Signed-off-by: Kan Liang kan.liang@linux.intel.com [ Only on a lenovo t480s, a skylake machine, where the XMM registers didn't show up in -I?/--user-regs=? as expected ] Tested-by: Arnaldo Carvalho de Melo acme@redhat.com Cc: Andi Kleen ak@linux.intel.com Cc: Jiri Olsa jolsa@kernel.org Link: http://lkml.kernel.org/r/1557865174-56264-3-git-send-email-kan.liang@linux.i... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Shen, Xiaochen xiaochen.shen@intel.com Signed-off-by: Jackie Liu liuyun01@kylinos.cn Signed-off-by: Zheng Zengkai zhengzengkai@huawei.com Reviewed-by: Yang Jihong yangjihong1@huawei.com Reviewed-by: Xie XiuQi xiexiuqi@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- tools/perf/arch/x86/include/perf_regs.h | 1 + tools/perf/arch/x86/util/perf_regs.c | 28 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+)
diff --git a/tools/perf/arch/x86/include/perf_regs.h b/tools/perf/arch/x86/include/perf_regs.h index b7321337d100..b7cd91a9014f 100644 --- a/tools/perf/arch/x86/include/perf_regs.h +++ b/tools/perf/arch/x86/include/perf_regs.h @@ -9,6 +9,7 @@ void perf_regs_load(u64 *regs);
#define PERF_REGS_MAX PERF_REG_X86_XMM_MAX +#define PERF_XMM_REGS_MASK (~((1ULL << PERF_REG_X86_XMM0) - 1)) #ifndef HAVE_ARCH_X86_64_SUPPORT #define PERF_REGS_MASK ((1ULL << PERF_REG_X86_32_MAX) - 1) #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32 diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c index 71d7604dbf0b..7886ca5263e3 100644 --- a/tools/perf/arch/x86/util/perf_regs.c +++ b/tools/perf/arch/x86/util/perf_regs.c @@ -270,3 +270,31 @@ int arch_sdt_arg_parse_op(char *old_op, char **new_op)
return SDT_ARG_VALID; } + +uint64_t arch__intr_reg_mask(void) +{ + struct perf_event_attr attr = { + .type = PERF_TYPE_HARDWARE, + .config = PERF_COUNT_HW_CPU_CYCLES, + .sample_type = PERF_SAMPLE_REGS_INTR, + .sample_regs_intr = PERF_XMM_REGS_MASK, + .precise_ip = 1, + .disabled = 1, + .exclude_kernel = 1, + }; + int fd; + /* + * In an unnamed union, init it here to build on older gcc versions + */ + attr.sample_period = 1; + + event_attr_init(&attr); + + fd = sys_perf_event_open(&attr, 0, -1, -1, 0); + if (fd != -1) { + close(fd); + return (PERF_XMM_REGS_MASK | PERF_REGS_MASK); + } + + return PERF_REGS_MASK; +}