From: Juxin Gao gaojuxin@loongson.cn
LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IB8166 CVE: NA
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In the new interrupt model, the AVEC interrupt controller no longer has a limit on the number of interrupts like the extended interrupt controller, so when using the avec interrupt model, pci_irq_limit is disabled by default.
Signed-off-by: Juxin Gao gaojuxin@loongson.cn --- arch/loongarch/include/asm/setup.h | 1 + drivers/irqchip/irq-loongarch-avec.c | 2 ++ drivers/pci/msi/msi.c | 18 ++++++++++++------ 3 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/loongarch/include/asm/setup.h b/arch/loongarch/include/asm/setup.h index ee52fb1e9963..eefb30c33ba3 100644 --- a/arch/loongarch/include/asm/setup.h +++ b/arch/loongarch/include/asm/setup.h @@ -12,6 +12,7 @@
#define VECSIZE 0x200
+extern bool disable_pci_irq_limit; extern unsigned long eentry; extern unsigned long tlbrentry; extern char init_command_line[COMMAND_LINE_SIZE]; diff --git a/drivers/irqchip/irq-loongarch-avec.c b/drivers/irqchip/irq-loongarch-avec.c index 2f7e64d22ad3..2f79a53e35a9 100644 --- a/drivers/irqchip/irq-loongarch-avec.c +++ b/drivers/irqchip/irq-loongarch-avec.c @@ -30,6 +30,7 @@ struct pending_list { struct list_head head; };
+bool disable_pci_irq_limit; static struct cpumask intersect_mask; static DEFINE_PER_CPU(struct pending_list, pending_list); #endif @@ -372,6 +373,7 @@ static int __init avecintc_init(struct irq_domain *parent) int ret, parent_irq; unsigned long value;
+ disable_pci_irq_limit = true; raw_spin_lock_init(&loongarch_avec.lock);
loongarch_avec.fwnode = irq_domain_alloc_named_fwnode("AVECINTC"); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 785bbf637ab5..4eea161663b1 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -421,6 +421,8 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, }
#ifdef CONFIG_LOONGARCH +#include <asm/setup.h> + static unsigned int pci_irq_numbers = 32;
static int __init pci_irq_limit(char *str) @@ -442,9 +444,11 @@ int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, int rc;
#ifdef CONFIG_LOONGARCH - if (maxvec > 32) { - maxvec = pci_irq_numbers; - minvec = min_t(int, pci_irq_numbers, minvec); + if (!disable_pci_irq_limit) { + if (maxvec > 32) { + maxvec = pci_irq_numbers; + minvec = min_t(int, pci_irq_numbers, minvec); + } } #endif
@@ -838,9 +842,11 @@ int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int int hwsize, rc, nvec = maxvec;
#ifdef CONFIG_LOONGARCH - if (maxvec > 32) { - nvec = pci_irq_numbers; - minvec = min_t(int, pci_irq_numbers, minvec); + if (!disable_pci_irq_limit) { + if (maxvec > 32) { + nvec = pci_irq_numbers; + minvec = min_t(int, pci_irq_numbers, minvec); + } } #endif