[PATCH OLK-6.6 082/121] arm_mpam: Probe MSCs to find the supported partid/pmg values

22 Jan 2024

From: James Morse james.morse@arm.com
maillist inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/log/?h=mpam/...
---------------------------
CPUs can generate traffic with a range of PARTID and PMG values,
but each MSC may have its own maximum size for these fields.
Before MPAM can be used, the driver needs to probe each RIS on
each MSC, to find the system-wide smallest value that can be used.
While doing this, RIS entries that firmware didn't describe are create
under MPAM_CLASS_UNKNOWN.
Signed-off-by: James Morse james.morse@arm.com
Signed-off-by: Zeng Heng zengheng4@huawei.com
---
 arch/arm64/kernel/mpam.c              |  10 ++
 drivers/platform/mpam/mpam_devices.c  | 166 ++++++++++++++++++++++++--
 drivers/platform/mpam/mpam_internal.h |   6 +
 include/linux/arm_mpam.h              |   2 +
 4 files changed, 177 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/kernel/mpam.c b/arch/arm64/kernel/mpam.c
index 894ca52549b8..02f43334f078 100644
--- a/arch/arm64/kernel/mpam.c
+++ b/arch/arm64/kernel/mpam.c
@@ -3,6 +3,7 @@
#include <asm/mpam.h>
+#include <linux/arm_mpam.h>
 #include <linux/jump_label.h>
 #include <linux/percpu.h>
@@ -11,3 +12,12 @@ DEFINE_STATIC_KEY_FALSE(mpam_enabled);
 DEFINE_PER_CPU(u64, arm64_mpam_default);
 DEFINE_PER_CPU(u64, arm64_mpam_current);
+static int __init arm64_mpam_register_cpus(void)
+{
+	u64 mpamidr = read_sanitised_ftr_reg(SYS_MPAMIDR_EL1);
+	u16 partid_max = FIELD_GET(MPAMIDR_PARTID_MAX, mpamidr);
+	u8 pmg_max = FIELD_GET(MPAMIDR_PMG_MAX, mpamidr);
+
+	return mpam_register_requestor(partid_max, pmg_max);
+}
+arch_initcall(arm64_mpam_register_cpus)
diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c
index 48811c90b78a..ec22c279cfe9 100644
--- a/drivers/platform/mpam/mpam_devices.c
+++ b/drivers/platform/mpam/mpam_devices.c
@@ -6,6 +6,7 @@
 #include <linux/acpi.h>
 #include <linux/atomic.h>
 #include <linux/arm_mpam.h>
+#include <linux/bitfield.h>
 #include <linux/cacheinfo.h>
 #include <linux/cpu.h>
 #include <linux/cpumask.h>
@@ -46,6 +47,15 @@ static u32 mpam_num_msc;
 static int mpam_cpuhp_state;
 static DEFINE_MUTEX(mpam_cpuhp_state_lock);
+/*
+ * The smallest common values for any CPU or MSC in the system.
+ * Generating traffic outside this range will result in screaming interrupts.
+ */
+u16 mpam_partid_max;
+u8 mpam_pmg_max;
+static bool partid_max_init, partid_max_published;
+static DEFINE_SPINLOCK(partid_max_lock);
+
 /*
  * mpam is enabled once all devices have been probed from CPU online callbacks,
  * scheduled via this work_struct. If access to an MSC depends on a CPU that
@@ -79,6 +89,14 @@ static u32 __mpam_read_reg(struct mpam_msc *msc, u16 reg)
    return readl_relaxed(msc->mapped_hwpage + reg);
 }
+static void __mpam_write_reg(struct mpam_msc *msc, u16 reg, u32 val)
+{
+	WARN_ON_ONCE(reg > msc->mapped_hwpage_sz);
+	WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility));
+
+	writel_relaxed(val, msc->mapped_hwpage + reg);
+}
+
 #define mpam_read_partsel_reg(msc, reg)			\
 ({							\
    u32 ____ret;					\
@@ -89,6 +107,59 @@ static u32 __mpam_read_reg(struct mpam_msc *msc, u16 reg)
    ____ret;					\
 })
+#define mpam_write_partsel_reg(msc, reg, val)			\
+({								\
+	lockdep_assert_held_once(&msc->part_sel_lock);		\
+	__mpam_write_reg(msc, MPAMCFG_##reg, val);		\
+})
+
+static u64 mpam_msc_read_idr(struct mpam_msc *msc)
+{
+	u64 idr_high = 0, idr_low;
+
+	lockdep_assert_held(&msc->part_sel_lock);
+
+	idr_low = mpam_read_partsel_reg(msc, IDR);
+	if (FIELD_GET(MPAMF_IDR_HAS_EXT, idr_low))
+		idr_high = mpam_read_partsel_reg(msc, IDR + 4);
+
+	return (idr_high << 32) | idr_low;
+}
+
+static void __mpam_part_sel(u8 ris_idx, u16 partid, struct mpam_msc *msc)
+{
+	u32 partsel;
+
+	lockdep_assert_held(&msc->part_sel_lock);
+
+	partsel = FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) |
+		  FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, partid);
+	mpam_write_partsel_reg(msc, PART_SEL, partsel);
+}
+
+int mpam_register_requestor(u16 partid_max, u8 pmg_max)
+{
+	int err = 0;
+
+	spin_lock(&partid_max_lock);
+	if (!partid_max_init) {
+		mpam_partid_max = partid_max;
+		mpam_pmg_max = pmg_max;
+		partid_max_init = true;
+	} else if (!partid_max_published) {
+		mpam_partid_max = min(mpam_partid_max, partid_max);
+		mpam_pmg_max = min(mpam_pmg_max, pmg_max);
+	} else {
+		/* New requestors can't lower the values */
+		if ((partid_max < mpam_partid_max) || (pmg_max < mpam_pmg_max))
+			err = -EBUSY;
+	}
+	spin_unlock(&partid_max_lock);
+
+	return err;
+}
+EXPORT_SYMBOL(mpam_register_requestor);
+
 static struct mpam_component *
 mpam_component_alloc(struct mpam_class *class, int id, gfp_t gfp)
 {
@@ -402,6 +473,7 @@ static int mpam_ris_create_locked(struct mpam_msc *msc, u8 ris_idx,
    cpumask_or(&comp->affinity, &comp->affinity, &ris->affinity);
    cpumask_or(&class->affinity, &class->affinity, &ris->affinity);
    list_add_rcu(&ris->comp_list, &comp->ris);
+	list_add_rcu(&ris->msc_list, &msc->ris);
return 0;
 }
@@ -419,10 +491,37 @@ int mpam_ris_create(struct mpam_msc *msc, u8 ris_idx,
    return err;
 }
+static struct mpam_msc_ris *mpam_get_or_create_ris(struct mpam_msc *msc,
+						   u8 ris_idx)
+{
+	int err;
+	struct mpam_msc_ris *ris, *found = ERR_PTR(-ENOENT);
+
+	lockdep_assert_held(&mpam_list_lock);
+
+	if (!test_bit(ris_idx, msc->ris_idxs)) {
+		err = mpam_ris_create_locked(msc, ris_idx, MPAM_CLASS_UNKNOWN,
+					     0, 0, GFP_ATOMIC);
+		if (err)
+			return ERR_PTR(err);
+	}
+
+	list_for_each_entry(ris, &msc->ris, msc_list) {
+		if (ris->ris_idx == ris_idx) {
+			found = ris;
+			break;
+		}
+	}
+
+	return found;
+}
+
 static int mpam_msc_hw_probe(struct mpam_msc *msc)
 {
    u64 idr;
-	int err;
+	u16 partid_max;
+	u8 ris_idx, pmg_max;
+	struct mpam_msc_ris *ris;
lockdep_assert_held(&msc->lock);
@@ -431,14 +530,43 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc)
    if ((idr & MPAMF_AIDR_ARCH_MAJOR_REV) != MPAM_ARCHITECTURE_V1) {
    	pr_err_once("%s does not match MPAM architecture v1.0\n",
    		    dev_name(&msc->pdev->dev));
-		err = -EIO;
-	} else {
-		msc->probed = true;
-		err = 0;
+		spin_unlock(&msc->part_sel_lock);
+		return -EIO;
    }
+
+	idr = mpam_msc_read_idr(msc);
    spin_unlock(&msc->part_sel_lock);
+	msc->ris_max = FIELD_GET(MPAMF_IDR_RIS_MAX, idr);
+
+	/* Use these values so partid/pmg always starts with a valid value */
+	msc->partid_max = FIELD_GET(MPAMF_IDR_PARTID_MAX, idr);
+	msc->pmg_max = FIELD_GET(MPAMF_IDR_PMG_MAX, idr);
+
+	for (ris_idx = 0; ris_idx <= msc->ris_max; ris_idx++) {
+		spin_lock(&msc->part_sel_lock);
+		__mpam_part_sel(ris_idx, 0, msc);
+		idr = mpam_msc_read_idr(msc);
+		spin_unlock(&msc->part_sel_lock);
+
+		partid_max = FIELD_GET(MPAMF_IDR_PARTID_MAX, idr);
+		pmg_max = FIELD_GET(MPAMF_IDR_PMG_MAX, idr);
+		msc->partid_max = min(msc->partid_max, partid_max);
+		msc->pmg_max = min(msc->pmg_max, pmg_max);
+
+		ris = mpam_get_or_create_ris(msc, ris_idx);
+		if (IS_ERR(ris)) {
+			return PTR_ERR(ris);
+		}
+	}
-	return err;
+	spin_lock(&partid_max_lock);
+	mpam_partid_max = min(mpam_partid_max, msc->partid_max);
+	mpam_pmg_max = min(mpam_pmg_max, msc->pmg_max);
+	spin_unlock(&partid_max_lock);
+
+	msc->probed = true;
+
+	return 0;
 }
static int mpam_cpu_online(unsigned int cpu)
@@ -742,9 +870,18 @@ static void mpam_enable_once(void)
    mpam_cpuhp_state = 0;
    mutex_unlock(&mpam_cpuhp_state_lock);
+	/*
+	 * Once the cpuhp callbacks have been changed, mpam_partid_max can no
+	 * longer change.
+	 */
+	spin_lock(&partid_max_lock);
+	partid_max_published = true;
+	spin_unlock(&partid_max_lock);
+
    mpam_register_cpuhp_callbacks(mpam_cpu_online);
-	pr_info("MPAM enabled\n");
+	pr_info("MPAM enabled with %u partid and %u pmg\n",
+		mpam_partid_max + 1, mpam_pmg_max + 1);
 }
/*
@@ -828,11 +965,25 @@ static void mpam_dt_create_foundling_msc(void)
static int __init mpam_msc_driver_init(void)
 {
+	bool mpam_not_available = false;
+
    if (!mpam_cpus_have_feature())
    	return -EOPNOTSUPP;
init_srcu_struct(&mpam_srcu);
+	/*
+	 * If the MPAM CPU interface is not implemented, or reserved by
+	 * firmware, there is no point touching the rest of the hardware.
+	 */
+	spin_lock(&partid_max_lock);
+	if (!partid_max_init || (!mpam_partid_max && !mpam_pmg_max))
+		mpam_not_available = true;
+	spin_unlock(&partid_max_lock);
+
+	if (mpam_not_available)
+		return 0;
+
    if (!acpi_disabled)
    	fw_num_msc = acpi_mpam_count_msc();
    else
@@ -848,4 +999,5 @@ static int __init mpam_msc_driver_init(void)
return platform_driver_register(&mpam_msc_driver);
 }
+/* Must occur after arm64_mpam_register_cpus() from arch_initcall() */
 subsys_initcall(mpam_msc_driver_init);
diff --git a/drivers/platform/mpam/mpam_internal.h b/drivers/platform/mpam/mpam_internal.h
index d5d567fe57ed..a7de4a69b9f8 100644
--- a/drivers/platform/mpam/mpam_internal.h
+++ b/drivers/platform/mpam/mpam_internal.h
@@ -31,6 +31,8 @@ struct mpam_msc
struct mutex		lock;
    bool			probed;
+	u16			partid_max;
+	u8			pmg_max;
    unsigned long		ris_idxs[128 / BITS_PER_LONG];
    u32			ris_max;
@@ -98,6 +100,10 @@ struct mpam_msc_ris
 extern struct list_head mpam_classes;
 extern struct srcu_struct mpam_srcu;
+/* System wide partid/pmg values */
+extern u16 mpam_partid_max;
+extern u8 mpam_pmg_max;
+
 /* Scheduled work callback to enable mpam once all MSC have been probed */
 void mpam_enable(struct work_struct *work);
diff --git a/include/linux/arm_mpam.h b/include/linux/arm_mpam.h
index 950ea7049d53..40e09b4d236b 100644
--- a/include/linux/arm_mpam.h
+++ b/include/linux/arm_mpam.h
@@ -34,6 +34,8 @@ static inline int acpi_mpam_parse_resources(struct mpam_msc *msc,
 static inline int acpi_mpam_count_msc(void) { return -EINVAL; }
 #endif
+int mpam_register_requestor(u16 partid_max, u8 pmg_max);
+
 int mpam_ris_create(struct mpam_msc *msc, u8 ris_idx,
    	    enum mpam_class_types type, u8 class_id, int component_id);
-- 
2.25.1


    

2024

2023

2022

2021

2020

2019

[PATCH OLK-6.6 082/121] arm_mpam: Probe MSCs to find the supported partid/pmg values