From: Mao Minkai maominkai@wxiat.com
Sunway inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I56P0Z
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SW64 uses 256-bit fpregs and has very special indexes for vector regs. Fix CFI directives in vdso rt_sigreturn accordingly.
Signed-off-by: Mao Minkai maominkai@wxiat.com
Signed-off-by: Gu Zitao guzitao@wxiat.com --- arch/sw_64/kernel/vdso/vrt_sigreturn.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/sw_64/kernel/vdso/vrt_sigreturn.S b/arch/sw_64/kernel/vdso/vrt_sigreturn.S index 90ec17e60e71..6aa7aa300b4d 100644 --- a/arch/sw_64/kernel/vdso/vrt_sigreturn.S +++ b/arch/sw_64/kernel/vdso/vrt_sigreturn.S @@ -33,15 +33,23 @@ .endm
.macro SIGCONTEXT_REGS_F base, from = 32 - .cfi_offset \from, \base + (4 + 1 + \from) * 32 + .cfi_offset \from, \base + (4 + 32 + 1) * 8 + (\from - 32) * 32 .if 62 - \from SIGCONTEXT_REGS_F \base, "(\from + 1)" .endif .endm
+ .macro SIGCONTEXT_REGS_V base, from = 67 + .cfi_offset \from, \base + (4 + 32 + 1) * 8 + ((\from - 67) & 0x1f) * 32 + (((\from - 67) >> 5) + 1) * 8 + .if 161 - \from + SIGCONTEXT_REGS_V \base, "(\from + 1)" + .endif + .endm + .macro SIGCONTEXT_REGS base SIGCONTEXT_REGS_I \base SIGCONTEXT_REGS_F \base + SIGCONTEXT_REGS_V \base .cfi_offset 63, \base + (4 + 32 + 1) * 8 + 32 * 32 .cfi_offset 64, \base + 2 * 8 .endm