From: Ma Wupeng mawupeng1@huawei.com
Add support for l3t & l0.
Last Level Cache driver for platforms such Kunpeng 920. This provides interfaces to enable LLC cache lockdown.
L0 driver for platforms such Kunpeng 920. This provides interfaces to for user to alloc and lock memory.
Changelog since v1: - return -EINVAL if sccl_to_node_id return err. - code refactoring in hisi_lockdown.c
Changelog since v2: - code cleanup in hisi_lockdown.c
Ma Wupeng (6): export symbol alloc_contig_pages arm64: export cpu_logical_map hisi: l3t: Add L3 cache driver for hisi mm/mempolicy: Add and export get_page_policy_node hisi: l0: Add support for l0 arm64: config: Enable hisi l3t & l0 by default
arch/arm64/configs/openeuler_defconfig | 2 + arch/arm64/kernel/setup.c | 1 + drivers/soc/hisilicon/Kconfig | 18 ++ drivers/soc/hisilicon/Makefile | 3 + drivers/soc/hisilicon/hisi_l0.c | 173 ++++++++++++++++ drivers/soc/hisilicon/hisi_l3t.h | 46 +++++ drivers/soc/hisilicon/hisi_lockdown.c | 140 +++++++++++++ drivers/soc/hisilicon/l3t.c | 273 +++++++++++++++++++++++++ include/linux/mempolicy.h | 4 + mm/mempolicy.c | 24 +++ mm/page_alloc.c | 1 + 11 files changed, 685 insertions(+) create mode 100644 drivers/soc/hisilicon/hisi_l0.c create mode 100644 drivers/soc/hisilicon/hisi_l3t.h create mode 100644 drivers/soc/hisilicon/hisi_lockdown.c create mode 100644 drivers/soc/hisilicon/l3t.c