From: Shunfeng Yang yangshunfeng2@huawei.com
mainline inclusion from mainline-v5.14 commit 5e6370d7cc75 category: bugfix bugzilla: NA CVE: NA
The HEM page size for QPC timer and CQC timer is always 4K and there's no need to calculate a different size by the hns driver, otherwise the ROCEE may access an invalid address.
Signed-off-by: Shunfeng Yang yangshunfeng2@huawei.com Signed-off-by: Yangyang Li liyangyang20@huawei.com Reviewed-by: chunzhi hu huchunzhi@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index f712a0b1b5f85..ff8d9c2966ac8 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -2167,10 +2167,6 @@ static int hns_roce_query_pf_caps(struct hns_roce_dev *hr_dev) &caps->scc_ctx_buf_pg_sz, &caps->scc_ctx_ba_pg_sz, HEM_TYPE_SCC_CTX); - calc_pg_sz(caps->num_cqc_timer, caps->cqc_timer_entry_sz, - caps->cqc_timer_hop_num, caps->cqc_timer_bt_num, - &caps->cqc_timer_buf_pg_sz, - &caps->cqc_timer_ba_pg_sz, HEM_TYPE_CQC_TIMER); }
calc_pg_sz(caps->num_cqe_segs, caps->mtt_entry_sz, caps->cqe_hop_num, @@ -5420,11 +5416,11 @@ static int hns_roce_v2_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, V2_QPC_BYTE_28_AT_M, V2_QPC_BYTE_28_AT_S); qp_attr->retry_cnt = roce_get_field(context->byte_212_lsn, - V2_QPC_BYTE_212_RETRY_CNT_M, - V2_QPC_BYTE_212_RETRY_CNT_S); + V2_QPC_BYTE_212_RETRY_NUM_INIT_M, + V2_QPC_BYTE_212_RETRY_NUM_INIT_S); qp_attr->rnr_retry = roce_get_field(context->byte_244_rnr_rxack, - V2_QPC_BYTE_244_RNR_CNT_M, - V2_QPC_BYTE_244_RNR_CNT_S); + V2_QPC_BYTE_244_RNR_NUM_INIT_M, + V2_QPC_BYTE_244_RNR_NUM_INIT_S);
done: qp_attr->cur_qp_state = qp_attr->qp_state;