euleros inclusion category: feature bugzilla: NA CVE: NA
The correct sip/sie 0x222 could mask wrong 0x000 by VSIP_VALID_MASK, This patch fix it.
Link: https://gitee.com/openeuler/kernel/issues/I1SWY2 Signed-off-by: Yifei Jiang jiangyifei@huawei.com Signed-off-by: Yipeng Yin yinyipeng1@huawei.com --- arch/riscv/kvm/vcpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index d10905c18..0a7b492bc 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -445,8 +445,8 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
if (reg_num == KVM_REG_RISCV_CSR_REG(sip) || reg_num == KVM_REG_RISCV_CSR_REG(sie)) { - reg_val = reg_val << VSIP_TO_HVIP_SHIFT; reg_val = reg_val & VSIP_VALID_MASK; + reg_val = reg_val << VSIP_TO_HVIP_SHIFT; }
((unsigned long *)csr)[reg_num] = reg_val;