From: Zhang Rui rui.zhang@intel.com
mainline inclusion from mainline-v5.3-rc1 commit d978e755aabe215cb67bf713e103ed3916ec306d category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I47H3V CVE: NA
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commit d978e755aabe215cb67bf713e103ed3916ec306d upstream.
RAPL MMIO interface uses 64 bit registers, thus force use 64 bit register for all the RAPL code.
Reviewed-by: Pandruvada, Srinivas srinivas.pandruvada@intel.com Tested-by: Pandruvada, Srinivas srinivas.pandruvada@intel.com Signed-off-by: Zhang Rui rui.zhang@intel.com Signed-off-by: Rafael J. Wysocki rafael.j.wysocki@intel.com Signed-off-by: Youquan Song youquan.song@intel.com Signed-off-by: Jackie Liu liuyun01@kylinos.cn Signed-off-by: Zheng Zengkai zhengzengkai@huawei.com Reviewed-by: Hanjun Guo guohanjun@huawei.com Reviewed-by: Xie XiuQi xiexiuqi@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/powercap/intel_rapl_common.c | 6 +++--- drivers/powercap/intel_rapl_msr.c | 11 +++++++---- include/linux/intel_rapl.h | 8 ++++---- 3 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c index 34a82531a7cf0..8e4de036f6d04 100644 --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -689,7 +689,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd, ra.mask = rp->mask;
if (rd->rp->priv->read_raw(cpu, &ra)) { - pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg, cpu); + pr_debug("failed to read reg 0x%llx on cpu %d\n", ra.reg, cpu); return -EIO; }
@@ -749,7 +749,7 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu) ra.reg = rp->priv->reg_unit; ra.mask = ~0; if (rp->priv->read_raw(cpu, &ra)) { - pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n", + pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n", rp->priv->reg_unit, cpu); return -ENODEV; } @@ -777,7 +777,7 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu) ra.reg = rp->priv->reg_unit; ra.mask = ~0; if (rp->priv->read_raw(cpu, &ra)) { - pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n", + pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n", rp->priv->reg_unit, cpu); return -ENODEV; } diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c index 89645222e3e0f..6cd8a8fb9238b 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -84,8 +84,10 @@ static int rapl_cpu_down_prep(unsigned int cpu)
static int rapl_msr_read_raw(int cpu, struct reg_action *ra) { - if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) { - pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg, cpu); + u32 msr = (u32)ra->reg; + + if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) { + pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); return -EIO; } ra->value &= ra->mask; @@ -95,16 +97,17 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra) static void rapl_msr_update_func(void *info) { struct reg_action *ra = info; + u32 msr = (u32)ra->reg; u64 val;
- ra->err = rdmsrl_safe(ra->reg, &val); + ra->err = rdmsrl_safe(msr, &val); if (ra->err) return;
val &= ~ra->mask; val |= ra->value;
- ra->err = wrmsrl_safe(ra->reg, val); + ra->err = wrmsrl_safe(msr, val); }
static int rapl_msr_write_raw(int cpu, struct reg_action *ra) diff --git a/include/linux/intel_rapl.h b/include/linux/intel_rapl.h index 9579f458fe4d3..649e19981eb0f 100644 --- a/include/linux/intel_rapl.h +++ b/include/linux/intel_rapl.h @@ -78,7 +78,7 @@ struct rapl_package; struct rapl_domain { const char *name; enum rapl_domain_type id; - int regs[RAPL_DOMAIN_REG_MAX]; + u64 regs[RAPL_DOMAIN_REG_MAX]; struct powercap_zone power_zone; struct rapl_domain_data rdd; struct rapl_power_limit rpl[NR_POWER_LIMITS]; @@ -89,7 +89,7 @@ struct rapl_domain { };
struct reg_action { - u32 reg; + u64 reg; u64 mask; u64 value; int err; @@ -113,8 +113,8 @@ struct rapl_if_priv { struct powercap_control_type *control_type; struct rapl_domain *platform_rapl_domain; enum cpuhp_state pcap_rapl_online; - u32 reg_unit; - u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX]; + u64 reg_unit; + u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX]; int (*read_raw)(int cpu, struct reg_action *ra); int (*write_raw)(int cpu, struct reg_action *ra); };