On the current openEuler OS, when the OS is automatically started, the hisi_trng_v2 device driver will be loaded because the algorithm self-test needs to use random numbers.
However, the trng framework of community crypto requires that the first loaded and used trng resource handle cannot be released, which will cause hisi_trng_v2 to fail to unload the driver in subsequent hisi trng module function processing.
The patch is modified by reducing the algorithm priority of the hardware device driver. Not enabled in autotest and load. Only reload this device driver for stand-alone use.
Signed-off-by: liulongfang liulongfang@huawei.com --- drivers/crypto/hisilicon/trng/trng.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/trng/trng.c b/drivers/crypto/hisilicon/trng/trng.c index 35907f29cee6..440cc28b2e35 100644 --- a/drivers/crypto/hisilicon/trng/trng.c +++ b/drivers/crypto/hisilicon/trng/trng.c @@ -27,6 +27,7 @@ #define SW_DRBG_SEED(n) (SW_DRBG_KEY_BASE - ((n) << SW_DRBG_NUM_SHIFT)) #define SW_DRBG_SEED_REGS_NUM 12 #define SW_DRBG_SEED_SIZE 48 +#define SW_DRBG_CRYPTO_ALG_PRI 100 #define SW_DRBG_BLOCKS 0x0830 #define SW_DRBG_INIT 0x0834 #define SW_DRBG_GEN 0x083c @@ -218,7 +219,7 @@ static struct rng_alg hisi_trng_alg = { .base = { .cra_name = "stdrng", .cra_driver_name = "hisi_stdrng", - .cra_priority = 300, + .cra_priority = SW_DRBG_CRYPTO_ALG_PRI, .cra_ctxsize = sizeof(struct hisi_trng_ctx), .cra_module = THIS_MODULE, .cra_init = hisi_trng_init,