tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: e7bc79687a034a22f94328123d5cf8c4d4436c35 commit: f04c0f3eb9b49427c273cd3e4d5a2ff895855b4b [2431/15255] make OPTIMIZE_INLINING config editable config: x86_64-buildonly-randconfig-004-20241024 (https://download.01.org/0day-ci/archive/20241024/202410240834.gfaxos6R-lkp@i...) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241024/202410240834.gfaxos6R-lkp@i...)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot lkp@intel.com | Closes: https://lore.kernel.org/oe-kbuild-all/202410240834.gfaxos6R-lkp@intel.com/
All warnings (new ones prefixed by >>):
arch/x86/events/amd/iommu.c: In function 'amd_iommu_pc_init':
arch/x86/events/amd/iommu.c:441:64: warning: '%u' directive output may be truncated writing between 1 and 10 bytes into a region of size 6 [-Wformat-truncation=]
441 | snprintf(perf_iommu->name, IOMMU_NAME_SIZE, "amd_iommu_%u", idx); | ^~ In function 'init_one_iommu', inlined from 'amd_iommu_pc_init' at arch/x86/events/amd/iommu.c:474:9: arch/x86/events/amd/iommu.c:441:53: note: directive argument in the range [0, 4294967294] 441 | snprintf(perf_iommu->name, IOMMU_NAME_SIZE, "amd_iommu_%u", idx); | ^~~~~~~~~~~~~~ arch/x86/events/amd/iommu.c:441:9: note: 'snprintf' output between 12 and 21 bytes into a destination of size 16 441 | snprintf(perf_iommu->name, IOMMU_NAME_SIZE, "amd_iommu_%u", idx); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +441 arch/x86/events/amd/iommu.c
25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 417 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 418 static __init int init_one_iommu(unsigned int idx) 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 419 { 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 420 struct perf_amd_iommu *perf_iommu; 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 421 int ret; 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 422 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 423 perf_iommu = kzalloc(sizeof(struct perf_amd_iommu), GFP_KERNEL); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 424 if (!perf_iommu) 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 425 return -ENOMEM; 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 426 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 427 raw_spin_lock_init(&perf_iommu->lock); 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 428 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 429 perf_iommu->pmu = iommu_pmu; 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 430 perf_iommu->iommu = get_amd_iommu(idx); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 431 perf_iommu->max_banks = amd_iommu_pc_get_max_banks(idx); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 432 perf_iommu->max_counters = amd_iommu_pc_get_max_counters(idx); 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 433 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 434 if (!perf_iommu->iommu || 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 435 !perf_iommu->max_banks || 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 436 !perf_iommu->max_counters) { 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 437 kfree(perf_iommu); f5863a00e73c43 arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-02-24 438 return -EINVAL; 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 439 } f5863a00e73c43 arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-02-24 440 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 @441 snprintf(perf_iommu->name, IOMMU_NAME_SIZE, "amd_iommu_%u", idx); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 442 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 443 ret = perf_pmu_register(&perf_iommu->pmu, perf_iommu->name, -1); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 444 if (!ret) { 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 445 pr_info("Detected AMD IOMMU #%d (%d banks, %d counters/bank).\n", 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 446 idx, perf_iommu->max_banks, perf_iommu->max_counters); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 447 list_add_tail(&perf_iommu->list, &perf_amd_iommu_list); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 448 } else { 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 449 pr_warn("Error initializing IOMMU %d.\n", idx); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 450 kfree(perf_iommu); 25df39f2cfd06a arch/x86/events/amd/iommu.c Suravee Suthikulpanit 2017-03-22 451 } 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 452 return ret; 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 453 } 7be6296fdd75f7 arch/x86/kernel/cpu/perf_event_amd_iommu.c Suravee Suthikulpanit 2013-06-05 454
:::::: The code at line 441 was first introduced by commit :::::: 25df39f2cfd06a4b49ad592c5b7cba0cbf24e27f x86/events/amd/iommu: Enable support for multiple IOMMUs
:::::: TO: Suravee Suthikulpanit suravee.suthikulpanit@amd.com :::::: CC: Ingo Molnar mingo@kernel.org