tree: https://gitee.com/openeuler/kernel.git OLK-5.10 head: e4b9c4f6ae938c4277cb28e2364b28a566e680cd commit: e8a59242bccb7ffe062097be020e67bacffc82cf [29656/30000] UNIC: Solve the problem of redundant print in ub mode config: arm64-defconfig (https://download.01.org/0day-ci/archive/20240829/202408291246.sVhHc79w-lkp@i...) compiler: aarch64-linux-gcc (GCC) 14.1.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240829/202408291246.sVhHc79w-lkp@i...)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot lkp@intel.com | Closes: https://lore.kernel.org/oe-kbuild-all/202408291246.sVhHc79w-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c: In function 'hclge_tm_qs_shaper_cfg':
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c:597:5: warning: "CONFIG_HNS3_UBL" is not defined, evaluates to 0 [-Wundef]
597 | #if CONFIG_HNS3_UBL | ^~~~~~~~~~~~~~~
vim +/CONFIG_HNS3_UBL +597 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
586 587 int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate) 588 { 589 struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; 590 struct hclge_qs_shapping_cmd *shap_cfg_cmd; 591 struct hclge_shaper_ir_para ir_para; 592 struct hclge_dev *hdev = vport->back; 593 struct hclge_desc desc; 594 u32 shaper_para; 595 int ret, i; 596
597 #if CONFIG_HNS3_UBL
598 /* vf rate limiting is not supported in ub link mode, a success message 599 * is directly returned to prevent redundant failure information from 600 * being printed in the reset and uninstallation processes. 601 */ 602 if (hnae3_dev_ubl_supported(hdev->ae_dev)) 603 return 0; 604 #endif 605 606 if (!max_tx_rate) 607 max_tx_rate = hdev->ae_dev->dev_specs.max_tm_rate; 608 609 ret = hclge_shaper_para_calc(max_tx_rate, HCLGE_SHAPER_LVL_QSET, 610 &ir_para, 611 hdev->ae_dev->dev_specs.max_tm_rate); 612 if (ret) 613 return ret; 614 615 shaper_para = hclge_tm_get_shapping_para(ir_para.ir_b, ir_para.ir_u, 616 ir_para.ir_s, 617 HCLGE_SHAPER_BS_U_DEF, 618 HCLGE_SHAPER_BS_S_DEF); 619 620 for (i = 0; i < kinfo->tc_info.num_tc; i++) { 621 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, 622 false); 623 624 shap_cfg_cmd = (struct hclge_qs_shapping_cmd *)desc.data; 625 shap_cfg_cmd->qs_id = cpu_to_le16(vport->qs_offset + i); 626 shap_cfg_cmd->qs_shapping_para = cpu_to_le32(shaper_para); 627 628 hnae3_set_bit(shap_cfg_cmd->flag, HCLGE_TM_RATE_VLD, 1); 629 shap_cfg_cmd->qs_rate = cpu_to_le32(max_tx_rate); 630 631 ret = hclge_cmd_send(&hdev->hw, &desc, 1); 632 if (ret) { 633 dev_err(&hdev->pdev->dev, 634 "vport%u, qs%u failed to set tx_rate:%d, ret=%d\n", 635 vport->vport_id, shap_cfg_cmd->qs_id, 636 max_tx_rate, ret); 637 return ret; 638 } 639 } 640 641 return 0; 642 } 643