hulk inclusion category: feature bugzilla: https://gitee.com/src-openeuler/kernel/issues/I92MAE CVE: NA
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This reverts commit 880e928489d90b670bf377689b74397670ebbc25.
Signed-off-by: Zhang Zekun zhangzekun11@huawei.com --- arch/arm64/Kconfig | 13 ------------- arch/arm64/configs/openeuler_defconfig | 1 - arch/arm64/kernel/cpu_errata.c | 14 -------------- arch/arm64/tools/cpucaps | 1 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 20 -------------------- 5 files changed, 49 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 85ac1e83f747..76629160ffe9 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1185,19 +1185,6 @@ config HISILICON_ERRATUM_1980005
If unsure, say N.
-config HISILICON_ERRATUM_162100602 - bool "Hisilicon erratum 162100602" - depends on ARM_SMMU_V3 - default y - help - On Hisilicon LINXICORE9100 cores, SMMU pagetable prefetch features may - prefetch and use a invalid PTE even the PTE is valid at that time. This - will cause the device trigger fake pagefaults. If the SMMU works in - terminate mode, transactions which occur fake pagefaults will be aborted, - and could result in unexpected errors. - - If unsure, say Y. - config QCOM_FALKOR_ERRATUM_1003 bool "Falkor E1003: Incorrect translation due to ASID change" default y diff --git a/arch/arm64/configs/openeuler_defconfig b/arch/arm64/configs/openeuler_defconfig index 767d1ba26c3a..6bfe50075033 100644 --- a/arch/arm64/configs/openeuler_defconfig +++ b/arch/arm64/configs/openeuler_defconfig @@ -428,7 +428,6 @@ CONFIG_FUJITSU_ERRATUM_010001=y CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_HISILICON_ERRATUM_162100125=y # CONFIG_HISILICON_ERRATUM_1980005 is not set -CONFIG_HISILICON_ERRATUM_162100602=y CONFIG_QCOM_FALKOR_ERRATUM_1003=y CONFIG_QCOM_FALKOR_ERRATUM_1009=y CONFIG_QCOM_QDF2400_ERRATUM_0065=y diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c569e6c0ac07..a686a96d966a 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -360,13 +360,6 @@ static const struct midr_range hisilicon_erratum_162100125_cpus[] = { }; #endif
-#ifdef CONFIG_HISILICON_ERRATUM_162100602 -static const struct midr_range hisilicon_erratum_162100602_cpus[] = { - MIDR_REV(MIDR_HISI_LINXICORE9100, 0, 0), - {}, -}; -#endif - #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 static const struct arm64_cpu_capabilities qcom_erratum_1003_list[] = { { @@ -598,13 +591,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = { ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100125_cpus), }, #endif -#ifdef CONFIG_HISILICON_ERRATUM_162100602 - { - .desc = "Hisilicon erratum 162100602", - .capability = ARM64_WORKAROUND_HISILICON_ERRATUM_162100602, - ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100602_cpus), - }, -#endif #ifdef CONFIG_HISILICON_ERRATUM_1980005 { .desc = "Hisilicon erratum 1980005 (IDC)", diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 529370b881ed..7234ab72a064 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -104,7 +104,6 @@ WORKAROUND_SPECULATIVE_AT WORKAROUND_HISILICON_ERRATUM_162100125 WORKAROUND_HISI_HIP08_RU_PREFETCH WORKAROUND_HISILICON_1980005 -WORKAROUND_HISILICON_ERRATUM_162100602 KABI_RESERVE_1 KABI_RESERVE_2 KABI_RESERVE_3 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index de95468a1293..d358ec5decdc 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2776,23 +2776,6 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain, gather->pgsize, true, smmu_domain); }
-#ifdef CONFIG_HISILICON_ERRATUM_162100602 -static void arm_smmu_iotlb_sync_map(struct iommu_domain *domain, - unsigned long iova, size_t size) -{ - struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); - size_t granule_size; - - if (!cpus_have_const_cap(ARM64_WORKAROUND_HISILICON_ERRATUM_162100602)) - return; - - granule_size = 1 << __ffs(smmu_domain->domain.pgsize_bitmap); - - /* Add a SYNC command to sync io-pgtale to avoid errors in pgtable prefetch*/ - arm_smmu_tlb_inv_range_domain(iova, granule_size, granule_size, true, smmu_domain); -} -#endif - static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) { @@ -3356,9 +3339,6 @@ static struct iommu_ops arm_smmu_ops = { .unmap_pages = arm_smmu_unmap_pages, .flush_iotlb_all = arm_smmu_flush_iotlb_all, .iotlb_sync = arm_smmu_iotlb_sync, -#ifdef CONFIG_HISILICON_ERRATUM_162100602 - .iotlb_sync_map = arm_smmu_iotlb_sync_map, -#endif .iova_to_phys = arm_smmu_iova_to_phys, .enable_nesting = arm_smmu_enable_nesting, #ifdef CONFIG_ARM_SMMU_V3_HTTU