From: Yury Norov ynorov@caviumnetworks.com
maillist inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I8JVJ3 CVE: NA
Reference: https://github.com/norov/linux/commits/ilp32-5.2
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ILP32 patch series introduces new type of binaries which is also compat. So rename existung aarch32 compat_elf_hwcap's helps to avoid confusing.
Signed-off-by: Yury Norov ynorov@caviumnetworks.com Signed-off-by: Yury Norov ynorov@marvell.com Signed-off-by: Xiongfeng Wang wangxiongfeng2@huawei.com Acked-by: Xie XiuQi xiexiuqi@huawei.com Signed-off-by: Chen Jun chenjun102@huawei.com Signed-off-by: Chen Jiahao chenjiahao16@huawei.com
Conflicts: arch/arm64/kernel/cpufeature.c
Signed-off-by: Jinjie Ruan ruanjinjie@huawei.com --- arch/arm64/include/asm/arch_timer.h | 2 +- arch/arm64/include/asm/hwcap.h | 2 +- arch/arm64/kernel/binfmt_elf32.c | 4 ++-- arch/arm64/kernel/cpufeature.c | 16 ++++++++-------- arch/arm64/kernel/cpuinfo.c | 10 +++++----- 5 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h index fdf5ee2ffa3a..379a98176681 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h @@ -218,7 +218,7 @@ static inline void arch_timer_set_evtstrm_feature(void) { cpu_set_named_feature(EVTSTRM); #ifdef CONFIG_AARCH32_EL0 - compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM; + a32_elf_hwcap |= COMPAT_HWCAP_EVTSTRM; #endif }
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 995179ab2b7d..2e914609db93 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -148,7 +148,7 @@ #define ELF_HWCAP2 cpu_get_elf_hwcap2()
#ifdef CONFIG_AARCH32_EL0 -extern unsigned int compat_elf_hwcap, compat_elf_hwcap2; +extern unsigned int a32_elf_hwcap, a32_elf_hwcap2; #endif
enum { diff --git a/arch/arm64/kernel/binfmt_elf32.c b/arch/arm64/kernel/binfmt_elf32.c index e839a8753144..e4335c7ba8be 100644 --- a/arch/arm64/kernel/binfmt_elf32.c +++ b/arch/arm64/kernel/binfmt_elf32.c @@ -18,8 +18,8 @@ })
#define COMPAT_ARCH_DLINFO -#define COMPAT_ELF_HWCAP (compat_elf_hwcap) -#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2) +#define COMPAT_ELF_HWCAP (a32_elf_hwcap) +#define COMPAT_ELF_HWCAP2 (a32_elf_hwcap2)
#define compat_arch_setup_additional_pages \ aarch32_setup_additional_pages diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 374ead145a8a..c806a117dbcc 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -96,13 +96,13 @@ static DECLARE_BITMAP(elf_hwcap, MAX_CPU_FEATURES) __read_mostly;
#ifdef CONFIG_AARCH32_EL0 -#define COMPAT_ELF_HWCAP_DEFAULT \ +#define AARCH32_EL0_ELF_HWCAP_DEFAULT \ (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ COMPAT_HWCAP_TLS|COMPAT_HWCAP_IDIV|\ COMPAT_HWCAP_LPAE) -unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT; -unsigned int compat_elf_hwcap2 __read_mostly; +unsigned int a32_elf_hwcap __read_mostly = AARCH32_EL0_ELF_HWCAP_DEFAULT; +unsigned int a32_elf_hwcap2 __read_mostly; #endif
DECLARE_BITMAP(system_cpucaps, ARM64_NCAPS); @@ -2194,7 +2194,7 @@ static void elf_hwcap_fixup(void) { #ifdef CONFIG_ARM64_ERRATUM_1742098 if (cpus_have_const_cap(ARM64_WORKAROUND_1742098)) - compat_elf_hwcap2 &= ~COMPAT_HWCAP2_AES; + a32_elf_hwcap2 &= ~COMPAT_HWCAP2_AES; #endif /* ARM64_ERRATUM_1742098 */ }
@@ -2922,10 +2922,10 @@ static void cap_set_elf_hwcap(const struct arm64_cpu_capabilities *cap) break; #ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: - compat_elf_hwcap |= (u32)cap->hwcap; + a32_elf_hwcap |= (u32)cap->hwcap; break; case CAP_COMPAT_HWCAP2: - compat_elf_hwcap2 |= (u32)cap->hwcap; + a32_elf_hwcap2 |= (u32)cap->hwcap; break; #endif default: @@ -2945,10 +2945,10 @@ static bool cpus_have_elf_hwcap(const struct arm64_cpu_capabilities *cap) break; #ifdef CONFIG_AARCH32_EL0 case CAP_COMPAT_HWCAP: - rc = (compat_elf_hwcap & (u32)cap->hwcap) != 0; + rc = (a32_elf_hwcap & (u32)cap->hwcap) != 0; break; case CAP_COMPAT_HWCAP2: - rc = (compat_elf_hwcap2 & (u32)cap->hwcap) != 0; + rc = (a32_elf_hwcap2 & (u32)cap->hwcap) != 0; break; #endif default: diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 60ff939c7785..49f2627e9d9a 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -177,7 +177,7 @@ static const char *const compat_hwcap2_str[] = { static int c_show(struct seq_file *m, void *v) { int i, j; - bool compat = personality(current->personality) == PER_LINUX32; + bool aarch32 = personality(current->personality) == PER_LINUX32;
for_each_online_cpu(i) { struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i); @@ -189,7 +189,7 @@ static int c_show(struct seq_file *m, void *v) * "processor". Give glibc what it expects. */ seq_printf(m, "processor\t: %d\n", i); - if (compat) + if (aarch32) seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);
@@ -204,10 +204,10 @@ static int c_show(struct seq_file *m, void *v) * software which does already (at least for 32-bit). */ seq_puts(m, "Features\t:"); - if (compat) { + if (aarch32) { #ifdef CONFIG_AARCH32_EL0 for (j = 0; j < ARRAY_SIZE(compat_hwcap_str); j++) { - if (compat_elf_hwcap & (1 << j)) { + if (a32_elf_hwcap & (1 << j)) { /* * Warn once if any feature should not * have been present on arm64 platform. @@ -220,7 +220,7 @@ static int c_show(struct seq_file *m, void *v) }
for (j = 0; j < ARRAY_SIZE(compat_hwcap2_str); j++) - if (compat_elf_hwcap2 & (1 << j)) + if (a32_elf_hwcap2 & (1 << j)) seq_printf(m, " %s", compat_hwcap2_str[j]); #endif /* CONFIG_AARCH32_EL0 */ } else {