From: Honghui Zhang honghui.zhang@mediatek.com
mainline inclusion from mainline-v5.1-rc1 commit f0cfecea8d1e8e0cd5d5053f9452b3a450f49eb5 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I47H3V CVE: NA
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commit f0cfecea8d1e8e0cd5d5053f9452b3a450f49eb5 upstream. Backport summary: for 4.19 kernel ICX PCIe Gen4 support.
The Class Code for subtractive decode PCI-to-PCI bridge is 060401h; add an entry to make portdrv support this type of bridge. This allows use of PCIe services on subtractive decode ports.
Signed-off-by: Honghui Zhang honghui.zhang@mediatek.com [bhelgaas: add braces surrounding entry] Signed-off-by: Bjorn Helgaas bhelgaas@google.com (cherry picked from commit f0cfecea8d1e8e0cd5d5053f9452b3a450f49eb5)
Signed-off-by: Ethan Zhao haifeng.zhao@intel.com Signed-off-by: Jackie Liu liuyun01@kylinos.cn Signed-off-by: Zheng Zengkai zhengzengkai@huawei.com Reviewed-by: Xiongfeng Wang wangxiongfeng2@huawei.com Reviewed-by: Xie XiuQi xiexiuqi@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/pci/pcie/portdrv_pci.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 3746545bb627..e6671fec17e1 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -187,6 +187,8 @@ static void pcie_portdrv_err_resume(struct pci_dev *dev) static const struct pci_device_id port_pci_ids[] = { /* handle any PCI-Express port */ { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, + /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ + { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, { }, };