From: shaojijie shaojijie@huawei.com
driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I94FVZ CVE: NA
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The patch disables the clocks of the PPP, PPU, IGU_EGU, ROCE, and TM modules by configuring the network subctrl register.
Signed-off-by: shaojijie shaojijie@huawei.com Signed-off-by: Jiantao Xiao xiaojiantao1@h-partners.com --- drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_ext.c | 7 +++++++ drivers/net/ethernet/hisilicon/hns3/hns3_ext.h | 1 + .../ethernet/hisilicon/hns3/hns3pf/hclge_ext.c | 17 +++++++++++++++++ .../ethernet/hisilicon/hns3/hns3pf/hclge_ext.h | 1 + 5 files changed, 27 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h b/drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h index d7ab4449c031..208b1f67eb70 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h @@ -43,6 +43,7 @@ enum hnae3_ext_opcode { HNAE3_EXT_OPC_SET_SFP_STATE, HNAE3_EXT_OPC_DISABLE_LANE, HNAE3_EXT_OPC_GET_LANE_STATUS, + HNAE3_EXT_OPC_DISABLE_CLOCK, };
struct hnae3_pfc_storm_para { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ext.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ext.c index 7eeeabc79bc9..b4111cbeee70 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ext.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ext.c @@ -432,3 +432,10 @@ int nic_get_net_lane_status(struct net_device *ndev, u32 *status) status, sizeof(*status)); } EXPORT_SYMBOL(nic_get_net_lane_status); + +int nic_disable_clock(struct net_device *ndev) +{ + return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_DISABLE_CLOCK, + NULL, 0); +} +EXPORT_SYMBOL(nic_disable_clock); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ext.h b/drivers/net/ethernet/hisilicon/hns3/hns3_ext.h index 7254ff23558c..6451b862ae39 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ext.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ext.h @@ -41,4 +41,5 @@ int nic_get_sfp_present(struct net_device *ndev, int *present); int nic_set_sfp_state(struct net_device *ndev, bool en); int nic_disable_net_lane(struct net_device *ndev); int nic_get_net_lane_status(struct net_device *ndev, u32 *status); +int nic_disable_clock(struct net_device *ndev); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c index 4bc6216d2d8c..1f2c351c5cbd 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c @@ -534,6 +534,22 @@ static int hclge_get_net_lane_status(struct hclge_dev *hdev, void *data, return 0; }
+static int hclge_disable_nic_clock(struct hclge_dev *hdev, void *data, + size_t length) +{ + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_NIC_CLOCK, false); + desc.data[0] = 0; + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + dev_err(&hdev->pdev->dev, + "failed to disable nic clock, ret = %d\n", ret); + return ret; +} + static void hclge_ext_resotre_config(struct hclge_dev *hdev) { if (hdev->reset_type != HNAE3_IMP_RESET && @@ -700,6 +716,7 @@ static const hclge_priv_ops_fn hclge_ext_func_arr[] = { [HNAE3_EXT_OPC_SET_SFP_STATE] = hclge_set_sfp_state, [HNAE3_EXT_OPC_DISABLE_LANE] = hclge_disable_net_lane, [HNAE3_EXT_OPC_GET_LANE_STATUS] = hclge_get_net_lane_status, + [HNAE3_EXT_OPC_DISABLE_CLOCK] = hclge_disable_nic_clock, };
int hclge_ext_ops_handle(struct hnae3_handle *handle, int opcode, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.h index 06b3d9c494f4..04f9ab5261e8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.h @@ -84,6 +84,7 @@ struct hclge_sfp_enable_cmd { };
enum hclge_ext_opcode_type { + HCLGE_OPC_CONFIG_NIC_CLOCK = 0x0060, HCLGE_OPC_CONFIG_SWITCH_PARAM = 0x1033, HCLGE_OPC_CONFIG_VLAN_FILTER = 0x1100, HCLGE_OPC_SET_NOTIFY_PKT = 0x180A,