From: Mike Leach mike.leach@linaro.org
mainline inclusion from mainline-v6.3-rc1 commit aa19bb4c3583 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I85PIL CVE: NA
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...
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Use the perf_report_aux_output_id() call to output the CoreSight trace ID and associated CPU as a PERF_RECORD_AUX_OUTPUT_HW_ID record in the perf.data file.
Signed-off-by: Mike Leach mike.leach@linaro.org Reviewed-by: Suzuki K Poulose suzuki.poulose@arm.com Signed-off-by: Suzuki K Poulose suzuki.poulose@arm.com Link: https://lore.kernel.org/r/20230116124928.5440-14-mike.leach@linaro.org Signed-off-by: xiabing xiabing12@h-partners.com --- drivers/hwtracing/coresight/coresight-etm-perf.c | 7 +++++++ include/linux/coresight-pmu.h | 14 ++++++++++++++ 2 files changed, 21 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index c6ec0b2c2512..d5ab38278abf 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -4,6 +4,7 @@ * Author: Mathieu Poirier mathieu.poirier@linaro.org */
+#include <linux/bitfield.h> #include <linux/coresight.h> #include <linux/coresight-pmu.h> #include <linux/cpumask.h> @@ -343,6 +344,7 @@ static void etm_event_start(struct perf_event *event, int flags) struct perf_output_handle *handle = &ctxt->handle; struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); struct list_head *path; + u64 hw_id;
if (!csdev) goto fail; @@ -388,6 +390,11 @@ static void etm_event_start(struct perf_event *event, int flags) if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF)) goto fail_disable_path;
+ /* output cpu / trace ID in perf record */ + hw_id = FIELD_PREP(CS_AUX_HW_ID_VERSION_MASK, CS_AUX_HW_ID_CURR_VERSION); + hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, coresight_trace_id_read_cpu_id(cpu)); + perf_report_aux_output_id(event, hw_id); + out: /* Tell the perf core the event is alive */ event->hw.state = 0; diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index f73b7797ba9a..286dafc4a8d6 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -7,6 +7,8 @@ #ifndef _LINUX_CORESIGHT_PMU_H #define _LINUX_CORESIGHT_PMU_H
+#include <linux/bits.h> + #define CORESIGHT_ETM_PMU_NAME "cs_etm"
/* @@ -31,4 +33,16 @@ #define ETM4_CFG_BIT_TS 11 #define ETM4_CFG_BIT_RETSTK 12
+/* + * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload. + * Used to associate a CPU with the CoreSight Trace ID. + * [07:00] - Trace ID - uses 8 bits to make value easy to read in file. + * [59:08] - Unused (SBZ) + * [63:60] - Version + */ +#define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0) +#define CS_AUX_HW_ID_VERSION_MASK GENMASK_ULL(63, 60) + +#define CS_AUX_HW_ID_CURR_VERSION 0 + #endif