Applied to kernel-5.5
On 2020/8/18 20:14, Xie XiuQi wrote:
For kernel-5.5 branch.
On 2020/8/18 20:13, Xie XiuQi wrote:
This series adds initial KVM RISC-V support. Currently, we are able to boot RISC-V 64bit Linux Guests with multiple VCPUs.
This series can be found in riscv_kvm_v13 branch at: https//github.com/avpatel/linux.git
Link: https://gitee.com/openeuler/kernel/issues/I1RR1Y
This is backported by Mingwang Li limingwang@huawei.com.
Alistair Francis (1): Revert "riscv: Use latest system call ABI"
Anup Patel (19): RISC-V: Add bitmap reprensenting ISA features common across CPUs RISC-V: Add fragmented config for debug options RISC-V: Enable CPU Hotplug in defconfigs RISC-V: Add hypervisor extension related CSR defines RISC-V: Add initial skeletal KVM support RISC-V: KVM: Implement VCPU create, init and destroy functions RISC-V: KVM: Implement VCPU interrupts and requests handling RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls RISC-V: KVM: Implement VCPU world-switch RISC-V: KVM: Handle MMIO exits for VCPU RISC-V: KVM: Handle WFI exits for VCPU RISC-V: KVM: Implement VMID allocator RISC-V: KVM: Implement stage2 page table programming RISC-V: KVM: Implement MMU notifiers RISC-V: KVM: Document RISC-V specific parts of KVM API. RISC-V: KVM: Add MAINTAINERS entry RISC-V: Enable KVM for RV64 and RV32 RISC-V: KVM: Fix stage2_map_page() and kvm_riscv_vcpu_unpriv_read() RISC-V: KVM: Determine instruction correctly from HTINST CSR
Atish Patra (9): RISC-V: Mark existing SBI as 0.1 SBI. RISC-V: Add basic support for SBI v0.2 RISC-V: Add SBI v0.2 extension definitions RISC-V: Introduce a new config for SBI v0.1 RISC-V: Implement new SBI v0.2 extensions RISC-V: KVM: Add timer functionality RISC-V: KVM: FP lazy save/restore RISC-V: KVM: Implement ONE REG interface for FP registers RISC-V: KVM: Add SBI v0.1 support
limingwang (1): RISC-V: KVM: fix some interfaces problems
Documentation/virt/kvm/api.txt | 169 +++- MAINTAINERS | 11 + arch/riscv/Kconfig | 9 + arch/riscv/Makefile | 2 + arch/riscv/configs/defconfig | 24 +- arch/riscv/configs/extra_debug.config | 21 + arch/riscv/configs/rv32_defconfig | 24 +- arch/riscv/include/asm/csr.h | 90 +- arch/riscv/include/asm/hwcap.h | 22 + arch/riscv/include/asm/kvm_host.h | 274 ++++++ arch/riscv/include/asm/kvm_vcpu_timer.h | 44 + arch/riscv/include/asm/pgtable-bits.h | 1 + arch/riscv/include/asm/sbi.h | 178 ++-- arch/riscv/include/uapi/asm/kvm.h | 127 +++ arch/riscv/include/uapi/asm/unistd.h | 5 +- arch/riscv/kernel/asm-offsets.c | 154 ++++ arch/riscv/kernel/cpufeature.c | 83 +- arch/riscv/kernel/sbi.c | 522 +++++++++++- arch/riscv/kernel/setup.c | 2 + arch/riscv/kvm/Kconfig | 34 + arch/riscv/kvm/Makefile | 14 + arch/riscv/kvm/main.c | 99 +++ arch/riscv/kvm/mmu.c | 804 ++++++++++++++++++ arch/riscv/kvm/tlb.S | 74 ++ arch/riscv/kvm/vcpu.c | 1037 +++++++++++++++++++++++ arch/riscv/kvm/vcpu_exit.c | 678 +++++++++++++++ arch/riscv/kvm/vcpu_sbi.c | 173 ++++ arch/riscv/kvm/vcpu_switch.S | 391 +++++++++ arch/riscv/kvm/vcpu_timer.c | 225 +++++ arch/riscv/kvm/vm.c | 86 ++ arch/riscv/kvm/vmid.c | 120 +++ drivers/clocksource/timer-riscv.c | 8 + include/clocksource/timer-riscv.h | 16 + include/uapi/linux/kvm.h | 8 + 34 files changed, 5402 insertions(+), 127 deletions(-) create mode 100644 arch/riscv/configs/extra_debug.config create mode 100644 arch/riscv/include/asm/kvm_host.h create mode 100644 arch/riscv/include/asm/kvm_vcpu_timer.h create mode 100644 arch/riscv/include/uapi/asm/kvm.h create mode 100644 arch/riscv/kvm/Kconfig create mode 100644 arch/riscv/kvm/Makefile create mode 100644 arch/riscv/kvm/main.c create mode 100644 arch/riscv/kvm/mmu.c create mode 100644 arch/riscv/kvm/tlb.S create mode 100644 arch/riscv/kvm/vcpu.c create mode 100644 arch/riscv/kvm/vcpu_exit.c create mode 100644 arch/riscv/kvm/vcpu_sbi.c create mode 100644 arch/riscv/kvm/vcpu_switch.S create mode 100644 arch/riscv/kvm/vcpu_timer.c create mode 100644 arch/riscv/kvm/vm.c create mode 100644 arch/riscv/kvm/vmid.c create mode 100644 include/clocksource/timer-riscv.h
Kernel mailing list -- kernel@openeuler.org To unsubscribe send an email to kernel-leave@openeuler.org